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All sourcesNASA NTRSDOE OSTI
NASA NTRS2010

Oxidation of TaSi2-Containing ZrB2-SiC Ultra-High Temperature Materials

Hot pressed coupons of composition ZrB2-20 v% SiC-5 v% TaSi2 and ZrB2-20 v% SiC-20 v% TaSi2 were oxidized in stagnant air at temperatures of 1627 and 1927C for one, five and ten 10-minute cycles. The oxidation reactions were characterized by weight change kinetics, x-ray diffraction, and SEM/EDS. Detailed WDS/microprobe quantitative analyses of the oxidation products were conducted for the ZrB2-20 v% SiC-20 v% TaSi2 sample oxidized for five 10-minute cycles at 1927C. Oxidation kinetics and product formation were compared to ZrB2-20 v% SiC with no TaSi2 additions. It was found that the 20 v% TaSi2 composition exhibited improved oxidation resistance relative to the material with no TaSi2 additions at 1627C. However, for exposures at 1927C less oxidation resistance and extensive liquid phase formation were observed compared to the material with no TaSi2 additions. Attempts to limit the liquid phase formation by reducing the TaSi2 content to 5 v% were unsuccessful. In addition, the enhanced oxidation resistance at 1627C due to 20 v% TaSi2 additions was not achieved at the 5 v% addition level. The observed oxidation product evolution is discussed in terms of thermodynamics and phase equilibria for the TaSi2-containing ZrB2-SiC material system. TaSi2-additions to ZrB2-SiC at any level are not recommended for ultra-high temperature (>1900C) applications due to excessive liquid phase formation.

Opila, Elizabeth J.↗
NASA NTRS2008

Oxidation of ZrB2 SiC TaSi2 Materials at Ultra High Temperatures

ZrB2 - 20v% SiC - 20v% TaSi2 was oxidized in stagnant air for ten minute cycles for times up to 100 minutes at 1627 C and 1927 C. The sample oxidized at 1627 C showed oxidation resistance better than that of the standard ZrB2 - 20v% SiC. The sample oxidized at 1927 C, however, showed evidence of liquid phase formation and complex oxidation products. The sample exposed at 1927 C was analyzed in detail by scanning electron microprobe and wavelength dispersive spectroscopy to understand the complex oxidation and melting reactions occurring during exposure. The as hot-pressed material shows the formation of a Zr(Ta)B2 phase in addition to the three phases in the nominal composition already noted. After oxidation, the TaSi2 in the matrix was completely reacted to form Ta(Zr)C. The layered oxidation products included SiO2, ZrO2, Ta2O5, and a complex oxide containing both Zr and Ta. Likely reactions are proposed based on thermodynamic phase stability and phase morphology.

Opila, E.↗
NASA NTRS2003

Oxidation of ZrB2-and HfB2-Based Ultra-High Temperature Ceramics: Effects of Ta Additions

Several compositions of ZrB2- and HfB2-based Ultra-High Temperature Ceramics (UHTC) were oxidized in stagnant air at 1627 C in ten minute cycles for times up to 100 minutes. These compositions include: ZrB2 - 20v% SiC, HfB2 - 20v% SiC, ZrB2 - 20v% SiC - 20v% TaSi2, ZrB2 - 33v% SiC, HfB2 - 20v% SiC - 20v% TaSi2, and ZrB2 - 20v% SiC - 20v% TaC. The weight change due to oxidation was recorded. The ZrB2 - 20v% SiC - 20v% TaSi2 composition was also oxidized in stagnant air at 1927 C and in an arc jet atmosphere. Samples were analyzed after oxidation by x-ray diffraction, field emission scanning electron microscopy, and energy dispersive spectroscopy to determine the reaction products and to observe the microstructure. The ZrB2 - 20v% SiC - 20v% TaSi2 showed the lowest oxidation rate at 1627 C, but performed poorly under the more extreme tests due to liquid phase formation. Effects of Ta-additions on the oxidation of the diboride-based UHTC are discussed.

Opila, Elizabeth↗
NASA NTRS2012

Iridium Interfacial Stack - IrIS

Iridium Interfacial Stack (IrIS) is the sputter deposition of high-purity tantalum silicide (TaSi2-400 nm)/platinum (Pt-200 nm)/iridium (Ir-200 nm)/platinum (Pt-200 nm) in an ultra-high vacuum system followed by a 600 C anneal in nitrogen for 30 minutes. IrIS simultaneously acts as both a bond metal and a diffusion barrier. This bondable metallization that also acts as a diffusion barrier can prevent oxygen from air and gold from the wire-bond from infiltrating silicon carbide (SiC) monolithically integrated circuits (ICs) operating above 500 C in air for over 1,000 hours. This TaSi2/Pt/Ir/Pt metallization is easily bonded for electrical connection to off-chip circuitry and does not require extra anneals or masking steps. There are two ways that IrIS can be used in SiC ICs for applications above 500 C: it can be put directly on a SiC ohmic contact metal, such as Ti, or be used as a bond metal residing on top of an interconnect metal. For simplicity, only the use as a bond metal is discussed. The layer thickness ratio of TaSi2 to the first Pt layer deposited thereon should be 2:1. This will allow Si from the TaSi2 to react with the Pt to form Pt2Si during the 600 C anneal carried out after all layers have been deposited. The Ir layer does not readily form a silicide at 600 C, and thereby prevents the Si from migrating into the top-most Pt layer during future anneals and high-temperature IC operation. The second (i.e., top-most) deposited Pt layer needs to be about 200 nm to enable easy wire bonding. The thickness of 200 nm for Ir was chosen for initial experiments; further optimization of the Ir layer thickness may be possible via further experimentation. Ir itself is not easily wire-bonded because of its hardness and much higher melting point than Pt. Below the iridium layer, the TaSi2 and Pt react and form desired Pt2Si during the post-deposition anneal while above the iridium layer remains pure Pt as desired to facilitate easy and strong wire-bonding to the SiC chip circuitry.

Spry, David↗
NASA NTRS1994

Reaction of Ta thin film with single crystalline (001) beta-SiC

The reaction between a sputtered-deposited Ta film (320 nm thick) and a single crystalline (001) beta-SiC substrate induced by vacuum annealing at temperatures of 600-1200 C for 1 h (30 min at 1100 C) is investigated by 3 MeV He(+2) backscattering spectrometry, x-ray diffraction, secondary ion mass spectrometry, and transmission and scanning electron microscopies. No significant reaction is observed at 800 C or at lower tempertures. At 900 C, the main product phases are Ta2C and carbon-stabilized Ta5Si3. A minor amount of unreacted Ta is also present. After annealing at 1000 C, all the tantalum has reacted; the reaction zone possesses a multilayered structure of beta-SiC/TaC/carbon-stabilized Ta5Si3/alpha-Ta5Si3/Ta2C. The diffusion path at 1000 C is plotted on the isothermal section of the Ta-Si-C phase diagram. At 1100 C, the reacted layer has an interface with the SiC substrate that is still quite flat but has a rough surface due to the formation of macroscopic voids within the reacted layer. The equilibrium products predicted by the phase diagram are TaC and TaSi2. This final state is reached by annealing at 1200 C for 1 h. At that point, the reacted layer has a latterally very uneven structure and morphology.

Chen, J. S.↗
NASA NTRS2016

Processing and Characterization of Thousand-Hour 500 C Durable 4H-SiC JFET Integrated Circuits

This work reports fabrication and testing of integrated circuits (ICs) with two levels of interconnect that consistently achieve greater than 1000 hours of stable electrical operation at 500 C in air ambient. These ICs are based on 4H-SiC junction field effect transistor (JFET) technology that integrates hafnium ohmic contacts with TaSi2 interconnects and SiO2 and Si3N4 dielectric layers over approximately 1-micrometer scale vertical topology. Following initial burn-in, important circuit parameters remain stable for more than 1000 hours of 500 C operational testing. These results advance the technology foundation for realizing long-term durable 500 C ICs with increased functional capability for sensing and control combustion engine, planetary, deep-well drilling, and other harsh-environment applications.

Microelectronics↗
NASA NTRS2016

Processing and Characterization of Thousand-Hour 500 C Durable 4H-SiC JFET Integrated Circuits

This work reports fabrication and testing of integrated circuits (ICs) with two levels of interconnect that consistently achieve greater than 1000 hours of stable electrical operation at 500 C in air ambient. These ICs are based on 4H-SiC junction field effect transistor (JFET) technology that integrates hafnium ohmic contacts with TaSi2 interconnects and SiO2 and Si3N4 dielectric layers over 1-m scale vertical topology. Following initial burn-in, important circuit parameters remain stable for more than 1000 hours of 500 C operational testing. These results advance the technology foundation for realizing long-term durable 500 C ICs with increased functional capability for sensing and control combustion engine, planetary, deep-well drilling, and other harsh-environment applications.

JFET↗