A transistor-circuit realization of the inductance.
Transistor circuit realization of inductance with three transistors and one power supply
INDUCTANCE↗
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Results for “TRANSISTOR CIRCUIT”
Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Low-power transistorized circuit provides staircase waveform
A low input power transistorized circuit is used to generate a staircase waveform of high step uniformity. Other characteristics are low step droop, fast transition time, and no feedback.
Breen, G. D.↗
Transistorized circuit clamps voltage with 0.1 percent error
Transistorized clamping circuit clamps either of two voltage levels to input of digital-to-analog resistive matrix with 0.1 percent error. Clamping circuit technique has analog, digital, and hybrid circuit applications.
Source record↗
Development of silicon nitride and cermet resistors for use in a binary counter, metal insulator field effect transistor circuit Final report, 1 Dec. 1966 - 31 Mar. 1968
Silicon nitride and cermet resistors for binary counter metal insulator field effect transistor circuit
Brown, G. A.↗
Simple, one transistor circuit boosts pulse amplitude
Simple circuit that uses a single transistor to accomplish capacitor storage followed by common-base switching supplies a pulse voltage, higher than that normally available from emitter-follower circuits, to drive a 100-watt transmitter.
Keon, T.↗
SiC JFET Transistor Circuit Model for Extreme Temperature Range
A technique for simulating extreme-temperature operation of integrated circuits that incorporate silicon carbide (SiC) junction field-effect transistors (JFETs) has been developed. The technique involves modification of NGSPICE, which is an open-source version of the popular Simulation Program with Integrated Circuit Emphasis (SPICE) general-purpose analog-integrated-circuit-simulating software. NGSPICE in its unmodified form is used for simulating and designing circuits made from silicon-based transistors that operate at or near room temperature. Two rapid modifications of NGSPICE source code enable SiC JFETs to be simulated to 500 C using the well-known Level 1 model for silicon metal oxide semiconductor field-effect transistors (MOSFETs). First, the default value of the MOSFET surface potential must be changed. In the unmodified source code, this parameter has a value of 0.6, which corresponds to slightly more than half the bandgap of silicon. In NGSPICE modified to simulate SiC JFETs, this parameter is changed to a value of 1.6, corresponding to slightly more than half the bandgap of SiC. The second modification consists of changing the temperature dependence of MOSFET transconductance and saturation parameters. The unmodified NGSPICE source code implements a T(sup -1.5) temperature dependence for these parameters. In order to mimic the temperature behavior of experimental SiC JFETs, a T(sup -1.3) temperature dependence must be implemented in the NGSPICE source code. Following these two simple modifications, the Level 1 MOSFET model of the NGSPICE circuit simulation program reasonably approximates the measured high-temperature behavior of experimental SiC JFETs properly operated with zero or reverse bias applied to the gate terminal. Modification of additional silicon parameters in the NGSPICE source code was not necessary to model experimental SiC JFET current-voltage performance across the entire temperature range from 25 to 500 C.
Neudeck, Philip G.↗
Transistor circuit increases range of logarithmic current amplifier
Circuit increases the range of a logarithmic current amplifier by combining a commercially available amplifier with a silicon epitaxial transistor. A temperature compensating network is provided for the transistor.
Gilmour, G.↗
Junction field-effect transistor circuits for prescribed output functions.
Explore the source record for details and available documents.
Filip, G. L.↗
MICROPOWER TRANSISTOR LOGIC CIRCUITS
Micropower transistor logic circuits for spaceborne computers
COMPUTER↗
An integrated analog switch using a bidirectional transistor.
Circuit functions, electrical parameters and fabrication of integrated analog switch in monolithic silicon block
INTEGRATED CIRCUIT↗
Simple circuit reduces transistor switching time
Silicon-Controlled Rectifier /SCR/, gated by a voltage divider, controls the potentiometer in transistorized switching circuits. The SCR acts as a gate to trigger the switching transistor only when the input signal reaches an amplitude that will switch the transistor rapidly.
Source record↗
Transistorized trigger circuit is frequency- controllable
A trigger circuit employing two unijunction transistor oscillators, whose frequency is varied by changing the base-to-base voltage, provides variable electrical control of the frequency.
Moore, E. T.↗
Linear sawtooth voltage-wave generator employing transistor timing circuit having capacitor-zener diode combination feedback Patent
Linear sawtooth voltage wave generator with transistor timing circuit having capacitor and zener diode feedback loops
Green, E. D.↗
An assembly of transistorized multivibrator circuits
Circuit design and performance of transistorized multivibrator
Goltvinskaya, G. S.↗
Improved chopper circuit uses parallel transistors
Parallel transistor chopper circuit operates with one transistor in the forward mode and the other in the inverse mode. By using this method, it acts as a single, symmetrical, bidirectional transistor, and reduces and stabilizes the offset voltage.
Source record↗
Total Dose Effects on Single Event Transients in Digital CMOS and Linear Bipolar Circuits
This presentation discusses the effects of ionizing radiation on single event transients (SETs) in circuits. The exposure of integrated circuits to ionizing radiation changes electrical parameters. The total ionizing dose effect is observed in both complementary metal-oxide-semiconductor (CMOS) and bipolar circuits. In bipolar circuits, transistors exhibit grain degradation, while in CMOS circuits, transistors exhibit threshold voltage shifts. Changes in electrical parameters can cause changes in single event upset(SEU)/SET rates. Depending on the effect, the rates may increase or decrease. Therefore, measures taken for SEU/SET mitigation might work at the beginning of a mission but not at the end following TID exposure. The effect of TID on SET rates should be considered if SETs cannot be tolerated.
Buchner, S.↗