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At least 19 records

Cryogenic Preamplification of a Single-Electron-Transistor using a Silicon-Germanium Heterojunction-Bipolar-Transistor

We examine a silicon-germanium heterojunction bipolar transistor (HBT) for cryogenic pre-amplification of a single electron transistor (SET). The SET current modulates the base current of the HBT directly. The HBT-SET circuit is immersed in liquid helium, and its frequency response from low frequency to several MHz is measured. The current gain and the noise spectrum with the HBT result in a signal-to-noise-ratio (SNR) that is a factor of 10–100 larger than without the HBT at lower frequencies. Furthermore, the transition frequency defined by SNR = 1 has been extended by as much as a factor of 10 compared to without the HBT amplification. The power dissipated by the HBT cryogenic pre-amplifier is approximately 5 nW to 5 μW for the investigated range of operation. We found that the circuit is also operated in a single electron charge read-out configuration in the time-domain as a proof-of-principle demonstration of the amplification approach for single spin read-out.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Design and Modeling of the Charge Readout of a SiMOS Quantum Dot with a Single Electron Transistor and CryoCMOS

Single electron spin qubits trapped in SiMOS quantum dots are a promising technology for scaling to thousand- or million-qubit systems due to their compatibility with mature CMOS manufacturing processes. A readout system that combines a single electron transistor with a custom cryogenic CMOS amplification and digitization chain offers key advantages by avoiding the use of bulky RF components or room-temperature interconnects. We present design techniques and simulation results for an optimized qubit-SET cryoCMOS interface, culminating in the design of the QNDR1 ASIC, the first cryogenic readout ASIC designed under the Quandarum project, which targets the development of a many-channel spin qubit based detector for use in high energy physics.

Quinn, Adam [Fermilab] (ORCID:0009000605056371)↗

Fabrication and single-electron-transfer operation of a triple-dot single-electron transistor

A triple-dot single-electron transistor was fabricated on silicon-on-insulator wafer using pattern-dependent oxidation. A specially designed one-dimensional silicon wire having small constrictions at both ends was converted to a triple-dot single-electron transistor by means of pattern-dependent oxidation. The fabrication of the center dot involved quantum size effects and stress-induced band gap reduction, whereas that of the two side dots involved thickness modulation because of the complex edge structure of two-dimensional silicon. Single-electron turnstile operation was confirmed at 8 K when a 100-mV, 1-MHz square wave was applied. Monte Carlo simulations indicated that such a device with inhomogeneous tunnel and gate capacitances can exhibit single-electron transfer.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Three-terminal graphene single-electron transistor fabricated using feedback-controlled electroburning

We report room-temperature Coulomb blockade in a single layer graphene three-terminal single-electron transistor fabricated using feedback-controlled electroburning. The small separation between the side gate electrode and the graphene quantum dot results in a gate coupling up to 3 times larger compared to the value found for the back gate electrode. This allows for an effective tuning between the conductive and Coulomb blocked state using a small side gate voltage of about 1 V. The technique can potentially be used in the future to fabricate all-graphene based room temperature single-electron transistors or three terminal single molecule transistors with enhanced gate coupling.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Chemically assembled double-dot single-electron transistor analyzed by the orthodox model considering offset charge

We present the analysis of chemically assembled double-dot single-electron transistors using orthodox model considering offset charges. First, we fabricate chemically assembled single-electron transistors (SETs) consisting of two Au nanoparticles between electroless Au-plated nanogap electrodes. Then, extraordinary stable Coulomb diamonds in the double-dot SETs are analyzed using the orthodox model, by considering offset charges on the respective quantum dots. We determine the equivalent circuit parameters from Coulomb diamonds and drain current vs. drain voltage curves of the SETs. The accuracies of the capacitances and offset charges on the quantum dots are within ±10%, and ±0.04e (where e is the elementary charge), respectively. The parameters can be explained by the geometrical structures of the SETs observed using scanning electron microscopy images. Using this approach, we are able to understand the spatial characteristics of the double quantum dots, such as the relative distance from the gate electrode and the conditions for adsorption between the nanogap electrodes.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

In situ electrical characterization of palladium-based single electron transistors made by electromigration technique

We report the fabrication of single electron transistors (SETs) by feedback-controlled electromigration of palladium and palladium-nickel alloy nanowires. We have optimized a gradual electromigration process for obtaining devices consisting of three terminals (source, drain and gate electrodes), which are capacitively coupled to a metallic cluster of nanometric dimensions. This metal nanocluster forms into the inter-electrode channel during the electromigration process and constitutes the active element of each device, acting as a quantum dot that rules the electron flow between source and drain electrodes. The charge transport of the as-fabricated devices shows Coulomb blockade characteristics and the source to drain conductance can be modulated by electrostatic gating. We have thus achieved the fabrication and in situ measurement of palladium-based SETs inside a liquid helium cryostat chamber.

36 MATERIALS SCIENCE↗

Atomic layer deposition of Al{sub 2}O{sub 3} for single electron transistors utilizing Pt oxidation and reduction

This work describes the fabrication of single electron transistors using electron beam lithography and atomic layer deposition to form nanoscale tunnel transparent junctions of alumina (Al{sub 2}O{sub 3}) on platinum nanowires using either water or ozone as the oxygen precursor and trimethylaluminum as the aluminum precursor. Using room temperature, low frequency conductance measurements between the source and drain, it was found that devices fabricated using water had higher conductance than devices fabricated with ozone. Subsequent annealing caused both water- and ozone-based devices to increase in conductance by more than 2 orders of magnitude. Furthermore, comparison of devices at low temperatures (∼4 K) showed that annealed devices displayed much closer to the ideal behavior (i.e., constant differential conductance) outside of the Coulomb blockade region and that untreated devices showed nonlinear behavior outside of the Coulomb blockade region (i.e., an increase in differential conductance with source-drain voltage bias). Transmission electron microscopy cross-sectional images showed that annealing did not significantly change device geometry, but energy dispersive x-ray spectroscopy showed an unusually large amount of oxygen in the bottom platinum layer. This suggests that the atomic layer deposition process results in the formation of a thin platinum surface oxide, which either decomposes or is reduced during the anneal step, resulting in a tunnel barrier without the in-series native oxide contribution. Furthermore, the difference between ozone- and water-based devices suggests that ozone promotes atomic layer deposition nucleation by oxidizing the surface but that water relies on physisorption of the precursors. To test this theory, devices were exposed to forming gas at room temperature, which also reduces platinum oxide, and a decrease in resistance was observed, as expected.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

A single electron transistor charge sensor in strong rf fields

We measure the charge sensitivity, S e , of a single electron transistor (SET) in the presence of strong (V rf ~ e/C g ) spurious radio frequency (rf) signals at frequencies up to 50 MHz, where C g is the gate capacitance. Although S e appears to degrade when exposed to V rf , we find that broadening of conduction peaks is largely due to the measurement technique and show that S e is maintained even with strong V rf present. We show cancellation of a known V rf signal at 1 MHz, demonstrating that a stable bias point in the presence of rf signals is possible.

47 OTHER INSTRUMENTATION↗

Single electron transistor: Energy-level broadening effect and thermionic contribution

In this paper, a theoretical study of single electron transistor (SET) based on silicon quantum dot (Si–QD) has been studied. We have used a novel approach based on the orthodox theory. We studied the energy–level broadening effect on the performance of the SET, where the tunnel resistance depends on the discrete energy. We have investigated the I–V curves, taking into account the effects of the energy-level broadening, temperature and bias voltage. The presence of Coulomb blockade phenomena and its role to obtain the negative differential resistance (NDR) have been also outlined.

36 MATERIALS SCIENCE↗

Intrinsic magnetic refrigeration of a single electron transistor

In this work, we show that aluminium doped with low concentrations of magnetic impurities can be used to fabricate quantum devices with intrinsic cooling capabilities. We fabricate single electron transistors made of aluminium doped with 2% Mn by using a standard multi angle evaporation technique and show that the quantity of metal used to fabricate the devices generates enough cooling power to achieve a drop of 160 mK in the electron temperature at the base temperature of our cryostat (300 mK). The cooling mechanism is based on the magneto-caloric effect from the diluted Mn moments.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Direct detection of a transport-blocking trap in a nanoscaled silicon single-electron transistor by radio-frequency reflectometry

The continuous downscaling of transistors results in nanoscale devices which require fewer and fewer charged carriers for their operation. The ultimate charge controlled device, the single-electron transistor (SET), controls the transfer of individual electrons. It is also the most sensitive electrometer, and as a result the electron transport through it can be dramatically affected by nearby charges. Standard direct-current characterization techniques, however, are often unable to unambiguously detect and resolve the origin of the observed changes in SET behavior arising from changes in the charge state of a capacitively coupled trap. Using a radio-frequency (RF) reflectometry technique, we are able to unequivocally detect this process, in very close agreement with modeling of the trap's occupation probability.

77 NANOSCIENCE AND NANOTECHNOLOGY↗

Experimental demonstration of single electron transistors featuring SiO{sub 2} plasma-enhanced atomic layer deposition in Ni-SiO{sub 2}-Ni tunnel junctions

The authors report the use of plasma-enhanced atomic layer deposition (PEALD) to fabricate single-electron transistors (SETs) featuring ultrathin (≈1 nm) tunnel-transparent SiO{sub 2} in Ni-SiO{sub 2}-Ni tunnel junctions. They show that, as a result of the O{sub 2} plasma steps in PEALD of SiO{sub 2}, the top surface of the underlying Ni electrode is oxidized. Additionally, the bottom surface of the upper Ni layer is also oxidized where it is in contact with the deposited SiO{sub 2}, most likely as a result of oxygen-containing species on the surface of the SiO{sub 2}. Due to the presence of these surface parasitic layers of NiO, which exhibit features typical of thermally activated transport, the resistance of Ni-SiO{sub 2}-Ni tunnel junctions is drastically increased. Moreover, the transport mechanism is changed from quantum tunneling through the dielectric barrier to one consistent with thermally activated resistors in series with tunnel junctions. The reduction of NiO to Ni is therefore required to restore the metal-insulator-metal (MIM) structure of the junctions. Rapid thermal annealing in a forming gas ambient at elevated temperatures is presented as a technique to reduce both parasitic oxide layers. This method is of great interest for devices that rely on MIM tunnel junctions with ultrathin barriers. Using this technique, the authors successfully fabricated MIM SETs with minimal trace of parasitic NiO component. They demonstrate that the properties of the tunnel barrier in nanoscale tunnel junctions (with <10{sup −15} m{sup 2} in area) can be evaluated by electrical characterization of SETs.

42 ENGINEERING↗

Back-action-induced excitation of electrons in a silicon quantum dot with a single-electron transistor charge sensor

Back-action in the readout of quantum bits is an area that requires a great deal of attention in electron spin based-quantum bit architecture. We report here back-action measurements in a silicon device with quantum dots and a single-electron transistor (SET) charge sensor. We observe the back-action-induced excitation of electrons from the ground state to an excited state in a quantum dot. Our measurements and theoretical fitting to the data reveal conditions under which both suitable SET charge sensor sensitivity for qubit readout and low back-action-induced transition rates (less than 1 kHz) can be achieved.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Atom–by–Atom Fabrication of Single and Few Dopant Quantum Devices

Atomically precise fabrication has an important role to play in developing atom-based electronic devices for use in quantum information processing, quantum materials research, and quantum sensing. Atom-by-atom fabrication has the potential to enable precise control over tunnel coupling, exchange coupling, on-site charging energies, and other key properties of basic devices needed for solid-state quantum computing and analog quantum simulation. Using hydrogen-based scanning probe lithography, individual dopant atoms are deterministically placed relative to atomically aligned contacts and gates to build single electron transistors, single atom transistors, and gate-controlled quantum sensing devices. Here, the key steps required to fabricate and demonstrate the essential building blocks needed for spin selective initialization/readout and coherent quantum manipulation are described.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Single-electron tunneling by using a two-dimensional Corbino nano-scale disk

We investigate a single-electron tunneling effect of two-dimensional electron systems formed in the Corbino nano-scale disk. By controlling bias and gate voltages, the transistor using this effect is able to control electrons one by one. The present study focuses on the electronic transmission probability affected by the charging energy in the Corbino-type single-electron transistor. We reformulated the Schrödinger equation for an electron in the Corbino disk in order to consider the effect of the curvature of the disk, taking into account the charging effect on the performance of the Corbino-type single-electron transistor. We formulated the transmission probability of the electron by applying the Wentzel-Kramers-Brillouin (WKB) method. The electron’s energy in the formula of the transmission probability is then associated to the energy eigenvalue of the Schrödinger equation for an electron in an effective confining potential. We numerically solved the Schrödinger equation to evaluate the transmission probability. Our results show that the transmission probability strongly depends on the charging energy stored in the Corbino disk depending on its size.

77 NANOSCIENCE AND NANOTECHNOLOGY↗

Quantum dot ternary-valued full-adder: Logic synthesis by a multiobjective design optimization based on a genetic algorithm

A methodology is proposed for designing a low-energy consuming ternary-valued full adder based on a quantum dot (QD) electrostatically coupled with a single electron transistor operating as a charge sensor. The methodology is based on design optimization: the values of the physical parameters of the system required for implementing the logic operations are optimized using a multiobjective genetic algorithm. The searching space is determined by elements of the capacitance matrix describing the electrostatic couplings in the entire device. The objective functions are defined as the maximal absolute error over actual device logic outputs relative to the ideal truth tables for the sum and the carry-out in base 3. The logic units are implemented on the same device: a single dual-gate quantum dot and a charge sensor. Their physical parameters are optimized to compute either the sum or the carry out outputs and are compatible with current experimental capabilities. The outputs are encoded in the value of the electric current passing through the charge sensor, while the logic inputs are supplied by the voltage levels on the two gate electrodes attached to the QD. The complex logic ternary operations are directly implemented on an extremely simple device, characterized by small sizes and low-energy consumption compared to devices based on switching single-electron transistors. The design methodology is general and provides a rational approach for realizing non-switching logic operations on QD devices.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗