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Serial Back-Plane Technologies in Advanced Avionics Architectures

Current back plane technologies such as VME, and current personal computer back planes such as PCI, are shared bus systems that can exhibit nondeterministic latencies. This means a card can take control of the bus and use resources indefinitely affecting the ability of other cards in the back plane to acquire the bus. This provides a real hit on the reliability of the system. Additionally, these parallel busses only have bandwidths in the 100s of megahertz range and EMI and noise effects get worse the higher the bandwidth goes. To provide scalable, fault-tolerant, advanced computing systems, more applicable to today s connected computing environment and to better meet the needs of future requirements for advanced space instruments and vehicles, serial back-plane technologies should be implemented in advanced avionics architectures. Serial backplane technologies eliminate the problem of one card getting the bus and never relinquishing it, or one minor problem on the backplane bringing the whole system down. Being serial instead of parallel improves the reliability by reducing many of the signal integrity issues associated with parallel back planes and thus significantly improves reliability. The increased speeds associated with a serial backplane are an added bonus.

Varnavas, Kosta

Two Modules Of A Fly-By-Light System

Proposed fly-by-light/power-by-wire control system for commercial aircraft designed on basis of fault-tolerant transmission of digital control data along fiber-optic paths. Important novel features of system embodied in two modules. Redundancy-management unit (RMU) performs fault-tolerance functions. Fiber-optic serial backplane (FOSB) is high-speed fault-tolerant time-division-multiplex data bus with fiber-optic transmission.

Palumbo, Daniel L.

Implementation of a Multichannel Serial Data Streaming Algorithm using the Xilinx Serial RapidIO Solution

In the current world of applications that use reconfigurable technology implemented on field programmable gate arrays (FPGAs), there is a need for flexible architectures that can grow as the systems evolve. A project has limited resources and a fixed set of requirements that development efforts are tasked to meet. Designers must develop robust solutions that practically meet the current customer demands and also have the ability to grow for future performance. This paper describes the development of a high speed serial data streaming algorithm that allows for transmission of multiple data channels over a single serial link. The technique has the ability to change to meet new applications developed for future design considerations. This approach uses the Xilinx Serial RapidIO LOGICORE Solution to implement a flexible infrastructure to meet the current project requirements with the ability to adapt future system designs.

RapidIO

A low maintenance and highly reliable fly-by-light architecture

This paper proposes a highly reliable distributed architecture for use in a commercial transport. Fly-By-Light characteristics of the architecture are a serial fiber optic backplane and redundant fiber optic data bus. The fiber optic bus is fault tolerant and Byzantine resilient. A distributed architecture (both physically and logically) can be realized by utilizing several processing clusters on the data bus. A processing cluster is composed of one or more processing units. The processing units consist of several modules. The modules of the processing unit are connected via a serial fiber optic backplane. Fault tolerance is implemented at the backplane to increase reliability and availability.

Dan Palumbo

Radiation-Tolerant, SpaceWire-Compatible Switching Fabric

Current and future near-Earth and deep space exploration programs and space defense programs require the development of robust intra-spacecraft serial data transfer electronics that must be reconfigurable, fault-tolerant, and have the ability to operate effectively for long periods of time in harsh environmental conditions. Existing data transfer systems based on state-of-the-art serial data transfer protocols or passive backplanes are slow, power-hungry, and poorly reconfigurable. They provide limited expandability and poor tolerance to radiation effects and total ionizing dose (TID) in particular, which presents harmful threats to modern submicron electronics. This novel approach is based on a standard library of differential cells tolerant to TID, and patented, multi-level serial interface architecture that ensures the reliable operation of serial interconnects without application of a data-strobe or other encoding techniques. This proprietary, high-speed differential interface presents a lowpower solution fully compatible with the SpaceWire (SW) protocol. It replaces a dual data-strobe link with two identical independent data channels, thus improving the system s tolerance to harsh environments through additional double redundancy. Each channel incorporates an automatic line integrity control circuitry that delivers error signals in case of broken or shorted lines.

Katzman, Vladimir

Transportable telemetry workstation

The goal was to complete the design of a prototype for a Transportable Telemetry Workstation (TTW). The Macintosh 2 is used to provide a low-cost system which can house real-time cards mounted on the NuBus inside the Macintosh 2 plus provide a standardized user interface on the Macintosh 2 console. Prior to a telemetry run, the user will be able to configure his real-time telemetry processing functions from the Macintosh 2 console. During a telemetry run, the real-time cards will store the telemetry data directly on a hard disk while permitting viewing of the data cards on the Macintosh 2 console on various selectable formats. The user will view the cards in terms of the functions they perform and the selectable paths through the cards, it is not required to become involved directly in hardware issue except in terms of the functional configuration of the system components. The TTW will accept telemetry data from an RS422 serial input data bus, pass it through a frame synchronizer card and on to a real time controller card via a telemetry backplane bus. The controller card will then route the data to a hard disk through a SCSI interface, and/or to a user interface on the Macintosh 2 console by way of the Macintosh 2 NuBus. The three major components to be designed, therefore, are the TTW Controller Card, the TTW Synchronizer Card, and the NuBus/Macintosh 2 User Interface. Design and prototyping of this state-of-the-art, transportable, low-cost, easy-to-use multiprocessor telemetry system is continuing. Other functions are planned for the future.

Collins, Aaron S.

Optical backplane interconnect switch for data processors and computers

An optoelectronic integrated device design is reported which can be used to implement an all-optical backplane interconnect switch. The switch is sized to accommodate an array of processors and memories suitable for direct replacement into the basic avionic multiprocessor backplane. The optical backplane interconnect switch is also suitable for direct replacement of the PI bus traffic switch and at the same time, suitable for supporting pipelining of the processor and memory. The 32 bidirectional switchable interconnects are configured with broadcast capability for controls, reconfiguration, and messages. The approach described here can handle a serial interconnection of data processors or a line-to-link interconnection of data processors. An optical fiber demonstration of this approach is presented.

Hendricks, Herbert D.

Lunar Reconnaissance Orbiter (LRO) Command and Data Handling Flight Electronics Subsystem

A document describes a high-performance, modular, and state-of-the-art Command and Data Handling (C&DH) system developed for use on the Lunar Reconnaissance Orbiter (LRO) mission. This system implements a complete hardware C&DH subsystem in a single chassis enclosure that includes a processor card, 48 Gbytes of solid-state recorder memory, data buses including MIL-STD-1553B, custom RS-422, SpaceWire, analog collection, switched power services, and interfaces to the Ka-Band and S-Band RF communications systems. The C&DH team capitalized on extensive experience with hardware and software with PCI bus design, SpaceWire networking, Actel FPGA design, digital flight design techniques, and the use of VxWorks for the real-time operating system. The resulting hardware architecture was implemented to meet the LRO mission requirements. The C&DH comprises an enclosure, a backplane, a low-voltage power converter, a single-board computer, a communications interface board, four data storage boards, a housekeeping and digital input/output board, and an analog data acquisition board. The interfaces between the C&DH and the instruments and avionics are connected through a SpaceWire network, a MIL-STD-1553 bus, and a combination of synchronous and asynchronous serial data transfers over RS-422 and LVDS (low-voltage differential-signaling) electrical interfaces. The C&DH acts as the spacecraft data system with an instrument data manager providing all software and internal bus scheduling, ingestion of science data, distribution of commands, and performing science operations in real time.

Nguyen, Quang

Advanced Three-Dimensional Display System

A desktop-scale, computer-controlled display system, initially developed for NASA and now known as the VolumeViewer(TradeMark), generates three-dimensional (3D) images of 3D objects in a display volume. This system differs fundamentally from stereoscopic and holographic display systems: The images generated by this system are truly 3D in that they can be viewed from almost any angle, without the aid of special eyeglasses. It is possible to walk around the system while gazing at its display volume to see a displayed object from a changing perspective, and multiple observers standing at different positions around the display can view the object simultaneously from their individual perspectives, as though the displayed object were a real 3D object. At the time of writing this article, only partial information on the design and principle of operation of the system was available. It is known that the system includes a high-speed, silicon-backplane, ferroelectric-liquid-crystal spatial light modulator (SLM), multiple high-power lasers for projecting images in multiple colors, a rotating helix that serves as a moving screen for displaying voxels [volume cells or volume elements, in analogy to pixels (picture cells or picture elements) in two-dimensional (2D) images], and a host computer. The rotating helix and its motor drive are the only moving parts. Under control by the host computer, a stream of 2D image patterns is generated on the SLM and projected through optics onto the surface of the rotating helix. The system utilizes a parallel pixel/voxel-addressing scheme: All the pixels of the 2D pattern on the SLM are addressed simultaneously by laser beams. This parallel addressing scheme overcomes the difficulty of achieving both high resolution and a high frame rate in a raster scanning or serial addressing scheme. It has been reported that the structure of the system is simple and easy to build, that the optical design and alignment are not difficult, and that the system can be built by use of commercial off-the-shelf products. A prototype of the system displays an image of 1,024 by 768 by 170 (=133,693,440) voxels. In future designs, the resolution could be increased. The maximum number of voxels that can be generated depends upon the spatial resolution of SLM and the speed of rotation of the helix. For example, one could use an available SLM that has 1,024 by 1,024 pixels. Incidentally, this SLM is capable of operation at a switching speed of 300,000 frames per second. Implementation of full-color displays in future versions of the system would be straightforward: One could use three SLMs for red, green, and blue, respectively, and the colors of the voxels could be automatically controlled. An optically simpler alternative would be to use a single red/green/ blue light projector and synchronize the projection of each color with the generation of patterns for that color on a single SLM.

Geng, Jason