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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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9 records
All sourcesNASA NTRSDOE OSTI
DOE OSTI2023

An experimental and computational analysis of combustion heat release transformation in dual fuel combustion

Dual fuel (DF) diesel-methane combustion, which employs a high-reactivity fuel (diesel) to ignite a low-reactivity fuel (methane), is a widely studied combustion strategy for internal combustion engines, with significant potential for engine-out emissions reductions without the need for major hardware modifications. A phenomenon, which has been reported in the DF literature, but not explained fully, is the transformation of the shape of the apparent heat release rate (AHRR) curve as the start of injection (SOI) of diesel is advanced beyond a certain threshold; coincidentally, this AHRR transformation is usually accompanied by a sharp decrease in engine-out emissions of oxides of nitrogen (NOx). The goal of the present work is to establish the underlying physical reason(s) that cause the AHRR transformation. The AHRR transformation was observed on a single cylinder research engine (SCRE) at an indicated mean effective pressure (IMEP) of 5 bar at a speed of 1500 rev/min. The transformation occurred over a range of SOIs from 330 to 320 crank angle degrees (CAD). While the 330 CAD SOI exhibited a typical two-stage AHRR curve, with a clearly definable first-stage peak followed by a second-stage AHRR with little-to-no low temperature heat release (LTHR) present and high engine-out NOx, the 320 CAD SOI exhibited a single-stage, Gaussian-like AHRR curve, with noticeable LTHR and at least one order-of-magnitude lower NOx emissions. Here, leveraging analysis of experimental data and three-dimensional computational fluid dynamic simulations, the authors show that the AHRR transformation is impacted mainly by differences in local equivalence ratio distributions within the cylinder at ignition onset for different diesel SOIs.

33 ADVANCED PROPULSION SYSTEMS↗
DOE OSTI2021

Impact of low reactivity fuel type on low load combustion, emissions, and cyclic variations of diesel-ignited dual fuel combustion

In this study, cyclic variations in dual fuel combustion with diesel ignition of three different low reactivity fuels (methane, propane, and gasoline) are examined under identical operating conditions. Experiments were performed on a single cylinder research engine (SCRE) at a low load of 3.3 bar brake mean effective pressure (BMEP). The start of injection (SOI) of diesel was varied from 280 to 330 absolute crank angle degrees (CAD). Engine speed, rail pressure, and boost pressure were held constant at 1500 rpm, 500 bar, and 1.5 bar, respectively. The energy substituted by the low reactivity fuel was fixed at 80% of the total energy input. It was found that diesel-methane (DM) and diesel-propane (DP) combustion were affected by diesel mixing to a greater extent than diesel-gasoline (DG) combustion due to the higher reactivity of gasoline. The magnitude of low temperature heat release was greatest for DG combustion followed by DM and DP combustion for all SOIs. The ignition delay for DG combustion was the shortest, followed by DM and DP combustion. DM and DP combustion exhibited more cyclic variations than DG combustion. Cyclic variations decreased for DM and DP combustion when SOI was advanced; however, DG combustion cyclic variations remained essentially constant for all SOIs. Earlier SOIs (280, 290, 300, and 310 CAD) for DM and (280, 290, and 300 CAD) for DP combustion indicated some prior-cycle effects on the combustion and IMEP (i.e. some level of determinism).

Engineering↗
DOE OSTI2023

Hierarchical multi-time-scale predictive thermal management and fuel optimization for heavy-duty compression ignition engines

For heavy-duty diesel engines, NO X emissions reduction is strongly constrained by fuel efficiency. This paper presents a hierarchical model predictive controller (H-MPC) for coordinated control of tailpipe NO X emissions and fuel consumption. The H-MPC uses the separation of slow and fast dynamics that exist in the engine and its aftertreatment system. The controller is synthesized with an architecture in which a high-level MPC uses a longer prediction horizon compared to the low-level predictive controller which tracks the high-level controller command and manages the thermal dynamics of the aftertreatment system. Engine load preview enables the high-level controller to estimate the desired catalyst temperature ahead of time and addresses the selective catalytic reduction (SCR) slow thermal dynamics. Calculated by the high-level controller, the intake manifold pressure, and the start of injection (SOI) crank angle is used as reference trajectories in the low-level controller that regulates fast dynamical behaviors such as engine out NO X emissions. Hardware-in-the-loop (HIL) validation of this integrated H-MPC on a rapid prototype controller shows that when the SCR catalyst temperature is above light-off temperature (warmed-up condition), the engine operation is shifted to operate with the best fuel economy since the warmed-up SCR can efficiently reduce the engine-out NO X emissions. Results indicate that up to 0.8% benefit in cycle averaged BSFC along with a 13% reduction in tailpipe NO X compared to a stock engine calibration can be achieved with the coordinated engine and aftertreatment system through H-MPC.

Engineering↗
DOE OSTI2025

A sub-5 ps jitter time-to-digital converter ASIC with back-gate delay tuning in 22 nm CMOS

We present the design of a Time-to-Digital Converter (TDC) ASIC together with performance characterization results at cryogenic temperature (6-8 K), and at room temperature using emulated Low-Gain Avalanche Detector (LGAD) signals. The TDC design uses a two-step architecture with a ring-oscillator based counter and a Vernier delay line fine TDC. The TDC is implemented in an FD-SOI process, and back-gate tuning is used not only to correct threshold variation due to cryogenic operation, but also as a novel way to tune TDC delay elements with very little overhead. Using this technique, we demonstrate a design with very low power (0.5 mW) and area (0.003 mm 2 ). We present test results using the Fermilab Constant Fraction Discriminator (FCFD) ASIC to produce discriminated signals from an internal charge injection mechanism that mimics the waveform and signal amplitude of minimum ionizing particles impinging on LGAD sensors. We characterize the time precision of the full system and verify that the TDC ASIC contributes a negligible amount to the total system time precision, fully consistent with the expected jitter contribution of less than 5 ps. In conclusion, the results presented here demonstrate the utility of our TDC for applications in physics and quantum communications.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2023

A 0.2–2 GHz Time-Interleaved Multistage Switched-Capacitor Delay Element Achieving 2.55–448.6 ns Programmable Delay Range and 330 ns/mm 2 Area Efficiency

Simulation of radar returns, full-duplex systems, and signal repeaters require hundreds of ns of programmable broadband radio frequency (RF) delay in the signal path to simulate large distances in the case of radar returns, for signal cancellation in full-duplex, and for isolation from reflections in signal repeaters. However, programmable broadband RF delay has been limited to ones of ns due to challenges in miniaturization with low loss and low power consumption. In this work, we present a 0.2–2 GHz digitally programmable RF delay element based on a time-interleaved multistage switched-capacitor (TIMS-SC) approach. The proposed approach enables hundreds of ns of broadband RF delay by employing sample time expansion in multiple stages of switched-capacitor storage elements. Further, the delay element was implemented in a 45 nm SOI CMOS process and achieves a 2.55–448.6 ns programmable delay range with < 0.12% delay variation across 1.8 GHz of bandwidth at maximum delay, 2.42 ns programmable delay steps, and 330 ns/mm 2 area efficiency. Through the proposed approach, the device shows minimal delay change across a -40 °C to 85 °C temperature range and < 0.25 dB gain variation across delay settings. The device achieves 26 dB gain, 7.4 dB noise figure, and consumes 74 mW from a 1 V supply with an active area of 1.36 mm 2 .

42 ENGINEERING↗
DOE OSTI2024

A 32-Channel Cryo-CMOS ASIC for SNSPD Biasing and Readout with Picosecond

Superconducting nanowire single-photon detectors (SNSPD) are a promising technology for particle detection. Although SNSPDs have demonstrated picosecond timing accuracy, scaling up large arrays has proved challenging. In this work, we introduce a 32-channel cryo-CMOS application-specific integrated circuit (ASIC) that can be tightly integrated with SNSPD arrays. The ASIC is designed to operate at a temperature of 4K and can perform up to 32 simultaneous timing measurements with a root-mean-square (RMS) accuracy of 8.0ps. The ASIC includes on-chip circuitry for externally biasing superconducting devices, low-noise amplifiers for reading superconducting devices, high-resolution time-to-digital converters (TDC) for time-tagging events, and serializers for transmitting data to room-temperature electronics. The ASIC is manufactured in a 22nm FDSOI process and occupies an area of 4.0mm x 1.0mm. The performance of the ASIC was verified using custom cryogenic device models internally developed for the 22nm SOI process. Measurement results will be presented at the conference.

Fredenburg, Jeff↗
DOE OSTI2024

A 32-Channel Cryo-CMOS ASIC for SNSPD Biasing and Readout with Picosecond Timing

Superconducting nanowire single-photon detectors (SNSPD) are a promising technology for particle detection. Although SNSPDs have demonstrated picosecond timing accuracy, scaling up large arrays has proved challenging. In this work, we introduce a 32-channel cryo-CMOS application-specifc integrated circuit (ASIC) that can be tightly integrated with SNSPD arrays. The ASIC is designed to operate at a temperature of 4K and can perform up to 32 simultaneous timing measurements with a root-mean-square (RMS) accuracy of 8.0ps. The ASIC includes on-chip circuitry for externally biasing superconducting devices, low-noise amplifers for reading superconducting devices, high-resolution time-to-digital converters (TDC) for time-tagging events, and serializers for transmitting data to room-temperature electronics. The ASIC is manufactured in a 22nm FDSOI process and occupies an area of 4.0mm x 1.0mm. The performance of the ASIC was verifed using custom cryogenic device models internally developed for the 22nm SOI process. Measurement results will be presented at the conference.

Fredenburg, Jeff↗
DOE OSTI2026

Cryogenic-Refined MOSFET Modeling for Oscillator, Frequency Divider, and Amplifier Designs Below 4 K

Capturing device characteristic changes at cryogenic temperatures is crucial for cryo-CMOS circuit designs. In this work, we present an isothermal cryogenic-refined modeling approach for CMOS transistors that is simple, low overhead, and easy to implement while offering the required accuracy for predicting circuit performance at the designated temperatures. Guided by die-level measurement data and circuit design principles, the model introduces corrections to only five critical parameters: threshold voltage, carrier mobility, elevated low-frequency flicker noise, dominant high-frequency shot noise, and subthreshold swing (SS). These refinements are implemented around the foundry-provided SPICE model, which is typically validated only down to about 200 K. With these adjustments, the proposed cryogenic-refined model achieves less than 5% error in both large-signal metrics (I–V characteristics) and small-signal parameters (e.g., transconductance) when compared with device measurements at deep-cryogenic temperatures. The methodology is validated in two advanced technologies: TSMC 40-nm CMOS and GlobalFoundries (GF) 45-nm RF-SOI. We further demonstrate its applicability in three representative RF circuits: a 30-GHz LC oscillator, a high-speed current-mode-logic (CML) frequency divider (FD), and a subthreshold Gb/s amplifier, all showing close agreement between simulated predictions and measurements performed at 4 and 2.5 K. Finally, we believe that the proposed approach is implementation-friendly and can significantly accelerate the development of cryo-CMOS integrated circuits.

circuit modeling↗
DOE OSTI2021

Exploring the Effects of Piston Bowl Geometry and Injector Included Angle on Dual-Fuel and Single-Fuel RCCI

Abstract Reactivity control compression ignition (RCCI) is a low-temperature combustion technique that has been proposed to meet the current demand for high thermal efficiency and low engine-out emissions. However, its requirement of two separate fuel systems (i.e., a low-reactivity fuel system and a high-reactivity fuel system) has been one of its major challenges in the last decade. This leads to the single-fuel RCCI concept, where the secondary fuel (reformates of diesel) is generated from the primary fuel (diesel) through catalytic partial oxidation reformation. Following the in-depth analysis of the reformate fuel (reformates of diesel) and its benefit as the low-reactivity fuel with diesel, the effects of the start of injection (SOI) timing of diesel and the energy-based blend ratio were also studied in detail. In this study, the effects of piston profile and the injector included angles were experimentally examined using both conventional fuel pairs (gasoline—diesel and natural gas—diesel) and reformate RCCI. A validated computational fluid dynamics (CFD) model was also used for a better understanding of the experimental trends. Comparing a reentrant bowl piston with a shallow bowl piston at a constant compression ratio and SOI, the latter showed better thermal efficiency, regardless of the fuel combination, due to its 10% lower surface area for the heat transfer. Comparing the 150-degree included angle and 60-degree included angle on the shallow bowl piston, the latter showed better combustion efficiency, regardless of the fuel combination, due to its earlier combustion phasing (at constant SOI timing). The effect was particularly prominent on reformate RCCI because of its incredibly high diluent concentration, which retards the combustion further for the 150-deg injector. Later, using convergecfd, seven different injector included angles were studied at a constant SOI. With the change in injector included angle, the region of the cylinder targeted by the fuel spray varies significantly, and it was found to have a significant impact on the combustion efficiency and the engine-out emissions. As the injector included angle changed from 60-deg to 150-deg, the combustion efficiency increased by 15% and the CO, NOx, and HC emissions decreased by 96%, 70%, and 86%, respectively.

Engineering↗