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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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All sourcesNASA NTRSDOE OSTI
NASA NTRS1978

Strobe-margin test for plated memory systems

Technique measures performance of plated-wire memories. Strobe-margin test (SMT) utilizes worst-case testing and automatically gives exact strobe margin. Test is automatic; thus, memory system-level test is superior to tests at component level that use artificial test conditions. Test is significant tool in design and test of plated-wire memory systems. It can rapidly quantify memory-system margin on each production unit and impact of any design changes.

Anspach, T. E.↗
NASA NTRS1999

International Low-Earth-Orbit Spacecraft Materials Test Program Initiated for Better Prediction of Durability and Performance

Spacecraft in low Earth orbit (LEO) are subjected to many components of the environment, which can cause them to degrade much more rapidly than intended and greatly shorten their functional life. The atomic oxygen, ultraviolet radiation, and cross contamination present in LEO can affect sensitive surfaces such as thermal control paints, multilayer insulation, solar array surfaces, and optical surfaces. The LEO Spacecraft Materials Test (LEO-SMT) program is being conducted to assess the effects of simulated LEO exposure on current spacecraft materials to increase understanding of LEO degradation processes as well as to enable the prediction of in-space performance and durability. Using ground-based simulation facilities to test the durability of materials currently flying in LEO will allow researchers to compare the degradation evidenced in the ground-based facilities with that evidenced on orbit. This will allow refinement of ground laboratory test systems and the development of algorithms to predict the durability and performance of new materials in LEO from ground test results. Accurate predictions based on ground tests could reduce development costs and increase reliability. The wide variety of national and international materials being tested represent materials being functionally used on spacecraft in LEO. The more varied the types of materials tested, the greater the probability that researchers will develop and validate predictive models for spacecraft long-term performance and durability. Organizations that are currently participating in the program are ITT Research Institute (USA), Lockheed Martin (USA), MAP (France), SOREQ Nuclear Research Center (Israel), TNO Institute of Applied Physics (The Netherlands), and UBE Industries, Ltd. (Japan). These represent some of the major suppliers of thermal control and sensor materials currently flying in LEO. The participants provide materials that are exposed to selected levels of atomic oxygen, vacuum ultraviolet radiation, contamination, or synergistic combined environments at the NASA Lewis Research Center. Changes in characteristics that could affect mission performance or lifetime are then measured. These characteristics include changes in mass, solar absorptance, and thermal emittance. The durability of spacecraft materials from U.S. suppliers is then compared with those of materials from other participating countries. Lewis will develop and validate performance and durability prediction models using this ground data and available space data. NASA welcomes the opportunity to consider additional international participants in this program, which should greatly aid future spacecraft designers as they select materials for LEO missions.

Rutledge, Sharon K.↗
NASA NTRS2018

Maximum Sample Temperature for Mars Sample Return: A Historical Perspective

Since the first Mars Sample Return (MSR) report published by the Jet Propulsion Laboratory (JPL) in 1974 [1], a series of panels, reports, and white papers have recognized the importance of sample temperature and offered an informed sample maximum temperature (henceforth SMT) limit for returning martian samples to Earth. The Mars Sample Handling and Requirements Panel (MSHARP, 1999) stated that "[t]he main issue in sample preservation is temperature" [2]. More recently, the Mars Exploration Program Analysis Group (MEPAG)'s "Science Priorities for Mars Sample Return" report (2008), declared that "[s]ignificant loss, particularly to biological studies, occurs if samples reach +50C for three hours", whereby "scientific objectives related to life goals could be seriously compromised" [3]. By contrast, the Mars 2020 mission has adopted a SMT of +60C as spelled out in Beaty et al., 2016 [4]. Samples will be collected and then deposited on the surface in sealed tubes for possible retrieval and return to Earth. Beaty et al. [4] calculates that the samples will experience maximum temperatures of ~+30 to +60C, depending on latitude. At present, there is no mission requirement for the measurement/data logging of sample temperature during this period. We will explore the history of martian SMTs, as they have been recorded since 1974 [1], effectively representing input across multiple generations of Mars scientists. Ten separate publications present SMTs for MSR samples [1-10]. One report [10] is for a mission concept specifically designed to exclude life detection investigations, and recommended an SMT of 50C. Another did not specify a temperature, recommending "Mars ambient temperature" [5]. Of the remaining eight, SMTs are given as: -30C [1], -20C [3], 60C [4], -73 to 41C depending on sample type [6], -40C [7], -43 to 13C depending on type [2,8], and -33C [9]. If we restrict the temperatures to samples highlighted in the Mars 2020 mission goals, i.e. organics-bearing and sedimentary rocks, then the average SMT is -28+/-39C (n=8). Applying a Dixon's Q Test at P=0.05 (two-tailed), the 60C SMT [4] fails with Q=0.602 versus Qcrit=0.526. Excluding the outlier produces an average SMT of -40+/-17C (n=7). Therefore, the average SMT expressed by the Mars science community over the past 44 years (two generations) is a sample temperature no greater than -40C. The difference in chemical reaction rates between this average SMT and Beaty et al [4] can be estimated using the Arrhenius equation. Assuming a generic chemical reaction with an activation energy of 50 kJ/mol and a pre-exponential factor invariant with temperature, this reaction will proceed 2300x faster at 60C than at -40C. To illustrate the effects of the increased reaction rate, consider 10 ppb of alanine in a Mars 2020 cache, and assume that it becomes unmeasurable if it degrades to 1 ppb, as per the Mars 2020 Organic Contamination Panel contamination limits [11]. If we illustrate the effect with an arbitrary degradation rate such that the alanine will become undetectable in ten years at -40C, then the same 10 ppb alanine degrades beyond detectability in only 38 days at 60C. Further research is required to quantify expected analyte losses in the cached samples due to thermal processing.

Fries, Marc↗
NASA NTRS1993

TAB interconnects for space concentrator solar cell arrays

The Boeing Company has evaluated the use of Tape Automated Bonding (TAB) and Surface Mount Technology (SMT) for a highly reliable, low cost interconnect for concentrator solar cell arrays. TAB and SMT are currently used in the electronics industry for chip interconnects and printed circuit board assembly. TAB tape consists of sixty-four 3-mil/1-oz tin-plated copper leads on 8-mil centers. The leads are thermocompression gang bonded to GaAs concentrator solar cell with silver contacts. This bond, known as an Inner Lead Bond (ILB), allows for pretesting and sorting capability via nondestruct wire bond pull and flash testing. Destructive wire pull tests resulted in preferred mid-span failures. Improvements in fill factor were attributed to decreased contact resistance on TAB bonded cells. Preliminary thermal cycling and aging tests were shown excellent bond strength and metallurgical results. Auger scans of bond sites reveals an Ag-Cu-Tin composition. Improper bonds are identified through flash testing as a performance degradation. On going testing of cells are underway at Lewis Research Center. SMT techniques are utilized to excise and form TAB leads post ILB. The formed leads' shape isolates thermal mismatches between the cells and the flex circuit they are mounted on. TABed cells are picked and placed with a gantry x-y-z positioning system with pattern recognition. Adhesives are selected to avoid thermal expansion mismatch and promote thermal transfer to the flex circuit. TAB outer lead bonds are parallel gap welded (PGW) to the flex circuit to finish the concentrator solar cell subassembly.

Avery, J.↗
NASA NTRS1996

Quality and Reliability of BGA and SMT Components

Spacecraft electronics including those used at the Jet Propulsion Laboratory (JPL), demand production of highly reliable assemblies. More than 400 test vehicles were assembled using ceramic and plastic ball grid arrays (BGAs), LCCs, J-leads, and gull wing components.

BGA components SMT components BGA SMT spacecraft e↗
NASA NTRS2010

SimCheck: An Expressive Type System for Simulink

MATLAB Simulink is a member of a class of visual languages that are used for modeling and simulating physical and cyber-physical systems. A Simulink model consists of blocks with input and output ports connected using links that carry signals. We extend the type system of Simulink with annotations and dimensions/units associated with ports and links. These types can capture invariants on signals as well as relations between signals. We define a type-checker that checks the wellformedness of Simulink blocks with respect to these type annotations. The type checker generates proof obligations that are solved by SRI's Yices solver for satisfiability modulo theories (SMT). This translation can be used to detect type errors, demonstrate counterexamples, generate test cases, or prove the absence of type errors. Our work is an initial step toward the symbolic analysis of MATLAB Simulink models.

Roy, Pritam↗
NASA NTRS2016

Graphical Visualization of Human Exploration Capabilities

NASA's pioneering space strategy will require advanced capabilities to expand the boundaries of human exploration on the Journey to Mars (J2M). The Evolvable Mars Campaign (EMC) architecture serves as a framework to identify critical capabilities that need to be developed and tested in order to enable a range of human exploration destinations and missions. Agency-wide System Maturation Teams (SMT) are responsible for the maturation of these critical exploration capabilities and help formulate, guide and resolve performance gaps associated with the EMC-identified capabilities. Systems Capability Organization Reporting Engine boards (SCOREboards) were developed to integrate the SMT data sets into cohesive human exploration capability stories that can be used to promote dialog and communicate NASA's exploration investments. Each SCOREboard provides a graphical visualization of SMT capability development needs that enable exploration missions, and presents a comprehensive overview of data that outlines a roadmap of system maturation needs critical for the J2M. SCOREboards are generated by a computer program that extracts data from a main repository, sorts the data based on a tiered data reduction structure, and then plots the data according to specified user inputs. The ability to sort and plot varying data categories provides the flexibility to present specific SCOREboard capability roadmaps based on customer requests. This paper presents the development of the SCOREboard computer program and shows multiple complementary, yet different datasets through a unified format designed to facilitate comparison between datasets. Example SCOREboard capability roadmaps are presented followed by a discussion of how the roadmaps are used to: 1) communicate capability developments and readiness of systems for future missions, and 2) influence the definition of NASA's human exploration investment portfolio through capability-driven processes. The paper concludes with a description of planned future work to modify the computer program to include additional data and of alternate capability roadmap formats currently under consideration.

Rodgers, Erica M.↗
NASA NTRS2010

Advanced Flip Chips in Extreme Temperature Environments

The use of underfill materials is necessary with flip-chip interconnect technology to redistribute stresses due to mismatching coefficients of thermal expansion (CTEs) between dissimilar materials in the overall assembly. Underfills are formulated using organic polymers and possibly inorganic filler materials. There are a few ways to apply the underfills with flip-chip technology. Traditional capillary-flow underfill materials now possess high flow speed and reduced time to cure, but they still require additional processing steps beyond the typical surface-mount technology (SMT) assembly process. Studies were conducted using underfills in a temperature range of -190 to 85 C, which resulted in an increase of reliability by one to two orders of magnitude. Thermal shock of the flip-chip test articles was designed to induce failures at the interconnect sites (-40 to 100 C). The study on the reliability of flip chips using underfills in the extreme temperature region is of significant value for space applications. This technology is considered as an enabling technology for future space missions. Flip-chip interconnect technology is an advanced electrical interconnection approach where the silicon die or chip is electrically connected, face down, to the substrate by reflowing solder bumps on area-array metallized terminals on the die to matching footprints of solder-wettable pads on the chosen substrate. This advanced flip-chip interconnect technology will significantly improve the performance of high-speed systems, productivity enhancement over manual wire bonding, self-alignment during die joining, low lead inductances, and reduced need for attachment of precious metals. The use of commercially developed no-flow fluxing underfills provides a means of reducing the processing steps employed in the traditional capillary flow methods to enhance SMT compatibility. Reliability of flip chips may be significantly increased by matching/tailoring the CTEs of the substrate material and the silicon die or chip, and also the underfill materials. Advanced packaging interconnects technology such as flip-chip interconnect test boards have been subjected to various extreme temperature ranges that cover military specifications and extreme Mars and asteroid environments. The eventual goal of each process step and the entire process is to produce components with 100 percent interconnect and satisfy the reliability requirements. Underfill materials, in general, may possibly meet demanding end use requirements such as low warpage, low stress, fine pitch, high reliability, and high adhesion.

Ramesham, Rajeshuni↗
NASA NTRS2017

Thermal cycling testing to failure of a ceramic column grid array package for space applications

Ceramic column grid array (CCGA) packages have been used increasingly in logic and microprocessor functions, telecommunications, flight avionics boards, payload electronics boards, engineering navigational and science cameras, electronic assemblies, and other applications, because of their inherent advantages such as high electrical interconnect density, very good thermal and electrical performance, and compatibility with standard surface-mount technology (SMT) packaging assembly processes. Because these advanced electronic packages tend to have less solder-joint strain-relief than do leaded flat-pack electronic packages, the reliability of CCGA packages in challenging thermal environments is a very important consideration for their short- and long-term use in JPL-NASA space missions. In this study, we assembled daisy chains of polyimide printed wiring boards from CCGA-interconnect packages, inspected the boards nondestructively, and then subjected them to thermal cycling to assess their reliability in thermal environments from +125°C to -40°C±25°C. The test hardware consists of a CCGA 1752 package (CN version). The package was divided into four daisy-chained sections that were electrically monitored for their continuity during thermal cycling. The CCGA 1752 package is roughly 45 mm × 45 mm with a 42-mm × 42-mm array of 80%/20% Pb/Sn columns on a 1.00-mm pitch. The resistance of the daisy-chained CCGA interconnects was continuously monitored during thermal cycling in a gaseous nitrogen environment. Electrical continuity resistance measurements as a function of thermal cycling are reported here; tests to date have shown significant change to an open circuit in daisy-chain resistance as a function of thermal cycling. The change in interconnect resistance becomes increasingly noticeable with increasing number of thermal cycles. This paper describes the experimental thermal-cycling test results of CCGA 1752 package reliability testing under an extremely wide temperature range. The first failure was observed at 1479th thermal cycle. We report the thermal-cycle reliability test data for ~2500 thermal cycles.

Ramesham, Rajeshuni↗
NASA NTRS2019

Integrating Realizability Checking in FRET

Realizability (alternatively referred to as relative consistency or implementability) - checking whether a specification can be implemented by an open system - has been the subject of extensive study. Realizability can be viewed as a stronger analysis method when compared to consistency checking in that it does not only check whether the system works in some environment, but instead whether the system works in all environments. In this report, we experiment and build on the approach presented by Gacek et al. that supports checking realizability of contracts involving infinite theories using SMT solvers. In particular, we 1) extend the Formal Requirements Elicitation Tool (FRET) to support generation of Lustre contracts that can be checked for realizability with the JKind k-induction and fix point generation engines; 2) study a compositional way for checking realizability based on the notion of connected components; and 3) test our approach and the capabilities of the JKind realizability engines on a large subset of the Lockheed Martin Cyber Physical System Challenge Problems.

Kooi, David↗
NASA NTRS2017

High Density Packaging Technologies for RF Electronics in Small Spacecraft

This paper will describe a few high density packaging technologies which we are currently exploring for use in current and future small spacecraft applications. The three categories of technologies include organic multichip modules (MCMs), ceramic leadless surface mount technology (SMT) and 3D printed waveguide structures. There are many other packaging technologies that currently exist but these three were selected in part due to their long heritage in various commercial, military and space applications along with each having a relatively clear path to flight. For each of these technologies, detailed examples will be included in which hardware has been fabricated and tested for use in RF electronics for spacecraft transponders. The organic MCM example will be described in most detail and it utilizes a packaging technology by the name of CoreEZ which is a trademark of i3 Electronics. This MCM has shrunk a portion of our electronics down to 1/8th of its previous area. The CoreEZ technology has been shown to be rad hard beyond a total ionizing dose (TID) of 300kRad and the MCM which was fabricated has gone through thermal cycling and shown to have no degradation in performance. The ceramic leadless package examples include packages from high reliability manufactures by the name of KCB solutions and Barry Industries. In the case of KCB solutions, we have multiple products that will be described including a hermetic ceramic carrier which houses three microwave monolithic integrated circuits (MMICs) along with small discrete components. Finally, we will discuss the results of our search for a 3D printing process that allows us to reduce the cost and volume of our waveguide filters and diplexers for low cost small satellite applications. We have fabricated a few prototypes using direct metal laser sintering (DMLS) and metal coated plastics. Each of these packaging technology discussions will have a brief overview of its current and future use.

Aquirre, Fernando↗
NASA NTRS2016

High Density Packaging Technologies for RF Electronics in Small Spacecraft

This paper will describe a few high density packaging technologies which we are currently exploring for use in current and future small spacecraft applications. The three categories of technologies include organic multichip modules (MCMs), ceramic leadless surface mount technology (SMT) and 3D printed waveguide structures. There are many other packaging technologies that currently exist but these three were selected in part due to their long heritage in various commercial, military and space applications along with each having a relatively clear path to flight. For each of these technologies, detailed examples will be included in which hardware has been fabricated and tested for use in RF electronics for spacecraft transponders. The organic MCM example will be described in most detail and it utilizes a packaging technology by the name of CoreEZ which is a trademark of i3 Electronics. This MCM has shrunk a portion of our electronics down to 1/8th of its previous area. The CoreEZ technology has been shown to be rad hard beyond a total ionizing dose (TID) of 300kRad and the MCM which was fabricated has gone through thermal cycling and shown to have no degradation in performance. The ceramic leadless package examples include packages from high reliability manufactures by the name of KCB solutions and Barry Industries. In the case of KCB solutions, we have multiple products that will be described including a hermetic ceramic carrier which houses three microwave monolithic integrated circuits (MMICs) along with small discrete components. Finally, we will discuss the results of our search for a 3D printing process that allows us to reduce the cost and volume of our waveguide filters and diplexers for low cost small satellite applications. We have fabricated a few prototypes using direct metal laser sintering (DMLS) and metal coated plastics. Each of these packaging technology discussions will have a brief overview of its current and future use.

Schatzel, Donald↗
NASA NTRS2015

Johnson Space Center: Workmanship Training

Special processes require special skills, knowledge and experienced application. For over 15 years, the NASA Johnson Space Center's Receiving, Inspection and Test Facility (RITF) has provided Agency-wide NASA Workmanship Standards compliance training, issuing more than 500 to 800 training completion certificates annually. It is critical that technicians and inspectors are trained and that they maintain their proficiency to implement the applicable standards and specifications. Training services include "hands-on" training to engineers, technicians, and inspectors in the areas of electrostatic discharge (ESD), soldering, surface mount technology (SMT), crimping, conformal coating, and fiber-optic terminations.

Patterson, Ashley↗
NASA NTRS2015

Implementing NASA's Capability-Driven Approach: Insight into NASA's Processes for Maturing Exploration Systems

NASA is engaged in transforming human spaceflight. The Agency is shifting from an exploration-based program with human activities focused on low Earth orbit (LEO) and targeted robotic missions in deep space to a more sustainable and integrated pioneering approach. Through pioneering, NASA seeks to address national goals to develop the capacity for people to work, learn, operate, live, and thrive safely beyond the Earth for extended periods of time. However, pioneering space involves more than the daunting technical challenges of transportation, maintaining health, and enabling crew productivity for long durations in remote, hostile, and alien environments. This shift also requires a change in operating processes for NASA. The Agency can no longer afford to engineer systems for specific missions and destinations and instead must focus on common capabilities that enable a range of destinations and missions. NASA has codified a capability driven approach, which provides flexible guidance for the development and maturation of common capabilities necessary for human pioneers beyond LEO. This approach has been included in NASA policy and is captured in the Agency's strategic goals. It is currently being implemented across NASA's centers and programs. Throughout 2014, NASA engaged in an Agency-wide process to define and refine exploration-related capabilities and associated gaps, focusing only on those that are critical for human exploration beyond LEO. NASA identified 12 common capabilities ranging from Environmental Control and Life Support Systems to Robotics, and established Agency-wide teams or working groups comprised of subject matter experts that are responsible for the maturation of these exploration capabilities. These teams, called the System Maturation Teams (SMTs) help formulate, guide and resolve performance gaps associated with the identified exploration capabilities. The SMTs are defining performance parameters and goals for each of the 12 capabilities, developing maturation plans and roadmaps for the identified performance gaps, specifying the interfaces between the various capabilities, and ensuring that the capabilities mature and integrate to enable future pioneering missions. By managing system development through the SMTs instead of traditional NASA programs and projects, the Agency is shifting from mission-driven development to a more flexible, capability-driven development. The process NASA uses to establish, integrate, prioritize, and manage the SMTs and associated capabilities is iterative. NASA relies on the Human Exploration and Operation Mission Directorate's SMT Integration Team within Advanced Exploration Systems to coordinate and facilitate the SMT process. The SMT Integration team conducts regular reviews and coordination meetings among the SMTs and has developed a number of tools to help the Agency implement capability driven processes. The SMT Integration team is uniquely positioned to help the Agency coordinate the SMTs and other processes that are making the capability-driven approach a reality. This paper will introduce the SMTs and the 12 key capabilities they represent. The role of the SMTs will be discussed with respect to Agency-wide processes to shift from mission-focused exploration to a capability-driven pioneering approach. Specific examples will be given to highlight systems development and testing within the SMTs. These examples will also show how NASA is using current investments in the International Space Station and future investments to develop and demonstrate capabilities. The paper will conclude by describing next steps and a process for soliciting feedback from the space exploration community to refine NASA's process for developing common exploration capabilities.

Williams-Byrd, Julie↗
NASA NTRS2010

Decision Engines for Software Analysis Using Satisfiability Modulo Theories Solvers

The area of software analysis, testing and verification is now undergoing a revolution thanks to the use of automated and scalable support for logical methods. A well-recognized premise is that at the core of software analysis engines is invariably a component using logical formulas for describing states and transformations between system states. The process of using this information for discovering and checking program properties (including such important properties as safety and security) amounts to automatic theorem proving. In particular, theorem provers that directly support common software constructs offer a compelling basis. Such provers are commonly called satisfiability modulo theories (SMT) solvers. Z3 is a state-of-the-art SMT solver. It is developed at Microsoft Research. It can be used to check the satisfiability of logical formulas over one or more theories such as arithmetic, bit-vectors, lists, records and arrays. The talk describes some of the technology behind modern SMT solvers, including the solver Z3. Z3 is currently mainly targeted at solving problems that arise in software analysis and verification. It has been applied to various contexts, such as systems for dynamic symbolic simulation (Pex, SAGE, Vigilante), for program verification and extended static checking (Spec#/Boggie, VCC, HAVOC), for software model checking (Yogi, SLAM), model-based design (FORMULA), security protocol code (F7), program run-time analysis and invariant generation (VS3). We will describe how it integrates support for a variety of theories that arise naturally in the context of the applications. There are several new promising avenues and the talk will touch on some of these and the challenges related to SMT solvers. Proceedings

Bjorner, Nikolaj↗
NASA NTRS2008

IR DirectFET Extreme Environments Evaluation Final Report

In 2007, International Rectifier (IR) introduced a new version of its DirectFET metal oxide semiconductor field effect transistor (MOSFET) packaging. The new version (referred to as 'Version 2') enhances device moisture resistance, makes surface mount (SMT) assembly of these devices to printed wiring boards (PWBs) more repeatable, and subsequent assembly inspection simpler. In the present study, the National Aeronautics Space Administration (NASA) Jet Propulsion Laboratory (JPL), in collaboration with Stellar Microelectronics (Stellar), continued an evaluation of the DirectFET that they started together in 2006. The present study focused on comparing the two versions of the DirectFET and examining the suitability of the DirectFET devices for space applications. This study evaluated both versions of two DirectFET packaged devices that had both been shown in the 2006 study to have the best electrical and thermal properties: the IRF6635 and IRF6644. The present study evaluated (1) the relative electrical and thermal performance of both versions of each device, (2) the performance through high reliability testing, and (3) the performance of these devices in combination with a range of alternate solder alloys in the extreme thermal environments of deep space....

electronic parts packaging↗