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At least 19 records

PHIL Interface Design for Use With a Voltage-Regulated Amplifier

Power hardware-in-the-loop (PHIL) has emerged as a leading strategy to thoroughly assess the impact of proprietary inverter controls on a specific power system. The development of a PHIL test bed typically involves an inverter under test, a power amplifier, controllable DC supply, and a digital real-time simulator (DRTS) to simulate the power system under study. As a result of PHIL nonidealities, a form of digital compensation within the DRTS is used, which is commonly referred to as a PHIL interface. Many existing methods use legacy power amplifiers that do not contain internal voltage regulation. These existing interface methods are based around a voltage regulator within the DRTS and do not consider the interaction with the controls in newer amplifiers. In this study, a three-step approach of PHIL interface development for modern power amplifiers with built-in voltage regulation is introduced and is validated in hardware with a 30-kW grid-following inverter.

DRTS↗

PHIL Interface Design for Use With a Voltage-Regulated Amplifier: Preprint

As inverter controls have become increasingly complex, power hardware-in-the-loop (PHIL) has emerged as a leading strategy to thoroughly assess the impact of proprietary inverter controls on a specific power system. The development of a PHIL test bed typically involves the desired inverter, a power amplifier, and a digital real-time simulator (DRTS) to control the simulated power system. As a result of PHIL nonidealities, a form of digital compensation within the DRTS is used, which is commonly referred to as a PHIL interface. The interface design for PHIL test beds has been previously examined in the literature, but many existing methods use older power amplifiers that do not contain internal voltage regulation. These existing interface methods are based around a voltage regulator within the DRTS rather than one preexisting in hardware. In this study, a three-step approach of PHIL interface development for modern power amplifiers with built-in voltage regulation is introduced and validated in hardware with a single 30-kW grid-following inverter.

DRTS↗

Advanced Power-Hardware-in-the-Loop Evaluation of Inverter-Based Resources (IBRs)

Power-hardware-in-the-loop evaluation of IBRs has become more and more important as it provides reliable testing results to investigate the real responses of inverters with interconnected systems. A successful laboratory PHIL testing gives confidence of the hardware system to be deployed and de-risk technology integration prior to field deployment. So far, there are two important applications for PHIL evaluation: (1) test stability and functionality of large utility inverters into the system when it interconnects to the distribution systems/microgrids; and (2) test the collective grid service that inverters can provide to the grid. For the first application, the PHIL evaluation has high requirements for the stability and accuracy of the PHIL interface as the close-loop in digital real time simulator (DRTS) should replicate the actual current and voltage dynamics in the inverter. This is challenging because of the delays, sensing errors, nonlinearities of inverters, and hardware bandwidth limitations of the elements in the HIL loop. For the second application, multiple inverters will be tested resulting in multiple PCCs, which naturally causes competing dynamics and oscillations among hardware inverters if traditional PHIL interface is used. Therefore, new PHIL interface should be developed to compromise between stability and accuracy and represent the dispatched grid services for the hardware inverters. In this presentation, we will share our latest work in developing PHIL interface in these two applications to address the two key challenges.

DERMS↗

Power-Hardware-in-the-Loop Interfaces for Inverter-Based Microgrid Experiments Including Transitions

Microgrids continue to proliferate, particularly those that rely on inverter-based resources as the microgrid's voltage and frequency leader. Hardware-in-the-loop simulations can de-risk microgrid deployments, and therefore we need power-hardware-in-the-loop (PHIL) interfaces for grid-forming (GFM) inverters to enable simulations of seamless transitions between islanded and grid-connected operation. Such interfaces are particularly challenging when the inverters need to switch modes, i.e., between grid-following (GFL) and GFM as the microgrid transitions between grid-connected and islanded operation. This paper presents two PHIL interfaces for such microgrids and the preliminary experimental results.

experiments↗

Power Hardware-in-the-Loop Interfaces for Inverter-Based Microgrid Experiments Including Transitions: Preprint

Microgrids continue to proliferate, particularly those that rely on inverter-based resources as the microgrid's voltage and frequency leader. Hardware-in-the-loop (HIL) simulations can de-risk microgrid deployments, and therefore we need power-hardware-in-the-loop (PHIL) interfaces for grid-forming (GFM) inverters to enable simulations of seamless transitions between islanded and grid-connected operation. Such microgrid interfaces are particularly challenging to model when the inverters need to switch modes, i.e., between grid-following (GFL) and GFM as the microgrid transitions between grid-connected and islanded operation. This paper presents two PHIL interfaces for such microgrids and the preliminary experimental results: One interface is suitable for those who have access to a power amplifier that can operate as a controllable current source, and the other is for those who need a solution that uses a voltage-mode power amplifier.

battery energy storage system↗

Use of Power Hardware-in-the-Loop and Controller Hardware-in-the-Loop to De-Risk the Use Of Grid-Forming Fuel Cell Inverters in Microgrids

Microgrids continue to proliferate, particularly those that rely on inverter-based resources as the microgrid's voltage and frequency leader. Hardware-in-the-loop simulations can de-risk microgrid deployments, and therefore we need power-hardware-in-the-loop (PHIL) interfaces for grid-forming (GFM) inverters to enable simulations of seamless transitions between islanded and grid-connected operation. Such interfaces are particularly challenging when the inverters need to switch modes, i.e., between grid-following (GFL) and GFM as the microgrid transitions between grid-connected and islanded operation. This presentation shows the use of PHIL interfaces for such microgrids and the preliminary experimental results.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Power-Hardware-in-the-Loop Experiments of a Microgrid with a Grid-Forming Battery Inverter

Microgrids continue to proliferate, and they are transitioning away from using conventional generating resources to increasingly relying on inverter-based resources (IBRs) as the voltage and frequency leaders. It is crucial to evaluate the capability of IBRs to provide microgrid stability and resilience. Hardware-in-the-loop (HIL) experiments were conducted to de-risk the field deployment of the San Diego Gas & Electric Company Borrego Springs Microgrid, where a battery inverter was upgraded with grid-forming (GFM) capability to serve as the island leader. This paper presents the HIL experimental results from an HIL test bed that uses a power-hardware-in-the-loop (PHIL) interface with a power inductor that was previously developed for PHIL simulations of microgrids where the inverters need to switch modes, i.e., between grid-following and GFM as the microgrid transitions between grid-connected and islanded operation. This paper presents more details on the interface and HIL simulation results of the planned islanding and load steps in islanded operation to show the effectiveness of the inverters in managing the voltage and frequency.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Power-Hardware-in-the-Loop Experiments of a Microgrid With a Grid-Forming Battery Inverter: Preprint

Microgrids continue to proliferate, and they are transitioning away from using conventional generating resources to increasingly relying on inverter-based resources (IBRs) as the voltage and frequency leaders. It is crucial to evaluate the capability of IBRs to provide microgrid stability and resilience. Hardware-in-the-loop (HIL) experiments were conducted to de-risk the field deployment of the San Diego Gas & Electric Company Borrego Springs Microgrid, where a battery inverter was upgraded with grid-forming (GFM) capability to serve as the island leader. This paper presents the HIL experimental results from an HIL test bed that uses a power-hardware-in-the-loop (PHIL) interface with a power inductor that was previously developed for PHIL simulations of microgrids where the inverters need to switch modes, i.e., between grid-following and GFM as the microgrid transitions between grid-connected and islanded operation. This paper presents more details on the interface and HIL simulation results of the planned islanding and load steps in islanded operation to show the effectiveness of the inverters in managing the voltage and frequency.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Improving the Performance of Integrated Power-Hardware-in-the-Loop and Quasi-Static Time-Series Simulations

This paper introduces a novel multirate cosimulation architecture that overcomes previous challenges integrating faster real-time, microseconds-scale, power-hardware-in-the-loop (PHIL) with larger scale but slower, real-time, seconds-scale, quasi-static time-series (QSTS) simulation. Specifically, an intermediate reduced-equivalent electromagnetic transient (EMT) model duplicates the key power system topology to capture high-speed dynamics and converge hardware-power system interactions between QSTS updates. Exchanging multidimensional parameter vectors (loads, control status, etc.) between the QSTS and EMT models enables capturing the interactions of the rich, high-node-count (thousands of electrical nodes) QSTS model with the hardware. This architecture offers full spatial resolution from QSTS, including individual load dynamics, actual distribution management system controls, and nodal voltages. Simultaneously, the intermediate EMT model provides more detailed high-speed transients of key distributed energy resource hardware interactions. In addition, we use careful PHIL interface design and the exchange of complex power data, rather than current, to further improve performance. This cosimulation architecture is demonstrated by testing a simulated distribution system with an interconnected 500-kVA advanced photovoltaic (PV) inverter in PHIL. In conclusion, the architecture successfully captured PV local volt-volt ampere reactive (volt-VAR) control interactions with the larger network under time-varying electrical and weather conditions.

42 ENGINEERING↗

Leveraging PHIL for Inverter Functionality Requirement Evaluation to Ensure a Reliable Grid

This presentation showcases NREL's ongoing research on advanced Multi-point Power Hardware-in-the-Loop (PHIL) systems, enabling comprehensive evaluation of interoperability, stability, and wide-area stability in complex power grids. Key features include high-power PHIL capabilities, seamless PHIL Interfaces for effortless Grid-Following (GFL) and Grid-Forming (GFM) mode switching, and advanced multi-domain PHIL/Controller Hardware-in-the-Loop (CHIL) capabilities for evaluating diverse technology mixes, facilitating rigorous testing and validation of emerging power systems for reliable integration, enhanced resilience, and optimal performance.

lab capabilities↗

A Comparison of DER Voltage Regulation Technologies Using Real-Time Simulations

Grid operators are now considering using distributed energy resources (DERs) to provide distribution voltage regulation rather than installing costly voltage regulation hardware. DER devices include multiple adjustable reactive power control functions, so grid operators have the difficult decision of selecting the best operating mode and settings for the DER. In this work, we develop a novel state estimation-based particle swarm optimization (PSO) for distribution voltage regulation using DER-reactive power setpoints and establish a methodology to validate and compare it against alternative DER control technologies (volt–VAR (VV), extremum seeking control (ESC)) in increasingly higher fidelity environments. Distribution system real-time simulations with virtualized and power hardware-in-the-loop (PHIL)-interfaced DER equipment were run to evaluate the implementations and select the best voltage regulation technique. Each method improved the distribution system voltage profile; VV did not reach the global optimum but the PSO and ESC methods optimized the reactive power contributions of multiple DER devices to approach the optimal solution.

24 POWER TRANSMISSION AND DISTRIBUTION↗

SuperLab 2.0 Showcase: Connecting Five Labs to Tackle Grid Complexity and Unlock Unique Grid Asset Potential

SuperLab 2.0 (5-Lab Demo) is a collaborative, national-scale experiment showcasing the coordination of geographically distributed energy assets in real time. The demonstration integrates 25 physical and digital assets, spanning wind, PV, batteries, electrolyzers, DC fast chargers, microgrid controllers, building automation systems, small modular reactor (SMR), control centers, and gas turbines, across five DOE national laboratories-NLR, INL, NETL, LBNL, and SNL. These assets are unified using Energy Sciences Network (ESnet), a low-latency, high-performance U.S. Department of Energy's (DOE) network, and controlled via a centralized energy controller hosted at NLR's ARIES facility. The demonstration validates the ability to stress-test hybrid energy systems under dynamic scenarios to de-risk advanced control strategies for greater resilience and flexibility. SuperLab 2.0 (5-Lab Demo) showcased a major advancement in federated national laboratory collaboration, enabling real-time, cross-laboratory experimentation to coordinate geographically dispersed distributed energy resources (DERs) using various communication protocols and networks. SuperLab 2.0 (5-Lab Demo) built on previous demonstrations conducted between NLR-PNNL and NLR-INL connecting diverse assets including distant protection devices, a SMR simulator, and a high temperature electrolyzer (HTE). Previous demos were based on a single connection between two labs with minimal coordination challenges. The 5-Lab demo with a centralized controller, distributed testbeds across different geographical locations, and use of protocols-based communication represents a scenario closer to real-world grid operations that coordinate resources across a region to meet system needs. This experiment studied how local DER controllers interact with a centralized energy controller during normal and abnormal events to maintain reliability. The SuperLab team across the five labs implemented a notional power system model equivalent of transmission and distribution lines, represented by the data networks interconnecting the labs. Each lab continuously exchanged local parameters (such as P and Q) from its Hardware-In-Loop (CHIL) and Power Hardware-In-Loop (PHIL) assets through centralized energy controller at NLR, enabling real-time interaction and coordination across sites. By leveraging ESnet as the communication backbone, the team successfully operated the distributed assets as a unified power system, with each bus represented by a different laboratory. This setup mirrors how assets interact in real-world power systems across dispersed locations with various protocols and latencies. At each lab site, assets were operated using their own local controllers which were coordinated through an overarching operation and control layer of centralized energy controller, equivalent to how an energy management system (EMS) orchestrates assets across a regional or national grid. SuperLab's federated connectivity utilized a Digital Real-Time Simulators (DRTS)-type gateway to connect Controller Hardware-In-Loop (CHIL) and PHIL assets between labs. To enable this federated connection through ESnet, a deterministic network was established where latency variations were consistent. This consistency allowed the development of digital filters for the power system assets across CHIL and PHIL interfaces to avoid unstable and unreliable grid conditions. This report provides an overview of the cross-laboratory configuration and offers insights into interconnecting geographically distributed research assets to test them as if they were co-located. This experiment represents a step toward linking nine DOE national laboratories, enabling nation-wide simulations that can address utility-driven challenges with grid resilience, flexibility, and modernization.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Parallel Grid-Forming Inverter-Driven Black Start: Power-Hardware-in-the-Loop Validation: Preprint

With power systems encountering increasing deployment levels of inverter-based resources (IBRs), system restoration using grid-forming (GFM) IBRs has gained attention. Engineered to establish grid voltages in the absence of a stiff grid, black-start-capable GFM IBRs are expected to enhance power system resilience by playing a critical role in bottom-up system restoration. This paper experimentally studies the feasibility of the novel approach through power-hardware-in-the-loop (PHIL) testing and validation with a commercial GFM inverter. The PHIL test setup demonstrates an inverter-driven black start of a 5-MW unbalanced distribution feeder where two GFM inverters collectively black start the feeder: one is a commercial hardware GFM inverter interacting through the PHIL interface, and the other is a software GFM emulated by a real-time simulation with full electromagnetic transient (EMT) models. Both GFM inverters are equipped with negative-sequence voltage control to suppress the voltage imbalance resulting from the unbalanced loading, allowing us to study the dynamic interactions between the GFMs with their control parameters unknown. To evaluate the dynamic behavior of the GFM inverters under the entire black-start process, the EMT model of the distribution system details the transformer and motor dynamics to emulate their inrush and startup behaviors. It abstracts conventional grid-connected inverter dynamics, i.e., grid-following inverters. Oscilloscope measurements of the hardware GFM inverter are also presented for critical steps. Takeaways for further study and field deployment are provided.

grid-forming inverter↗

Optimal Power Hardware-in-the-Loop Interfacing: Applying Modern Control For Design and Verification of High-Accuracy Interfaces

Here, we develop a novel approach to designing power hardware-in-the-loop (PHIL) simulation interfaces that maximizes simulation bandwidth and accuracy by leveraging a modern control framework that explicitly considers objectives on accuracy and can automatically synthesize an optimal controller that meets these objectives while stabilizing the closed-loop system. The method developed improves upon common approaches to PHIL interface design that typically involve multiple design steps for manual compensation and stabilization design that can result in interfaces that are stable but have suboptimal bandwidth and accuracy. The approach developed is general and can be applied to most PHIL system configurations. The modeling framework allows for the inclusion of scaling factors and hardware-under-test current injection models that are common to practical PHIL simulations and have significant impacts on stability. We also present practical methods and metrics for verifying the absolute accuracy of PHIL simulation results without relying on relative comparisons to potentially inaccurate models or previous simulation results. We demonstrate the accuracy evaluation method and show the improved performance achievable when using the optimal PHIL interface design approach in an experimental case study involving a 100-kVA battery inverter.

42 ENGINEERING↗

Novel Power-Hardware-in-the-Loop Interface Method for Grid-Forming Inverter Systems

Power-hardware-in-the-loop (PHIL) simulations of grid-forming (GFM) inverter systems facilitate the testing of drastic scenarios, such as on-grid to off-grid transitions and islanded microgrid operations without a stiff grid. To the authors’ best knowledge, most studies in the literature focus on PHIL simulations for grid-following inverter systems. Only a few studies focus on GFM inverters, and those are challenging and problematic, especially for high-power applications. This article proposes a novel PHIL simulation platform that enables interfacing high-power GFM inverter systems. The paper proposes the concept of a virtual GFM inverter as a part of the proposed PHIL interface. This addition of a virtual GFM inverter in the PHIL interface expands the conventional ideal transformer model (ITM) method and enables it to overcome the issues of instability of existing ITM methods. In the validation stage, a PHIL experiment is conducted on a three-phase, 480-V, 125-kVA GFM inverter system with the proposed interfacing method. The results corroborate that the proposed PHIL simulation method performs well and is stable for GFM inverter systems.

droop control↗

A Novel Power-Hardware-in-the-Loop Interface Method for Grid-forming Inverter Systems: Preprint

Power Hardware-in-the-Loop (PHIL) simulation of grid-forming (GFM) inverter systems facilitates the testing of drastic scenarios like on-grid to off-grid transition, islanded microgrid operation without stiff grid etc. To the authors best knowledge, most of studies in literature are focused on PHIL simulation for grid-following inverter systems and only few studies are focused on GFM inverters and those are challenging and problematic especially for high-power applications. In this article, a novel PHIL simulation platform is proposed that enables interfacing of high-power GFM inverter systems. It proposes the concept of a virtual GFM inverter as a part of the proposed PHIL interface for GFM inverter. This addition of virtual GFM inverter in the PHIL interface expands the conventional Ideal Transformer Model (ITM) method and enables it to overcome the issues of instability of existing ITM methods. In the validation stage, a PHIL experiment is conducted on a 3-phase 480 V, 125 kVA GFM inverter system with proposed interfacing method. The results corroborates the fact that the proposed PHIL simulation method performs well and stable for GFM inverter system.

grid-forming inverters↗

Hardware in the Loop Testing of an Iodine-Fed Hall Thruster

CUBESATS are relatively new spacecraft platforms that are typically deployed from a launch vehicle as a secondary payload,1 providing low-cost access to space for a wide range of end-users. These satellites are comprised of building blocks having dimensions of 10x10x10 cm cu and a mass of 1.33 kg (a 1-U size). While providing low-cost access to space, a major operational limitation is the lack of a propulsion system that can fit within a CubeSat and is capable of executing high delta v maneuvers. This makes it difficult to use CubeSats on missions requiring certain types of maneuvers (i.e. formation flying, spacecraft rendezvous). Recently, work has been performed investigating the use of iodine as a propellant for Hall-effect thrusters (HETs) 2 that could subsequently be used to provide a high specific impulse path to CubeSat propulsion. Iodine stores as a dense solid at very low pressures, making it acceptable as a propellant on a secondary payload. It has exceptionally high ρIsp (density times specific impulse), making it an enabling technology for small satellite near-term applications and providing the potential for systems-level advantages over mid-term high power electric propulsion options. Iodine flow can also be thermally regulated, subliming at relatively low temperature ( less than100 C) to yield I2 vapor at or below 50 torr. At low power, the measured performance of an iodine-fed HET is very similar to that of a state-of-the-art xenon-fed thruster. Just as importantly, the current-voltage discharge characteristics of low power iodine-fed and xenon-fed thrusters are remarkably similar, potentially reducing development and qualifications costs by making it possible to use an already-qualified xenon-HET PPU in an iodine-fed system. Finally, a cold surface can be installed in a vacuum test chamber on which expended iodine propellant can deposit. In addition, the temperature doesn't have to be extremely cold to maintain a low vapor pressure in the vacuum chamber (it is under 10(exp -6) torr at -75 C), making it possible to 'cryopump' the propellant with lower-cost recirculating refrigerant-based systems as opposed to using liquid nitrogen or low temperature gaseous helium cryopanels. In the present paper, we describe testing performed using an iodine-fed 200 W Hall thruster mounted to a thrust stand and operated in conjunction with MSFCs Small Projects Rapid Integration and Test Environment (SPRITE) Portable Hardware In the Loop (PHIL) hardware. This work is performed in support of the iodine satellite (iSAT) project, which aims to fly a 200-W iodine-fed thruster on a 12-U CubeSat. The SPRITE PHIL hardware allows a given vehicle to do a checkout of its avionics algorithm by allowing it to monitor and feed data to simulated sensors and effectors in a digital environment. These data are then used to determine the attitude of the vehicle and a separate computer is used to interpret the data set and visualize it using a 3D graphical interface. The PHIL hardware allows the testing of the vehicles bus by providing 'real' hardware interfaces (in the case of this test a real RS422 bus) and specific components can be modeled to show their interactions with the avionics algorithm (e.g. a thruster model). For the iSAT project the PHIL is used to visualize the operating cycle of the thruster and the subsequent effect this thrusting has on the attitude of the satellite over a given period of time. The test is controlled using software running on an Andrews Space Cortex 160 flight computer. This computer is the current baseline for a full iSAT mission. While the test could be conducted with a lab computer and software, the team chose to exercise the propulsion system with a representative CubeSat-class computer. For purposes of this test, the "flight" software monitored the propulsion and PPU systems, controlled operation of the thruster, and provided thruster state data to the PHIL simulation. Commands to operate the thruster were initiated from an operator's workstation outside the vacuum chamber and passed through the Cortex 160 to exercise portions of the flight avionics. Two custom-designed pieces of electronics hardware have been designed to operate the propellant feed system. One piece of hardware is an auxiliary board that controls a latch valve, proportional flow control valves (PFCVs) and valve heaters as well as measuring pressures, temperatures and PFCV feedback voltage. An onboard FPGA provides a serial link for issuing commands and manages all lower level input-output functions. The other piece of hardware is a power distribution board, which accepts a standard bus voltage input and converts this voltage into all the different current-voltage types required to operate the auxiliary board. These electronics boards are located in the vacuum chamber near the thruster, exposing this hardware to both the vacuum and plasma environments they would encounter during a mission, with these components communicating to the flight computer through an RS-422 interface. The auxiliary board FPGA provides a 28V MOSFET switch circuit with a 20ms pulse to open or close the iodine propellant feed system latch valve. The FPGA provides a pulse width modulation (PWM) signal to a DC/DC boost converter to produce the 12-120V needed for control of the proportional flow control valve. There are eight MOSFET-switched heating circuits in the system. Heaters are 28V and located in the latch valve, PFCV, propellant tank and propellant feed lines. Both the latch valve and PFCV have thermistors built into them for temperature monitoring. There are also seven resistance temperature device (RTD) circuits on the auxiliary board that can be used to measure the propellant tank and feedline temperatures. The signals are conditioned and sent to an analog to digital converter (ADC), which is directly commanded and controlled by the FPGA.

Polzin, Kurt A.↗

Stability and Fidelity of Power-Hardware-in-the-Loop Using NREL's CGI

The presentation focuses on dynamic analysis of power hardware-in-the-loop (PHIL) experiments using National Renewable Energy Laboratory Flatirons Campus' grid simulator - 7MVA Controllable Grid Interface (CGI). A control diagram of typical PHIL experiment is described, and transfer functions of critical components are explained. An impedance-based definition of PHIL experiment bandwidth is defined using open loop transfer functions of the system. Further an example resistive divider circuit is introduced that is used to explain implication of PHIL on accuracy of simulation by comparing measured results against ideal expected signals. At the end the real-life PHIL simulation using Maui power system model is described showing various oscillation modes observed and discussing the meaning of these in context of dynamic bandwidth of simulation.

grid simulator↗