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InGaN based micro light emitting diodes featuring a buried GaN tunnel junction

GaN tunnel junctions (TJs) are grown by ammonia molecular beam epitaxy. High doping levels are achieved with a net acceptor concentration close to ∼10{sup 20 }cm{sup −3}, thanks to the low growth temperature. This allows for the realization of p-n junctions with ultrathin depletion width enabling efficient interband tunneling. n-p-n structures featuring such a TJ exhibit low leakage current densities, e.g., <5 × 10{sup −5} A cm{sup −2} at reverse bias of 10 V. Under forward bias, the voltage is 3.3 V and 4.8 V for current densities of 20 A cm{sup −2} and 2000 A cm{sup −2}, respectively. The specific series resistance of the whole device is 3.7 × 10{sup −4} Ω cm{sup 2}. Then micro-light emitting diodes (μ-LEDs) featuring buried TJs are fabricated. Excellent current confinement is demonstrated together with homogeneous electrical injection, as seen on electroluminescence mapping. Finally, the I-V characteristics of μ-LEDs with various diameters point out the role of the access resistance at the current aperture edge.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Thermal Design and Characterization of Heterogeneously Integrated InGaP/GaAs HBTs

Flip-chip heterogeneously integrated n-p-n InGaP/GaAs heterojunction bipolar transistors (HBTs) with integrated thermal management on wide-bandgap AlN substrates followed by GaAs substrate removal are demonstrated. Without thermal management, substrate removal after integration significantly aggravates self-heating effects, causing poor I–V characteristics due to excessive device self-heating. An electrothermal codesign scheme is demonstrated that involves simulation (design), thermal characterization, fabrication, and evaluation. Thermoreflectance thermal imaging, electrical-temperature sensitive parameter-based thermometry, and infrared thermography were utilized to assess the junction temperature rise in HBTs under diverse configurations. In order to reduce the thermal resistance of integrated devices, passive cooling schemes assisted by structural modification, i.e., positioning indium bump heat sinks between the devices and the carrier, were employed. By implementing thermal heat sinks in close proximity to the active region of flip-chip integrated HBTs, the junction-to-baseplate thermal resistance was reduced over a factor of two, as revealed by junction temperature measurements and improvement of electrical performance. In conclusion, the suggested heterogeneous integration method accounts for not only electrical but also thermal requirements providing insight into realization of advanced and robust III–V/Si heterogeneously integrated electronics.

36 MATERIALS SCIENCE↗

Multiscale Modeling of Total Ionizing Dose Effects in Commercial-off-the-Shelf Parts in Bipolar Technologies

A multiscale modeling platform that supports the “virtual” qualification of commercial-off-the-shelf parts is presented. The multiscale approach is divided into two modules. The first module generates information related to the bipolar junction transistor gain degradation that is a function of fabrication process, operational, and environmental inputs. The second uses this information as inputs for radiation-enabled circuit simulations. The prototype platform described in this paper estimates the total ionizing dose and dose rate responses of linear bipolar integrated circuits for different families of components. The simulation and experimental results show good correlation and suggest this platform to be a complementary tool within the radiation-hardness assurance flow. Finally, the platform may reduce some of the costly reliance on testing for all systems.

97 MATHEMATICS AND COMPUTING↗

Low-Frequency Noise and Deep Level Transient Spectroscopy in n-p-n Si Bipolar Junction Transistors Irradiated with Si Ions

The properties of defects in n-p-n Si bipolar junction transistors (BJTs) caused by 17 MeV Si ions are investigated via current-voltage, low-frequency noise, and deep-level transient spectroscopy (DLTS) measurements. Four prominent radiation-induced defects in the base-collector junction of these transistors are identified via DLTS. At least two defect levels are observed in temperature-dependent low-frequency 1/ f noise measurements, one that is similar to a prominent defect in DLTS and another that is not. Defect microstructures are discussed. Here our results show that DLTS and 1/ f noise measurements can provide complementary information about defects in linear bipolar devices.

42 ENGINEERING↗

Atomically Precise Ultra-High Performance 2D MicroElectronics

Zyvex Labs has created several p-n junction devices with a variety of gaps between the boron and phosphorus electrodes, from 0-7.7 nm, which are now being measured. We have developed a different contacting process based on palladium disilicide rather than aluminium to improve the reliability of the device contacts. Preliminary measurements indicate that these new contacts are successfully contacting the buried dopant layers, which are intact after the overgrowth process. Modelling of the p-n junction properties has made good progress, with the model matching previous published data, and modelling of n-p-n junction devices has begun. This now awaits experimental validation.

47 OTHER INSTRUMENTATION↗

Development of ion implanted gallium arsenide transistors

Techniques were developed for creating bipolar microwave transistors in GaAs by ion implantation doping. The electrical properties of doped layers produced by the implantation of the light ions Be, Mg, and S were studied. Be, Mg, and S are suitable for forming the relatively deep base-collector junction at low ion energies. The electrical characteristics of ion-implanted diodes of both the mesa and planar types were determined. Some n-p-n planar transistor structures were fabricated by implantation of Mg to form the base regions and Si to form the emitters. These devices were found to have reasonably good base-collector and emitter-base junctions, but the current gain beta was small. The low was attributable to radiative recombination in the base region, which was extremely wide.

Hunsperger, R.↗

GaAs vapor-grown bipolar transistors.

Discussion of an approach for the fabrication of high-temperature GaAs transistors which is centered on the preparation of n-p-n three-layered structures entirely by a vapor-phase growth technique, as described by Tietjen and Amick (1966). The low growth temperature of approximately 750 C is thought to reduce contamination during crystal growth and to contribute to the reasonably high minority-carrier lifetimes obtained for the vapor-grown p-n junctions. The fact that impurity concentrations and layer thicknesses can be precisely controlled for epitaxial layers as thin as 1 micrometer is an important feature of this growth technique.

Nuese, C. J.↗

Two-dimensional heterostructure materials

Methods, articles of manufacture and systems for creating new nanoscale two dimensional materials comprising designed arrays of lateral or vertical heterojunctions may be fabricated by first lithographically masking a 2D material. Exposed, or unmasked, regions of the 2D material may be converted to a different composition of matter to form lateral or vertical heterojunctions according to the patterned mask. PLD and high kinetic energy impingement of atoms may replace or add atoms in the exposed regions, and a plurality of the exposed regions may be converted concurrently. The process may be repeated one or more times on either side of the same 2D material to form any suitable combination of lateral heterojunctions and/or vertical heterojunctions, comprising semiconductors, metals or insulators or any suitable combination thereof. Furthermore, the resulting 2D material may comprise p-n, n-n, p-p, n-p-n and p-n-p junctions, or any suitable combination thereof.

36 MATERIALS SCIENCE↗