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At least 19 records

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NASA NTRS1980

Microcomputer software development facilities

A more efficient and cost effective method for developing microcomputer software is to utilize a host computer with high-speed peripheral support. Application programs such as cross assemblers, loaders, and simulators are implemented in the host computer for each of the microcomputers for which software development is a requirement. The host computer is configured to operate in a time share mode for multiusers. The remote terminals, printers, and down loading capabilities provided are based on user requirements. With this configuration a user, either local or remote, can use the host computer for microcomputer software development. Once the software is developed (through the code and modular debug stage) it can be downloaded to the development system or emulator in a test area where hardware/software integration functions can proceed. The microcomputer software program sources reside in the host computer and can be edited, assembled, loaded, and then downloaded as required until the software development project has been completed.

Gorman, J. S.↗

NASA NTRS1984

A real-time, portable, microcomputer-based jet engine simulator

Modern piloted flight simulators require detailed models of many aircraft components, such as the airframe, propulsion system, flight deck controls and instrumentation, as well as motion drive and visual display systems. The amount of computing power necessary to implement these systems can exceed that offered by dedicated mainframe computers. One approach to this problem is through the use of distributed computing, where parts of the simulation are assigned to computing subsystems, such as microcomputers. One such subsystem, such as microcomputers. One such subsystem, a real-time, portable, microcomputer-based jet engine simulator, is described in this paper. The simulator will be used at the NASA Ames Vertical Motion Simulator facility to perform calculations previously done on the facility's mainframe computer. The mainframe will continue to do all other system calculations and will interface to the engine simulator through analog I/0. The engine simulator hardware includes a 16-bit microcomputer and floating-point coprocessor. There is an 8 channel analog input board and an 8 channel analog output board. A model of a small turboshaft engine/control is coded in floating-point FORTRAN. The FORTRAN code and a data monitoring program run under the control of an assembly language real-time executive. The monitoring program allows the user to isplay and/or modify simulator variables on-line through a data terminal. A dual disk drive system is used for mass storage of programs and data. The CP/M-86 operating system provides file management and overall system control. The frame time for the simulator is 30 milliseconds, which includes all analog I/0 operations.

Blech, R. A.↗

NASA NTRS1984

The microcomputer workstation - An alternate hardware architecture for remotely sensed image analysis

Difficulties regarding the digital image analysis of remotely sensed imagery can arise in connection with the extensive calculations required. In the past, an expensive large to medium mainframe computer system was needed for performing these calculations. For image-processing applications smaller minicomputer-based systems are now used by many organizations. The costs for such systems are still in the range from $100K to $300K. Recently, as a result of new developments, the use of low-cost microcomputers for image processing and display systems appeared to have become feasible. These developments are related to the advent of the 16-bit microprocessor and the concept of the microcomputer workstation. Earlier 8-bit microcomputer-based image processing systems are briefly examined, and a computer workstation architecture is discussed. Attention is given to a microcomputer workstation developed by Stanford University, and the design and implementation of a workstation network.

Erickson, W. K.↗

NASA NTRS1977

Satellite Doppler data processing using a microcomputer

A microcomputer which was developed to compute ground radio beacon position locations using satellite measurements of Doppler frequency shift is described. Both the computational algorithms and the microcomputer hardware incorporating these algorithms were discussed. Results are presented where the microcomputer in conjunction with the NIMBUS-6 random access measurement system provides real time calculation of beacon latitude and longitude.

Schmid, P. E.↗

NASA NTRS1982

Microcomputer Checks Butt-Weld Accuracy

Electrical gage and microcomputer eliminate time-consuming manual measurements. Alinement and angle of plates on either side of butt weld are measured and recorded automatically by hand-held gage and desk-top microcomputer. Gage/micro-computer quickly determine whether weld is within dimensional tolerances or whether reworking is needed. Microcomputer prints out measurements while operator moves gage from point to point along weld. Out-of-tolerance measurements are marked by an asterisk on printout.

Clisham, W.↗

NASA NTRS1980

Single-chip microcomputer application in high-altitude balloon orientation system

This paper describes the application of a single-chip microcomputer in a high-altitude balloon instrumentation system. The system, consisting of a magnetometer, a stepping motor, a microcomputer and a gray code shaft encoder, is used to provide an orientation reference to point a scientific instrument at an object in space. The single-chip microcomputer, Intel's 8748, consisting of a CPU, program memory, data memory and I/O ports, is used to control the orientation of the system.

Lim, T. S.↗

NASA NTRS1983

Fabricating a Microcomputer on a Single Silicon Wafer

Concept for "microcomputer on a slice" reduces microcomputer costs by eliminating scribing, wiring, and packaging of individual circuit chips. Low-cost microcomputer on silicon slice contains redundant components. All components-central processing unit, input/output circuitry, read-only memory, and random-access memory (CPU, I/O, ROM, and RAM) on placed on single silicon wafer.

Evanchuk, V. L.↗

NASA NTRS1982

A study of the selection of microcomputer architectures to automate planetary spacecraft power systems

Performance and reliability models of alternate microcomputer architectures as a methodology for optimizing system design were examined. A methodology for selecting an optimum microcomputer architecture for autonomous operation of planetary spacecraft power systems was developed. Various microcomputer system architectures are analyzed to determine their application to spacecraft power systems. It is suggested that no standardization formula or common set of guidelines exists which provides an optimum configuration for a given set of specifications.

Nauda, A.↗

NASA NTRS1981

RAMP - A fault tolerant distributed microcomputer structure for aircraft navigation and control

Design methodologies for realizing future high authority autoflight control systems are being investigated, taking into account also the study of distributed microcomputer architectures. Attention is given to the redundant asynchronous microprocessor (RAMP) structure. RAMP comprises a connected network of microcomputers which has as input command and sensor information, and which generates servo information to drive actuators, and thrust linkages. Tolerance to hardware failures is achieved by static redundancy. Results of a failed microcomputer are simply rejected. This is done in lieu of dynamic redundancy wherein the distributed computer system performs real time fault detection and reconfiguration of the system. Attention is given to the RAMP network structure and operation, flight control with parallel asynchronous computers, and intermittent fault tolerance.

Dunn, W. R.↗

NASA NTRS1983

Preliminary description of the area navigation software for a microcomputer-based Loran-C receiver

The development of new software implementation of this software on a microcomputer (MOS 6502) to provide high quality navigation information is described. This software development provides Area/Route Navigation (RNAV) information from Time Differences (TDs) in raw form using an elliptical Earth model and a spherical model. The software is prepared for the microcomputer based Loran-C receiver. To compute navigation infomation, a (MOS 6502) microcomputer and a mathematical chip (AM 9511A) were combined with the Loran-C receiver. Final data reveals that this software does indeed provide accurate information with reasonable execution times.

Oguri, F.↗

NASA NTRS1983

Data flow methods for dynamic system simulation - A CSSL-IV microcomputer network interface

A major problem in employing networks of microcomputers for the real-time simulation of complex systems is to allocate computational tasks to the various microcomputers in such a way that idle time and time lost in interprocess communication is minimized. The research reported in this paper is directed to the development of a software interface between a higher-level simulation language and a network of microcomputers. A CSSL-IV source program is translated to a data flow graph. This graph is then analyzed automatically so as to allocate computing tasks to the various processors.

Makoui, A.↗

NASA NTRS1988

Microcomputer Board For Space Shuttle Payloads

Report describes Space Flight 80C86 microcomputer board, a configurable general-purpose microcomputer board designed specifically for near-Earth space-flight applications. Architecture of microcomputer board supports dual-bus structure. Local bus provides essential elements for stand-alone computer operations, and system bus provides for communication with subsystems unique to specific application.

Davis, Mitchell L.↗

NASA NTRS1988

Microcomputer versus mainframe simulations: A case study

The research was conducted to two parts. Part one consisted of a study of the feasibility of running the Space Transportation Model simulation on an office IBM-AT. The second part was to design simulation runs so as to study the effects of certain performance factors on the execution of the simulation model. The results of this research are given in the two reports which follow: Microcomputer vs. Mainframe Simulation: A Case Study and Fractional Factorial Designs of Simulation Runs for the Space Transportation System Operations Model. In the first part, a DOS batch job was written in order to simplify the execution of the simulation model on an office microcomputer. A comparison study was then performed of running the model on NASA-Langley's mainframe computer vs. running on the IBM-AT microcomputer. This was done in order to find the advantages and disadvantages of running the model on each machine with the objective of determining if running of the office PC was practical. The study concluded that it was. The large number of performance parameters in the Space Transportation model precluded running a full factorial design needed to determine the most significant design factors. The second report gives several suggested fractional factorial designs which require far fewer simulation runs in order to determine which factors have significant influence on results.

Bengtson, Neal M.↗

NASA NTRS1993

High resolution image processing on low-cost microcomputers

Recent advances in microcomputer technology have resulted in systems that rival the speed, storage, and display capabilities of traditionally larger machines. Low-cost microcomputers can provide a powerful environment for image processing. A new software program which offers sophisticated image display and analysis on IBM-based systems is presented. Designed specifically for a microcomputer, this program provides a wide-range of functions normally found only on dedicated graphics systems, and therefore can provide most students, universities and research groups with an affordable computer platform for processing digital images. The processing of AVHRR images within this environment is presented as an example.

Miller, R. L.↗

NASA NTRS1989

Factor analysis and predictive validity of microcomputer-based tests

11 tests were selected from two microcomputer-based performance test batteries because previously these tests exhibited rapid stability (less than 10 min, of practice) and high retest reliability efficiencies (r greater than 0.707 for each 3 min. of testing). The battery was administered three times to each of 108 college students (48 men and 60 women) and a factor analysis was performed. Two of the three identified factors appear to be related to information processing ("encoding" and "throughput/decoding"), and the third named an "output/speed" factor. The spatial, memory, and verbal tests loaded on the "encoding" factor and included Grammatical Reasoning, Pattern Comparison, Continuous Recall, and Matrix Rotation. The "throughput/decoding" tests included perceptual/numerical tests like Math Processing, Code Substitution, and Pattern Comparison. The output speed factor was identified by Tapping and Reaction Time tests. The Wonderlic Personnel Test was group administered before the first and after the last administration of the performance tests. The multiple Rs in the total sample between combined Wonderlic as a criterion and less than 5 min. of microcomputer testing on Grammatical Reasoning and Math Processing as predictors ranged between 0.41 and 0.52 on the three test administrations. Based on these results, the authors recommend a core battery which, if time permits, would consist of two tests from each factor. Such a battery is now known to permit stable, reliable, and efficient assessment.

Non-NASA Center↗

NASA NTRS1976

Simulation analysis of a microcomputer-based, low-cost Omega navigation system

The current status of research on a proposed micro-computer-based, low-cost Omega Navigation System (ONS) is described. The design approach emphasizes minimum hardware, maximum software, and the use of a low-cost, commercially-available microcomputer. Currently under investigation is the implementation of a low-cost navigation processor and its interface with an omega sensor to complete the hardware-based ONS. Sensor processor functions are simulated to determine how many of the sensor processor functions can be handled by innovative software. An input data base of live Omega ground and flight test data was created. The Omega sensor and microcomputer interface modules used to collect the data are functionally described. Automatic synchronization to the Omega transmission pattern is described as an example of the algorithms developed using this data base.

Lilley, R. W.↗

NASA NTRS1976

A memory-mapped output interface: Omega navigation output data from the JOLT (TM) microcomputer

A hardware interface which allows both digital and analog data output from the JOLT microcomputer is described in the context of a software-based Omega Navigation receiver. The interface hardware described is designed for output of six (or eight with simple extensions) bits of binary output in response to a memory store command from the microcomputer. The interface was produced in breadboard form and is operational as an evaluation aid for the software Omega receiver.

Lilley, R. W.↗

NASA NTRS1976

Simulation analysis of a microcomputer-based, low-cost omega navigation system

A status report is presented on a proposed low-cost Omega Navigation System (ONS) based on a microcomputer (Available commercially). Minimum hardware and maximum software are designed for. Electronic subsystems are discussed in detail, with block diagrams of the receiver and microcomputer interface modules, and a flowchart of the automatic synchronization process. The system is designed as a precision navaid for general aviation in the $1000 price range.

Lilley, R. W.↗