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DOE OSTI2018

Basic Research Needs for Microelectronics: Report of the Office of Science Workshop on Basic Research Needs for Microelectronics, October 23 – 25, 2018

Moore’s Law — realized via a combination of device physics advances, technology investments, and economic returns— allowed the number of transistors on a chip to double roughly every two years for over five decades. During those five decades, the cost of a unit of computing dropped by eight orders of magnitude. Those declines and the associated computing advances have dramatically affected every aspect of society, from science and technology through business and health to national security. Today, further computing advances are limited by the economics of chip fabrication and the physical limits on transistors, electrical interconnects, and memory elements at the nanoscale. If we are to evolve new generations of computing systems over the next decades that are both faster and more energy efficient, a complete reorganization of the science and technology underlying computing is needed. Within the Department of Energy’s (DOE’s) mission, which includes a pivotal and historical role in the evolution of computing, the needs are critical as well. Advanced computing and simulation underpin all aspects of DOE missions in energy, the environment, and national security, requiring energy-efficient computing beyond the exascale range. Edge computing, low-power computing technologies, and computers optimized for artificial intelligence are key to next-generation scientific facilities for high-energy physics research, as well as neutron and x-ray facilities. Finally, microelectronics will also play a major role in reshaping the U.S. electricity grid: from its current state to one that is cleaner, more efficient, cyber-secure, and resilient to widespread events, both natural and manmade. Realizing this vision will require advancements in both system architecture and power electronics. To enable continued advances in computing technologies, a fundamental rethinking is needed of the science behind the materials, synthesis and placement technologies, architectures, and algorithms. This cannot be modular and linear, as it has been in the past. Rather, these advances must be developed collectively, in a spirit of co-design, where each scientific discipline informs and engages the other to achieve orders of magnitude improvements in system-level performance. To explore these challenges, the Office of Science convened a Basic Research Needs Workshop for Microelectronics in October 2018 and charged workshop participants to conduct a thorough assessment of the scientific issues associated with advanced microelectronics technologies for applications relevant to the DOE mission. The workshop examined research relevant to the extension of complementary metal oxide semiconductor (CMOS) and beyond CMOS technologies; however, topics of direct relevance to quantum information science and quantum computing were outside the scope of this workshop.

42 ENGINEERING↗

DOE OSTI2018

Basic Research Needs for Microelectronics

Since the invention of the integrated circuit in 1958, advances in microelectronics have followed Moore’s law and other scaling laws. These have led to over a billion-fold increase in the number of transistors on a chip. The Department of Energy’s Office of Science (DOE-SC) programs have always been at the cutting edge of microelectronics, making major contributions to the scientific understanding, materials, and advanced instrumentation that enabled innovations to promote scaling. This has driven transformative advances in microelectronics for the challenging demands of DOE’s high performance computing and science facilities. Now, strong evidence exists that scaling is approaching its physical and economic limits, and yet, the growth of data-centric computing and sensor networks is redefining computing workloads and microelectronics needs. In addition, greatly improved microelectronics are needed for the nation’s electricity grid if it is to be energy-efficient, resilient to natural phenomena and intentional attack, and agile in adapting to fluctuations in demand and power generation. Sustained and rapid progress in microelectronics science and technology from millivolt to megavolt scales is thus essential if we are to continue pushing the boundaries of science within DOE, and more significantly, to continue to lead the global information and power technology revolution. In October 2018, DOE-SC convened a workshop to address Basic Research Needs for Microelectronics by a “co-design” approach. Participants focused on scientific issues associated with advanced microelectronics technologies for applications relevant to the DOE mission, including computing, power grid management, and science facility workloads. (Topics of direct relevance to quantum information science and quantum computing were outside the scope of this workshop.) The workshop was organized around microelectronics needs for three areas: 1) future DOE-SC facilities, 2) high performance computing beyond exascale (a billion billion calculations per second), and 3) power control, conversion, and detection for a modernized electrical grid and related high power applications. Panels were formed around each of these areas, with a fourth panel formed to address Crosscutting Research. Workshop participants were asked to focus on a co-design innovation ecosystem in which materials, chemistries, devices, systems, architectures, algorithms, and software are researched and developed in a closely integrated fashion, with feedback and interdisciplinary collaboration at each interface in this microelectronics technology hierarchy. The panels identified the five Priority Research Directions on the following page.

36 MATERIALS SCIENCE↗

DOE OSTI2025

Advancing microelectronics through nanoscale science: A perspective on needs and opportunities from the nanoscale science research centers

Microelectronics are the cornerstone of the modern world, enhancing our daily lives by providing services such as communications and datacenters. These resources are accessible thanks to the continual pursuit of a deeper understanding of the chemical and physical phenomena underlying the materials synthesis approaches and fabrication processes used to create microelectronic components and subsequently the components' responses to electrical, optical, and other stimuli that are utilized within microelectronic systems. Today, further development of microelectronics requires multidisciplinary expertise across scientific disciplines and fields of study—synthesis, materials characterization, nanoscale fabrication, and performance characterization—with focus placed on comprehending the nanoscale forms and features of microelectronic components. The Nanoscale Science Research Centers (NSRCs) are Department of Energy, Office of Science user facilities that support the international scientific community in advancing nanoscale science and technology. As a key component of the U.S. Government's National Nanotechnology Initiative, the NSRCs enable transformative discoveries by providing world-class facilities, expertise, and collaborative opportunities. Here, in this perspective, we showcase a non-exhaustive cross-section of the capabilities housed at and developed by the NSRCs and their user communities to address fundamental synthesis, metrology, fabrication, and performance considerations toward advancing the development of new microelectronics. Finally, we provide a timely outlook on the next major areas of necessary development in nanoscale sciences to continue the innovation of microelectronics into the next generation.

2D materials↗

DOE OSTI2018

Flexible packaging for microelectronic devices

An apparatus, method, and system, the apparatus and system including a flexible microsystems enabled microelectronic device package including a microelectronic device positioned on a substrate; an encapsulation layer encapsulating the microelectronic device and the substrate; a protective layer positioned around the encapsulating layer; and a reinforcing layer coupled to the protective layer, wherein the substrate, encapsulation layer, protective layer and reinforcing layer form a flexible and optically transparent package around the microelectronic device. The method including encapsulating a microelectronic device positioned on a substrate within an encapsulation layer; sealing the encapsulated microelectronic device within a protective layer; and coupling the protective layer to a reinforcing layer, wherein the substrate, encapsulation layer, protective layer and reinforcing layer form a flexible and optically transparent package around the microelectronic device.

42 ENGINEERING↗

DOE OSTI2024

Future of plasma etching for microelectronics: Challenges and opportunities

Plasma etching is an essential semiconductor manufacturing technology required to enable the current microelectronics industry. Along with lithographic patterning, thin-film formation methods, and others, plasma etching has dynamically evolved to meet the exponentially growing demands of the microelectronics industry that enables modern society. At this time, plasma etching faces a period of unprecedented changes owing to numerous factors, including aggressive transition to three-dimensional (3D) device architectures, process precision approaching atomic-scale critical dimensions, introduction of new materials, fundamental silicon device limits, and parallel evolution of post-CMOS approaches. The vast growth of the microelectronics industry has emphasized its role in addressing major societal challenges, including questions on the sustainability of the associated energy use, semiconductor manufacturing related emissions of greenhouse gases, and others. The goal of this article is to help both define the challenges for plasma etching and point out effective plasma etching technology options that may play essential roles in defining microelectronics manufacturing in the future. The challenges are accompanied by significant new opportunities, including integrating experiments with various computational approaches such as machine learning/artificial intelligence and progress in computational approaches, including the realization of digital twins of physical etch chambers through hybrid/coupled models. These prospects can enable innovative solutions to problems that were not available during the past 50 years of plasma etch development in the microelectronics industry. To elaborate on these perspectives, the present article brings together the views of various experts on the different topics that will shape plasma etching for microelectronics manufacturing of the future.

Engineering↗

DOE OSTI2022

AI-Enhanced Co-Design for Next-Generation Microelectronics: Innovating Innovation [Workshop Report]

In April 5-7, 2022, Sandia National Laboratories hosted a second virtual workshop to further explore the potential for developing AI-enhanced co-design for microelectronics (AICoM). This second piece in an ongoing workshop series again brought together two themes. The first theme, co-design for next generation microelectronics, was drawn from the 2018 Department of Energy Office of Science (DOE SC) “Basic Research Needs for Microelectronics” (BRN) report (DOE/SC, 2018, 2021), which called for a “fundamental rethinking” of the traditional design approach to microelectronics, in which subject matter experts (SMEs) in each microelectronics discipline (materials, devices, circuits, algorithms, etc.) work near-independently. Instead, the BRN called for a non-hierarchical, egalitarian vision of co-design, wherein “each scientific discipline informs and engages the others” in “parallel but intimately networked efforts to create radically new capabilities.” The second theme, exploiting and advancing artificial intelligence (AI) to support co-design for microelectronics, acknowledges the continuing breakthroughs in AI that are currently enhancing and accelerating solutions to traditional design problems in materials synthesis and processing, circuit design, and electronic design automation (EDA).

42 ENGINEERING↗

DOE OSTI2024

Atomic Precision Processing of Two-Dimensional Materials for Next-Generation Microelectronics

The growth of the information era economy is driving the pursuit of advanced materials for microelectronics, spurred by exploration into “Beyond CMOS” and “More than Moore” paradigms. Atomically thin 2D materials, such as transition metal dichalcogenides (TMDCs), show great potential for next-generation microelectronics due to their properties and defect engineering capabilities. This perspective delves into atomic precision processing (APP) techniques like atomic layer deposition (ALD), epitaxy, atomic layer etching (ALE), and atomic precision advanced manufacturing (APAM) for the fabrication and modification of 2D materials, essential for future semiconductor devices. Additive APP methods like ALD and epitaxy provide precise control over composition, crystallinity, and thickness at the atomic scale, facilitating high-performance device integration. Subtractive APP techniques, such as ALE, focus on atomic-scale etching control for 2D material functionality and manufacturing. In APAM, modification techniques aim at atomic-scale defect control, offering tailored device functions and improved performance. Achieving optimal performance and energy efficiency in 2D material-based microelectronics requires a comprehensive approach encompassing fundamental understanding, process modeling, and high-throughput metrology. Finally, the outlook for APP in 2D materials is promising, with ongoing developments poised to impact manufacturing and fundamental materials science. Integration with advanced metrology and codesign frameworks will accelerate the realization of next-generation microelectronics enabled by 2D materials.

36 MATERIALS SCIENCE↗

DOE OSTI2021

AI-Enhanced Co-Design for Next-Generation Microelectronics: Innovating Innovation (Workshop Report)

On April 6-8, 2021, Sandia National Laboratories hosted a virtual workshop to explore the potential for developing AI-Enhanced Co-Design for Next-Generation Microelectronics (AICoM). The workshop brought together two themes. The first theme was articulated in the 2018 Department of Energy Office of Science (DOE SC) “Basic Research Needs for Microelectronics” (BRN) report, which called for a “fundamental rethinking” of the traditional design approach to microelectronics, in which subject matter experts (SMEs) in each microelectronics discipline (materials, devices, circuits, algorithms, etc.) work near-independently. Instead, the BRN called for a non-hierarchical, egalitarian vision of co-design, wherein “each scientific discipline informs and engages the others” in “parallel but intimately networked efforts to create radically new capabilities.” The second theme was the recognition of the continuing breakthroughs in artificial intelligence (AI) that are currently enhancing and accelerating the solution of traditional design problems in materials science, circuit design, and electronic design automation (EDA).

36 MATERIALS SCIENCE↗

DOE OSTI2022

Microelectronics at the Department of Energy: Capabilities and Opportunities for Driving U.S. Competitiveness

Microelectronics are everywhere—embedded in our consumer products; underlying our power, transportation, and information infrastructure; and fortifying our national security. These and other microelectronics applications are also intricately linked with America’s energy and decarbonization goals. For instance, advanced power electronics are critical to our transition to renewable power and electric transport, and more energy-efficient computing and consumer devices are needed as energy consumption grows rapidly. Meanwhile, global supply chain disruptions beginning in 2020 and the ensuing chip shortage caused by the COVID-19 pandemic highlight the vulnerability of microelectronics supply chains. The globally distributed manufacturing base can be disrupted in unexpected ways, and there is no single solution to these challenges given the range of applications and technologies within the microelectronics industry—from ever-smaller, nanoscale feature sizes to large-scale commodity use cases to specialized functionalities. Rather, solutions will require the private sector, federal agencies, and research and development (R&D) organizations such as labs and universities to act in concert beyond their individual missions.

36 MATERIALS SCIENCE↗

DOE OSTI2024

AI-Enhanced Co-Design for Next-Generation Microelectronics: Innovating Innovation (Workshop Report)

The Artificial Intelligence Enhanced Co-Design for Next Generation Microelectronics virtual workshop was held April 4-5, 2023, and attended by subject matter experts from universities, industry, and national laboratories. This was the third in a series of workshops to motivate the research community to identify and address major challenges facing microelectronics research and production. The 2023 workshop focused on a set of topics from materials to computing algorithms, and included discussions on relevant federal legislation and such as the Creating Helpful Incentives to Produce Semiconductors and Science Act (CHIPS Act) which was signed into law in the summer of 2022. Talks at the workshop included edge computing in radiation environments, new materials for neuromorphic computing, advanced packaging for microelectronics, and new AI techniques. We also received project updates from several of the Department of Energy (DOE) microelectronics co-design projects funded in the fall of 2021, and from three of the Energy Frontier Research Centers (EFRCs) that had been funded in the fall of 2022. The workshop also conducted a set of breakout discussions around the five principal research directions (PRDs) from the 2018 Department of Energy workshop report: 1) define innovative material, device, and architecture requirements driven by applications, algorithms, and software; 2) revolutionize memory and data storage; 3) re-imagine information flow unconstrained by interconnects; 4) redefine computing by leveraging unexploited physical phenomena; 5) reinvent the electricity grid through new materials, devices, and architectures. We tasked each breakout group to consider one primary PRD (and other PRDs as relevant topics arose during discussions) and to address questions such as whether the research community has embraced co-design as a methodology and whether new developments at any level of innovation from materials to programming models requires the research community to reevaluate the PRDs developed back in 2018.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2017

Apparatus for assembly of microelectronic devices

An apparatus including a carrier substrate configured to move a microelectronic device. The apparatus further includes a rotatable body configured to receive the microelectronic device. Additionally, the apparatus includes a second substrate configured to receive the microelectronic device from the rotatable body.

42 ENGINEERING↗

DOE OSTI2023

Determining Stress in Metallic Conducting Layers of Microelectronics Devices Using High Resolution Electron Backscatter Diffraction and Finite Element Analysis

Delayed failure due to stress voiding is a concern with some aging microelectronics, as these voids can grow large enough to cause an open circuit. Local measurements of stress in the metallic layers are crucial to understanding and predicting this failure, but such measurements are complicated by the fact that exposing the aluminum conducting lines will relieve most of their stress. In this study, we instead mechanically thin the device substrate and measure distortions on the thinned surface using high resolution electron backscatter diffraction (HREBSD). These measurements are then related to the stresses in the metallic layers through elastic simulations. This study found that in legacy components that had no obvious voids, the stresses were comparable to the theoretical stresses at the time of manufacture (≈300 MPa). Distortion fields in the substrate were also determined around known voids, which may be directly compared to stress voiding models. In conclusion, the technique presented here for stress determination, HREBSD coupled with finite element analysis to infer subsurface stresses, is a valuable tool for assessing failure in layered microelectronics devices.

HREBSD↗

DOE OSTI2023

Contact-Less Integrity Verification of Microelectronics Using Near-Field EM Analysis

Modern microelectronics life-cycle and supply chain ecosystem bring multiple untrusted entities, which can compromise their integrity. A major integrity issue of microelectronics stems from piracy of intellectual properties (IP) and counterfeiting, which causes significant revenue loss to the semiconductor manufacturers. Further, these components often lead to compromised functionality, reliability, security, and safety of an electronic system. This paper presents secure information transmission and probing methods for verifying the integrity of digital integrated circuit (ICs) based on their electromagnetic (EM) near-field emissions and thereby protecting systems against counterfeit components. The proposed method has been tested on both high-level instructions executed by microprocessors or Systems-on-Chip (serving as examples of software), and also logic circuits within FPGA fabrics and ASICs (serving as examples of hardware). The authentication information required by each digital system is generated using a pseudo-random number generator circuit and securely transmitted via near-field magnetic emissions. The authorized party can probe these emissions using a near-field probe, process the acquired signals to improve the signal-to-noise ratio (SNR), and then recover the secure information through matched filtering. Experimental results from commercial SoCs are used to demonstrate the proposed technique. Methods for reducing EM interference during integrity verification of both FPGAs and ASICs are also described.

47 OTHER INSTRUMENTATION↗

DOE OSTI2024

Report on laser-induced fluorescence transitions relevant for the microelectronics industry and sustainability applications

A wide variety of feed gases are used to generate low-temperature plasmas for the microelectronics and sustainability applications. These plasmas often have a complex combination of reactive and nonreactive species which may have spatial and temporal variations in density, temperature, and energy. Accurate knowledge of these parameters and their variations is critically important for understanding and advancing these applications through validated and predictive modeling and the design of relevant devices. Laser-induced fluorescence (LIF) provides both spatial and temporally resolved information about the plasma-produced radicals, ions, and metastables. However, the use of this powerful diagnostic tool requires the knowledge of optical transitions including excitation and fluorescence wavelengths which may not be available or scattered through a huge literature domain. In this paper, we collected, analyzed, and compiled the available transitions for laser-induced fluorescence for more than 160 chemical species relevant to the microelectronics industry and the sustainability applications. A list of species with overlapping LIF excitations and fluorescence wavelengths have been identified. Finally, this summary is intended to serve as a data reference for LIF transitions and should be updated in the future.

70 PLASMA PHYSICS AND FUSION TECHNOLOGY↗

DOE OSTI2023

Adaptive Discovery and Mixed-Variable Optimization of Next Generation Synthesizable Microelectronic Materials

Design of new microelectronic materials is characterized by several challenges such as high-dimensionality of the atomic structure-composition variable space, formidable cost of directly using high-fidelity simulations for design optimization, dispersity in literature-reported similar materials and synthesis methods, complex physical mechanisms, and mixed qualitative and quantitative design variables that lead to a disjointed design space. Even though machine learning (ML) techniques have been employed to expedite materials innovation, existing methods treat ML and design optimization as two separate processes, failing to resolve the fundamental challenges associated with high dimensionality and mixed-variable complexity. We have developed a ML enhanced mixed-variable material design optimization framework to efficiently extract useful information from existing data in literature and physics-based simulations to guide the autonomous search for optimal materials. Our proposed framework is composed of four computational modules: (1) a natural language processing (NLP) based virtual screening module, (2) classification based concept exploration module, (3) a density functional theory (DFT)-based high-fidelity evaluation model, and (4) a novel latent-variable Gaussian process (LVGP) ML model for mixed-variable problems with uncertainty quantification, which seamlessly integrates with Bayesian Optimization (BO) and achieves superb efficiency through embedded physics-based dimension reduction. Our approach is demonstrated and validated using the testbed of functional materials exhibiting metal-insulation transitions (MITs), with the targeted reversible resistivity changes (∼10^5) near room temperature. At the end of the 30-month project, we have developed a series of new ML techniques using NLP, conditional variational autoencoders, active learning, latent-variable Gaussian processes, integrated with Bayesian optimization. Our project has resulted in new predicted MITs compounds and improved understanding of MITs microscopic mechanisms, which in turn will revolutionize microelectronics science to provide energy-saving solutions. Our research has improved both creativity and efficiency in transforming rare-event discoveries of new functional materials to persistent innovations. In addition to open-sourcing the online MIT database and the classification model, the LVGP open source code has been downloaded more than 15,000 times within two years. More than 40 MIT compounds have been identified and many have been pursued experimentally via collaborators. The research results are published in close to 20 collaborative papers in high-impact journals, such as Chem. Mater., Appl. Phys. Rev., Sci. Rep., among others of design space.

36 MATERIALS SCIENCE↗

DOE OSTI2025

Unraveling fundamental mechanisms of silicon nitride crystallization in microelectronics manufacturing

This research project investigates the fundamental mechanisms of silicon nitride (SiN) crystallization, aiming to enhance the understanding of this critical material in microelectronics manufacturing. Through a collaborative effort between Sandia National Laboratories, the University of Tennessee, and the University of Florida, we developed a comprehensive framework that integrates experimental techniques, atomistic modeling, meso-scale simulations, and an integrated multi-scale model to capture this physical phenomenon on multiple time and length scales . The project developed a new machine learning based atomistic potential and utilized advanced phase field modeling to capture the complexities of polycrystalline growth and the influence of mechanical stresses on crystallization dynamics. By employing a grain tracker algorithm, the meso-scale model effectively identified and tracked individual crystal grains, enabling the simulation of anisotropic growth behaviors reflective of SiN’s physical properties. The integration of atomistic simulations with meso-scale modeling created a powerful multi-scale framework that validated atomistic inputs and enhanced predictive accuracy for crystallization dynamics at larger scales, validated experimentally. This adaptable modeling capability not only accelerates development times by informing manufacturing processes but also serves as a valuable starting point for understanding crystallization physics in similar materials. The insights gained from this research unlock new opportunities for the development of advanced materials tailored for future microelectronics and photonics applications. Overall, this project represents a significant advancement in understanding of fundamental physics of SiN and establishes a foundation for future research in material science, bridging the gap between atomic-level phenomena and macroscopic material behaviors for practical applications.

36 MATERIALS SCIENCE↗

DOE OSTI2025

Epitaxy of Emerging Materials and Advanced Heterostructures for Microelectronics and Quantum Sciences

Abstract Epitaxy, a process to prepare crystalline materials in nanostructures and thin films, is the core technology for preparing high‐quality materials as a key enabler of next‐generation microelectronics and quantum information system. Progress in epitaxy has been expanding the choice of materials and their heterostructures beyond the combinations limited by materials compatibility. However, the improvement of material quality, physical implementation of materials with unique properties, and integration of incommensurate materials in an architecture have been the challenging issues. Emerging materials, including 2D materials and quantum materials, have opened opportunities to study epitaxy mechanisms and realize various functional devices. Acceleration of discovery and progress in epitaxy research should be accomplished by “understanding of epitaxy under various circumstances at multiple length scales” and “integration of experiments and models.” In the perspective, a basic summary of the status of epitaxially grown materials, the challenges in epitaxy research, and integration of modeling epitaxy and ultimate control of the epitaxy process with advanced characterization techniques are discussed.

Materials Science↗

DOE OSTI2024

Science challenges and research opportunities for plasma applications in microelectronics

Low-temperature plasmas (LTPs) are essential to manufacturing devices in the semiconductor industry, from creating extreme ultraviolet photons used in the most advanced lithography to thin film etching, deposition, and surface modifications. It is estimated that 40%–45% of all process steps needed to manufacture semiconductor devices use LTPs in one form or another. LTPs have been an enabling technology in the multidecade progression of the shrinking of device dimensions, often referred to as Moore’s law. New challenges in circuit and device design, novel materials, and increasing demands to achieve environmentally benign processing technologies require advances in plasma technology beyond the current state-of-the-art. The Department of Energy Office of Science Fusion Energy Sciences held a workshop titled Plasma Science for Microelectronics Nanofabrication in August 2022 to discuss the plasma science challenges and technical barriers that need to be overcome to continue to develop the innovative plasma technologies required to support and advance the semiconductor industry. One of the key outcomes of the workshop was identifying a set of priority research opportunities (PROs) to focus attention on the most strategic plasma science challenges to address to benefit the semiconductor industry. For each PRO, scientific challenges and recommended strategies to address those challenges were identified. Furthermore, this article summarizes the PROs identified by the workshop participants.

36 MATERIALS SCIENCE↗