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Sn-InAs Nanowire Shadow-Defined Josephson Junctions

Hybrid superconductor–semiconductor platforms are foundational to advancing quantum information technologies, motivating the integration of materials with clean interfaces, robust superconductivity, and scalable architectures. Here, in this work, we report the synthesis and analysis of inclined InAs nanowires, conformally coated with β-Sn shells. These nanowires extend in opposite in-plane directions, forming a self-aligned, criss-cross network. This enables the deterministic formation of nanowire-shadow Josephson junctions through angle-controlled, low-temperature Sn deposition. Structural characterization shows uniform polycrystalline β-Sn shells forming a sharp, diffusion-free interface with InAs. Low-temperature transport measurements reveal a hard induced superconducting gap ≈ 600 μeV, switching currents up to ≈ 500 nA, and parallel magnetic field resilience beyond 1T. These results establish β-Sn/InAs nanowire networks as a promising platform for superconducting qubits, low-noise microwave devices, and the exploration of exotic superconducting phases including triplet pairing and topological superconductivity.

B-Sn

Transmon Qubit Using Sn as a Junction Superconductor

Superconductor qubits typically use aluminum–aluminum oxide tunnel junctions to provide the nonlinear inductance. Junctions with semiconductor barriers make it possible to vary the superconductor material and explore beyond aluminum. We use InAs semiconductor nanowires coated with thin superconducting shells of β-Sn to realize transmon qubits. By tuning the Josephson energy with a gate voltage, we adjust the qubit frequency over a range of 3 GHz. The longest energy relaxation time, T 1 = 27 μs, is obtained at the lowest qubit frequencies, while the longest echo dephasing time, T 2 = 1.8 μs, is achieved at higher frequencies. Finally, we assess the possible factors limiting coherence times in these devices and discuss steps to enhance performance through improvements in materials fabrication and circuit design.

B-Sn