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All sourcesNASA NTRSDOE OSTI
DOE OSTI2021

Demystifying asynchronous I/O Interference in HPC applications

With increasing complexity of HPC workflows, data management services need to perform expensive I/O operations asynchronously in the background, aiming to overlap the I/O with the application runtime. However, this may cause interference due to competition for resources: CPU, memory/network bandwidth. The advent of multi-core architectures has exacerbated this problem, as many I/O operations are issued concurrently, thereby competing not only with the application but also among themselves. Furthermore, the interference patterns can dynamically change as a response to variations in application behavior and I/O subsystems (e.g. multiple users sharing a parallel file system). Without a thorough understanding, I/O operations may perform suboptimally, potentially even worse than in the blocking case. To fill this gap, here we investigate the causes and consequences of interference due to asynchronous I/O on HPC systems. Specifically, we focus on multi-core CPUs and memory bandwidth, isolating the interference due to each resource. Then, we perform an in-depth study to explain the interplay and contention in a variety of resource sharing scenarios such as varying priority and number of background I/O threads and different I/O strategies: sendfile, read/write, mmap/write underlining trade-offs. The insights from this study are important both to enable guided optimizations of existing background I/O, as well as to open new opportunities to design advanced asynchronous I/O strategies.

97 MATHEMATICS AND COMPUTING↗
DOE OSTI2021

Interpreting Write Performance of Supercomputer I/O Systems with Regression Models

This work seeks to advance the state of the art in HPC I/O performance analysis and interpretation. In particular, we demonstrate effective techniques to: (1) model output performance in the presence of I/O interference from production loads; (2) build features from write patterns and key parameters of the system architecture and configurations; (3) employ suitable machine learning algorithms to improve model accuracy. We train models with five popular regression algorithms and conduct experiments on two distinct production HPC platforms. We find that the lasso and random forest models predict output performance with high accuracy on both of the target systems. We also explore use of the models to guide adaptation in I/O middleware systems, and show potential for improvements of at least 15% from model-guided adaptation on 70% of samples, and improvements up to 10× on some samples for both of the target systems.

Xie, Bing↗
DOE OSTI2025

SlimIO: Lightweight I/O Path Design for Write Isolation in FDP-backed In-Memory Databases

In-Memory Databases (IMDBs) are widely used with HPC applications to manage transient data, often using snapshot-based persistence for backups. Redis, a representative IMDB, employs both snapshot and Write-Ahead Log (WAL) mechanisms, storing data on persistent devices via the traditional kernel I/O path. This method incurs syscall overhead, I/O contention between processes, and SSD garbage collection (GC) delays. To address these issues, we propose SlimIO, which adopts I/O passthru to minimize syscall overhead and inter-process I/O interference. Additionally, it leverages Flexible Data Placement (FDP) SSDs as backup storage to avoid performance degradation from SSD GC. Experimental results show that SlimIO reduces snapshot time by up to 25%, increases query throughput by up to 30% during non-snapshot periods, and lowers 99.9%-ile latency by up to 50%. Furthermore, it achieves a write amplification factor (WAF) of 1.00, indicating no redundant internal writes, thus extending SSD lifespan.

Lee, Sangyun [Sogang University]↗
DOE OSTI2022

Design and implementation of dynamic I/O control scheme for large scale distributed file systems

In this paper, we have analyzed the input/output (I/O) activities of Cori, which is a high-performance computing system at the National Energy Research Scientific Computing Center at Lawrence Berkeley National Laboratory. Our analysis results indicate that most users do not adjust storage configurations but rather use the default settings. In addition, owing to the interference from many applications running simultaneously, the performance varies based on the system status. To configure file systems autonomously in complex environments, we developed DCA-IO, a dynamic distributed file system configuration adjustment algorithm that utilizes the system log information to adjust storage configurations automatically. Our scheme aims to improve the application performance and avoid interference from other applications without user intervention. Moreover, DCA-IO uses the existing system logs and does not require code modifications, an additional library, or user intervention. To demonstrate the effectiveness of DCA-IO, we performed experiments using I/O kernels of real applications in both an isolated small-sized Lustre environment and Cori. Our experimental results shows that our scheme can improve the performance of HPC applications by up to 263% with the default Lustre configuration.

97 MATHEMATICS AND COMPUTING↗
NASA NTRS2012

Ultra-Compact Motor Controller

This invention is an electronically commutated brushless motor controller that incorporates Hall-array sensing in a small, 42-gram package that provides 4096 absolute counts per motor revolution position sensing. The unit is the size of a miniature hockey puck, and is a 44-pin male connector that provides many I/O channels, including CANbus, RS-232 communications, general-purpose analog and digital I/O (GPIO), analog and digital Hall inputs, DC power input (18-90 VDC, 0-l0 A), three-phase motor outputs, and a strain gauge amplifier. This controller replaces air cooling with conduction cooling via a high-thermal-conductivity epoxy casting. A secondary advantage of the relatively good heat conductivity that comes with ultra-small size is that temperature differences within the controller become smaller, so that it is easier to measure the hottest temperature in the controller with fewer temperature sensors, or even one temperature sensor. Another size-sensitive design feature is in the approach to electrical noise immunity. At a very small size, where conduction paths are much shorter than in conventional designs, the ground becomes essentially isopotential, and so certain (space-consuming) electrical noise control components become unnecessary, which helps make small size possible. One winding-current sensor, applied to all of the windings in fast sequence, is smaller and wastes less power than the two or more sensors conventionally used to sense and control winding currents. An unexpected benefit of using only one current sensor is that it actually improves the precision of current control by using the "same" sensors to read each of the three phases. Folding the encoder directly into the controller electronics eliminates a great deal of redundant electronics, packaging, connectors, and hook-up wiring. The reduction of wires and connectors subtracts substantial bulk and eliminates their role in behaving as EMI (electro-magnetic interference) antennas. A shared knowledge by each motor controller of the state of all the motors in the system at 500 Hz also allows parallel processing of higher-level kinematic matrix calculations.

Townsend, William T.↗