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At least 19 records
All sourcesNASA NTRSDOE OSTI
NASA NTRS1989

Transient-mode liquid phase epitaxial growth of GaAs on GaAs-coated Si substrates prepared by migration-enhanced molecular beam epitaxy

Planar oxide-maskless growth of GaAs was demonstrated by transient-mode liquid phase epitaxy (TMLPE) on GaAs-coated Si substrates that were prepared by migration-enhanced molecular beam epitaxy (MEMBE). In TMLPE, the cool substrate was brought into contact with hot melts for a short time. A GaAs layer as thick as 30 microns was grown in 10 sec. The etch pits observed in TMLPE-grown layers became longer in one direction and decreased in density with increasing the TMLPE epilayer thickness. The density of etch pits in a 20 micron-thick layer was approximately 5 x 10 the 6th/sq cm. Strong bandgap emission elliptically polarized with a major axis perpendicular to the surface was observed at about 910 nm, while deep-level emission from the TMLPE/MEMBE GaAs interface was detected at 980 nm. The photoluminescence intensity divided by the carrier concentration of the TMLPE-grown layer was about 270 times larger than that of the MEMBE-grown layer used as a substrate.

Nakamura, Shuji↗
NASA NTRS1988

Simulation of GaAs cluster formation on GaAs(00-1), AlAs(00-1), Si(001), and As1/Si(001) surfaces

Recently developed semiempirical potential energy functions for the Ga-As-Si and Ga-As-Al systems have been applied here to determine the excess formation energy for GaAs clusters on GaAs(00-1), AlAs(00-1), Si(001), and one atomic layer As-covered Si(001) substrates as a function of cluster size and cluster shape by the Monte Carlo technique. Pyramidal type ledges on the GaAs clusters are found to be the favored ledge for the first three layers while an inverted-pyramidal type ledge is also favored in certain cases for the As1/Si(001) substrate. Cluster formation at ledges is compared with cluster formation on a flat terrace for the Si(001) and the As1/Si(001) substrates.

Choi, D. K.↗
NASA NTRS1986

GaAs Semi-Insulating Layer for a GaAs Device

Improved design for GaAs electronic device or integrated circuit designed to operate at cryogenic temperatures, customary SiO2 insulating layer replaced by semi-insulating layer of GaAs. Thermal expansions of device and covering layer therefore match closely, and thermal stresses caused by immersion in cryogenic chamber nearly eliminated.

Sherrill, G.↗
NASA NTRS1976

The optimization of Ga (1-x)Al (x)As-GaAs solar cells for air mass zero operation and a study of Ga (1-x)Al (x)As-GaAs solar cells at high temperatures, phase 1

The three types of solar cells investigated were: (1) one consisting of a nGaAs substrate, a Zn doped pGaAs region, and a Zn doped Ga(1-x)Al(x)As layer, (2) one consisting of an nGaAs substrate, a Ge doped pGaAs region, and a pGa(1-x)Al(x)As upper layer, and (3) one consisting of an n+GaAs substrate, an nGa(1-x)Al(X)As region, a pGa(1-x)Bl(X) As region, and a pGa(1-y)Al(y)As upper layer. In all three cases, the upper alloy layer is thin and of high Al composition in order to obtain high spectral response over the widest possible range of photon energies. Spectral response, capacitance-voltage, current-voltage, diffusion length, sunlight (or the equivalent)-efficiency, and efficiency-temperature measurements were made as a function of device parameters in order to analyze and optimize the solar cell behavior.

Hovel, H. J.↗
NASA NTRS1983

Leakage effects in n-GaAs MESFET with n-GaAs buffer layer

Whereas improvement of the interface between the active layer and the buffer layer has been demonstrated, the leakage effects can be important if the buffer layer resistivity is not sufficiently high and/or the buffer layer thickness is not sufficiently small. It was found that two buffer leakage currents exist from the channel under the gate to the source and from drain to the channel in addition to the buffer leakage resistance between drain and source. It is shown that for a 1 micron gate-length n-GaAs MESFET, if the buffer layer resistivity is 12 OHM-CM and the buffer layer thickness h is 2 microns, the performance of the device degrades drastically. It is suggested that h should be below 2 microns.

Wang, Y. C.↗
NASA NTRS1974

Ellipsometric measurements of epitaxial GaAs layers on a GaAs substrate

An extensive examination of ellipsometric equations for anisotropic surfaces and films is reported. It is shown that the reflection matrix can be calculated by writing Maxwell's equations in 6 x 6 matrix form and by applying appropriate boundary conditions at proper points in the development of the formalism, reducing the equation for the propagation of light to an eigenvalue problem using a 4 x 4 matrix.

Desmet, D. J.↗
NASA NTRS2005

High Quality GaAs Growth by MBE on Si Using GeSi Buffers and Prospects for Space Photovoltaics

III-V solar cells on Si substrates are of interest for space photovoltaics since this would combine high performance space cells with a strong, lightweight and inexpensive substrate. However, the primary obstacles blocking III-V/Si cells from achieving high performance to date have been fundamental materials incompatabilities, namely the 4% lattice mismatch between GaAs and Si, and the large mismatch in thermal expansion coefficient. In this paper, we report on the molecular beam epitaxial (MBE) growth and properties of GaAs layers and single junction GaAs cells on Si wafers which utilize compositionally graded GeSi Intermediate buffers grown by ultra-high vacuum chemical vapor deposition (UHVCVD) to mitigate the large lattice mismatch between GaAs and Si. Ga As cell structures were found to incorporate a threading dislocation density of 0.9-1.5 x 10 (exp 6) per square centimeter, identical to the underlying relaxed Ge cap of the graded buffer, via a combination of transmission electron microscopy, electron beam induced current, and etch pit density measurements. AlGaAs/GaAs double heterostructures wre grown on the GeSi/Si substrates for time-resolved photoluminescence measurements, which revealed a bulk GaAs minority carrier lifetime in excess of 10 ns, the highest lifetime ever reported for GaAs on Si. A series of growth were performed to ass3ss the impact of a GaAs buffer to a thickness of only 0.1 micrometer. Secondary ion mass spectroscopy studies revealed that there is negligible cross diffusion of Ga, As and Ge at he III-V/Ge interface, identical to our earlier findings for GaAs grown on Ge wafers using MBE. This indicates that there is no need for a buffer to "bury" regions of high autodopjing,a nd that either pn or np configuration cells are easily accomodated by these substrates. Preliminary diodes and single junction Al Ga As heteroface cells were grown and fabricated on the Ge/GeSi/Si substrates for the first time. Diodes fabricated on GaAs, Ge and Ge/GeSi/Si substrate show nearly identical I-V characteristics in both forward and reverse bias regions. External quantum efficiencies of AlGaAs/GaAs cell structures grown on Ge/GeSi/Si and Ge substrates demonstrated nearly identical photoresponse, which indicates that high lifetimes, diffusion lengths and efficient minority carrier collection is maintained after complete cell processing.

Carlin, J. A.↗
NASA NTRS1993

Investigation of ZnSe-coated silicon substrates for GaAs solar cells

Studies are being carried out to determine the feasibility of using ZnSe as a buffer layer for GaAs solar cells grown on silicon. This study was motivated by reports in the literature indicating ZnSe films had been grown by metallorganic chemical vapor deposition (MOCVD) onto silicon with EPD values of 2 x 10(exp 5) cm(sup -2), even though the lattice mismatch between silicon and ZnSe is 4.16 percent. These results combined with the fact that ZnSe and GaAs are lattice matched to within 0.24 percent suggest that the prospects for growing high efficiency GaAs solar cells onto ZnSe-coated silicon are very good. Work to date has emphasized development of procedures for MOCVD growth of (100) ZnSe onto (100) silicon wafers, and subsequent growth of GaAs films on ZnSe/Si substrates. In order to grow high quality single crystal GaAs with a (100) orientation, which is desirable for solar cells, one must grow single crystal (100) ZnSe onto silicon substrates. A process for growth of (100) ZnSe was developed involving a two-step growth procedure at 450 C. Single crystal, (100) GaAs films were grown onto the (100) ZnSe/Si substrates at 610 C that are adherent and specular. Minority carrier diffusion lengths for the GaAs films grown on ZnSe/Si substrates were determined from photoresponse properties of Al/GaAs Schottky barriers. Diffusion lengths for n-type GaAs films are currently on the order of 0.3 microns compared to 2.0 microns for films grown simultaneously by homoepitaxy.

Huber, Daniel A.↗
NASA NTRS1979

Present status of GaAs

An extensive literature survey on GaAs was carried out for the period December 31, 1970, to December 31, 1977. The increasing interest in GaAs device structures increased steadily during that period. The leading research and development centers and the specific areas of interest were identified. A workshop on GaAs was held in November 1977 to assess the present status of melt-grown GaAs and the existing needs for reliable chemical, structural, and electronic characterization methods. It was concluded that the present available bulk GaAs crystals are of poor quality and that GaAs technology is lagging demonstrated or potentially feasible GaAs devices and systems.

Gatos, H. C.↗
NASA NTRS1982

Defects and annealing studies in 1-Me electron irradiated (AlGa)As-GaAs solar cells

The deep-level defects and recombination mechanisms in the one-MeV electron irradiated (AlGa)As-GaAs solar cells under various irradiation and annealing conditions are discussed. Deep-level transient spectroscopy (DLTS) and capacitance-voltage (CV) techniques were used to determine the defect and recombination parameters such as energy levels and defect density, carrier capture cross sections and lifetimes for both electron and hole traps as well as hole diffusion lengths in these electron irradiated GaAs solar cells. GaAs solar cells used in this study were prepared by the infinite solution melt liquid phase epitaxial (LPE) technique at Hughes Research Lab., with (Al0.9Ga0.1)-As window layer, Be-diffused p-GaAs layer on Sn-doped n-GaAs or undoped n-GaAs active layer grown on n(+)-GaAs substrate. Mesa structure with area of 5.86x1000 sq cm was fabricated. Three different irradiation and annealing experiments were performed on these solar cells.

Li, S. S.↗
NASA NTRS1985

Performance and temperature dependencies of proton irradiated n/p GaAs and n/p silicon cells

The n/p homojunction GaAs cell is found to be more radiation resistant than p/nheteroface GaAs under 10 MeV proton irradiation. Both GaAs cell types outperform conventional silicon n/p cells under the same conditions. An increase temperature dependency of maximum power for the GaAs n/p cells is attributed largely to differences in Voc between the two GaAs cell types. These results and diffusion length considerations are consistent with the conclusion that p-type GaAs is more radiation resistant than n-type and therefore that the n/p configuration is possibly favored for use in the space radiation environment. However, it is concluded that additional work is required in order to choose between the two GaAs cell configurations.

Weinberg, I.↗
NASA NTRS1985

Performance and temperature dependencies of proton irradiated n/p and p/n GaAs and n/p silicon cells

n/p homojunction GaAs cells are found to be more radiation resistant than p/n heteroface GaAs under 10 MeV proton irradiation. Both GaAs cell types outperform conventional silicon n/p cells under the same conditions. An increased temperature dependency of maximum power for the GaAs n/p cells is attributed to differences in Voc between the two GaAs cell types. These results and diffusion length considerations are consistent with the conclusion that p-type GaAs is more radiation resistant than n-type and therefore that the n/p configuration is possibly favored for use in the space radiation environment. However, it is concluded that additional work is required in order to choose between the two GaAs cell configurations.

Weinberg, I.↗
NASA NTRS1987

Growth and characterization of molecular beam epitaxial GaAs layers on porous silicon

GaAs layers have been grown on porous silicon (PS) substrates with good crystallinity by molecular beam epitaxy. In spite of the surface irregularity of PS substrates, no surface morphology deterioration was observed on epitaxial GaAs overlayers. A 10-percent Rutherford backscattering spectroscopy minimum channeling yield for GaAs-on-PS layers as compared to 16 percent for GaAs-on-Si layers grown under the same condition indicates a possible improvement of crystallinity when GaAs is grown on PS. Transmission electron microscopy reveals that the dominant defects in the GaAs-on-PS layers are microtwins and stacking faults, which originate from the GaAs/PS interface. GaAs is found to penetrate into the PS layers. n-type GaAs/p-type PS heterojunction diodes were fabricated with good rectifying characteristics.

Lin, T. L.↗
NASA NTRS1997

ZnSe Window Layers for GaAs and GaInP2 Solar Cells

This report concerns studies of the use of n-type ZnSe as a window layer for n/p GaAs and GaInP2 solar cells. Emphasis was placed in this phase of the project on characterizing the interface between n-type ZnSe films grown on epi-GaAs films grown onto single crystal GaAs. Epi-GaAs and heteroepitaxial ZnSe films were grown by MOCVD with a Spire 50OXT Reactor. After growing epitaxial GaAs films on single crystal GaAs wafers, well-oriented crystalline ZnSe films were grown by MOCVD. ZnSe films were grown with substrate temperatures ranging from 250 C to 450 C. Photoluminescence studies carried out by researchers at NASA Lewis determined that the surface recombination velocity at a GaAs surface was significantly reduced after the deposition of a heteroepitaxial layer of ZnSe. The optimum temperature for ZnSe deposition appears to be on the order of 350 C.

Olsen, Larry C.↗
NASA NTRS2005

GaAs QWIP Array Containing More Than a Million Pixels

A 1,024 x 1,024-pixel array of quantum-well infrared photodetectors (QWIPs) has been built on a 1.8 x 1.8- cm GaAs chip. In tests, the array was found to perform well in detecting images at wavelengths from 8 to 9 m in operation at temperatures between 60 and 70 K. The largest-format QWIP prior array that performed successfully in tests contained 512 x 640 pixels. There is continuing development effort directed toward satisfying actual and anticipated demands to increase numbers of pixels and pixel sizes in order to increase the imaging resolution of infrared photodetector arrays. A 1,024 x 1,024-pixel and even larger formats have been achieved in the InSb and HgCdTe material systems, but photodetector arrays in these material systems are very expensive and manufactured by fewer than half a dozen large companies. In contrast, GaAs-photodetector-array technology is very mature, and photodetectors in the GaAs material system can be readily manufactured by a wide range of industrial technologists, by universities, and government laboratories. There is much similarity between processing in the GaAs industry and processing in the pervasive silicon industry. With respect to yield and cost, the performance of GaAs technology substantially exceeds that of InSb and HgCdTe technologies. In addition, GaAs detectors can be designed to respond to any portion of the wavelength range from 3 to about 16 micrometers - a feature that is very desirable for infrared imaging. GaAs QWIP arrays, like the present one, have potential for use as imaging sensors in infrared measuring instruments, infrared medical imaging systems, and infrared cameras.

Jhabvala, Murzy↗
DOE OSTI2024

Planarizing Spalled GaAs(100) Surfaces by MOVPE Growth

III-V photovoltaic devices have demonstrated exceptional performance across various applications, with controlled crystal fracturing, known as controlled spalling, emerging as a promising method to reduce costs by enabling substrate reuse. Spalling GaAs(100) substrates, a commonly used substrate in III-V photovoltaics, results in faceted ridges that must be planarized to grow high-quality photovoltaic devices. Here, in this study, we demonstrate that a GaAs(100) wafer offcut toward [$0\bar{11}$] and spalled toward [$011$] can be efficiently planarized by growing C:GaAs by metal-organic vapor phase epitaxy (MOVPE) on the surface, with up to 95% of the nominally deposited material used to fill the valleys between ridges. We find that reducing the offcut to 2° enhances the planarizing capability of C:GaAs. A surface morphology model indicates that the density of surface dangling bonds significantly influences the growth evolution of undoped GaAs surfaces. In contrast, the model suggests that the effectiveness of C:GaAs as a smoothing layer stems from modifying the atomic surface structure and, consequently, the associated sticking coefficients of the facets, which can alter the evolution of surface morphology. Our findings provide guidelines for the epitaxial planarization of semiconductor surfaces and improve the understanding of MOVPE growth on nonplanar surfaces.

14 SOLAR ENERGY↗