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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 19 records
All sourcesNASA NTRSDOE OSTI
DOE OSTI2025

Cracking in polymer substrates for flexible electronic devices and its mitigation

Mechanical reliability plays a critical role in determining the durability of flexible electronic devices because of the significant mechanical stresses they experience during manufacturing and operation. Many such devices are built on sheets comprising stiff transparent-conducting oxide (TCO) electrode films on compliant polymer substrates, and it is generally assumed that the high-toughness polymer substrates do not crack. Contrary to this assumption, here we show extensive cracking in the polymer substrates during bending of a variety of TCO/polymer sheets, and a device example — flexible perovskite solar cells. Such substrate cracking, which compromises the overall mechanical integrity of the entire device, is driven by the amplified stress-intensity factor caused by the elastic mismatch at the film/substrate interface. To mitigate this substrate cracking, an interlayer-engineering approach is designed and experimentally demonstrated. This approach is potentially applicable to myriad flexible electronic devices, with stiff films on compliant substrates, for improving their durability and reliability.

42 ENGINEERING↗
DOE OSTI2025

Two-step spin-coating of vacancy-ordered double perovskites enables growth of thin films for electronic devices

Vacancy-ordered double perovskites (VODPs), such as Cs 2 TeX 6 (X = Cl, Br, I), are lead-free alternatives to conventional metal-halide perovskites (MHPs). One limitation of VODPs is the lack of processes to form thin films relevant for physical characterization and electronic devices. A two-step spin-coating method was developed for synthesizing high-quality films of Cs 2 TeBr 6 . Independently depositing CsBr and TeBr 4 enables high precursor concentrations and control over crystallization kinetics. By optimizing the spin-coating parameters, conversion of precursors to phase pure films was observed using structural and surface characterization methods. The growth of mixed-halide systems was investigated using alternative salts including CsCl and CsI. The formation of halide alloys was found to depend on the existence of routes to byproducts. Lastly, single carrier diodes of Cs2TeBr6 were designed following valence band characterization with photoelectron spectroscopy. Temperature-dependent space-charge-limited current measurements revealed that transport occurs by hopping and the hole mobility is 3.2 × 10 −5 cm 2 V −1 s −1 near room temperature. As a result, the insights from the 2-step procedure provide a pathway towards making semiconducting devices from VODPs.

Kuklinski, Owen [University of California, Santa B↗
DOE OSTI2025

Scalable fabrication of Chip-integrated 3D-nanostructured electronic devices via DNA-programmable assembly

DNA-based self-assembly methods have demonstrated powerful and unique capabilities to encode nanomaterial structures through the prescribed placement of inorganic and biological nanocomponents. However, the challenge of selectively growing DNA superlattices on specific locations of surfaces and their integration with conventional nanofabrication has hindered the fabrication of three-dimensional (3D) DNA-assembled functional devices. Here, we present a scalable nanofabrication technique that combines bottom-up and top-down approaches for selective growth of 3D DNA superlattices on gold microarrays. This approach allows for the fabrication of self-assembled 3D-nanostructured electronic devices. DNA strands are bound onto the gold arrays, which anchor DNA origami frames and promote ordered framework growth on the specific areas of the surface, enabling control of the lateral placement and orientation of superlattices. DNA frameworks selectively grown on the pads are subsequently templated to nanoscale silica and tin oxide (SnO x ) that follow the architecture, as confirmed by structural and chemical characterizations. The fabricated SnO x superlattices are integrated into devices that demonstrate photocurrent response.

36 MATERIALS SCIENCE↗
DOE OSTI2024

From wide to ultrawide-bandgap semiconductors for high power and high frequency electronic devices

Abstract Wide and ultrawide-bandgap (U/WBG) materials have garnered significant attention within the semiconductor device community due to their potential to enhance device performance through their substantial bandgap properties. These exceptional material characteristics can enable more robust and efficient devices, particularly in scenarios involving high power, high frequency, and extreme environmental conditions. Despite the promising outlook, the physics of UWBG materials remains inadequately understood, leading to a notable gap between theoretical predictions and experimental device behavior. To address this knowledge gap and pinpoint areas where further research can have the most significant impact, this review provides an overview of the progress and limitations in U/WBG materials. The review commences by discussing Gallium Nitride, a more mature WBG material that serves as a foundation for establishing fundamental concepts and addressing associated challenges. Subsequently, the focus shifts to the examination of various UWBG materials, including AlGaN/AlN, Diamond, and Ga 2 O 3 . For each of these materials, the review delves into their unique properties, growth methods, and current state-of-the-art devices, with a primary emphasis on their applications in power and radio-frequency electronics.

Materials Science↗
DOE OSTI2024

High-performance 2D electronic devices enabled by strong and tough two-dimensional polymer with ultra-low dielectric constant

As the feature size of microelectronic circuits is scaling down to nanometer order, the increasing interconnect crosstalk, resistance-capacitance (RC) delay and power consumption can limit the chip performance and reliability. To address these challenges, new low-k dielectric (k < 2) materials need to be developed to replace current silicon dioxide (k = 3.9) or SiCOH, etc. However, existing low-k dielectric materials, such as organosilicate glass or polymeric dielectrics, suffer from poor thermal and mechanical properties. Two-dimensional polymers (2DPs) are considered promising low-k dielectric materials because of their good thermal and mechanical properties, high porosity and designability. Here, we report a chemical-vapor-deposition (CVD) method for growing fluoride rich 2DP-F films on arbitrary substrates. We show that the grown 2DP-F thin films exhibit ultra-low dielectric constant (in plane k = 1.85 and out-of-plane k = 1.82) and remarkable mechanical properties (Young’s modulus > 15 GPa). We also demonstrated the improved performance of monolayer MoS 2 field-effect-transistors when utilizing 2DP-F thin films as dielectric substrates.

36 MATERIALS SCIENCE↗
DOE OSTI2026

DISARM: Target Electronic Device Informed Mitigation of Software Runtime Side-Channel Vulnerabilities

Program runtime/timing attacks exploit variations in a program’s execution times to extract sensitive information from the program (e.g. encryption keys, sensitive variable data, intellectual property). State-of-the-art solutions to runtime side-channel attacks attempt to balance the execution time of the sensitive code for different control flow paths to eliminate the timing leakage. However, during the mitigation process, most techniques do not consider the underlying hardware/device on which the target program is supposed to run on. This can lead to over-fixing (unnecessary extra operations), under-fixing (not solving the imbalance properly), and even failures. Here, we propose DISARM, a joint hardware-software methodology (unlike any existing solution) for mitigating runtime side-channel vulnerabilities that utilizes timing values from real embedded devices to generate targeted software fixes. We implement DISARM to support C/C++/Java source codes and validate it across 22 standard benchmarks. DISARM outperforms state-of-the-art solutions such as PENDULUM and DifFuzzaR in terms of execution time overhead, code size overhead, and correctness on five different embedded/edge devices.

Timing/runtime side-channel↗
DOE OSTI2024

Three dimensional vertically structured electronic devices

An apparatus includes at least one vertical transistor, where the at least one vertical transistor includes: a substrate including a first semiconductor material, an array of three dimensional (3D) structures above the substrate, a sidewall heterojunction layer positioned on at least one vertical sidewall of each 3D structure, and an isolation region positioned between the 3D structures. Each 3D structure includes the first semiconductor material. The sidewall heterojunction layer includes a second semiconductor material, where the first and second semiconductor material have different bandgaps.

Conway, Adam↗
DOE OSTI2025

Using radioactive material to evaluate decontamination of contaminated electronics

Electronic materials are used everywhere and can get easily contaminated by their use in the field/laboratory. The goal of this project was to use radioactive material to track the effectiveness of a cleaning procedure using an off-the-shelf cleaning gel. Radioactive potassium bromide (KBr) was used as a model contaminant in four contamination scenarios to gauge the effectiveness of a cleaning gel in the decontamination of contaminated raspberry pi’s. Finally, the investigated decontamination technique was found to be 75–97% effective in removing contamination from the tested electronic devices. 95% of the contaminated electronic devices retained their functionality post-decontamination.

38 - RADIATION CHEMISTRY, RADIOCHEMISTRY, AND NUCL↗
DOE OSTI2025

Existing Methods for Grid Strength Assessment and Role of Hydropower in Future Grids

The power system is undergoing rapid evolution with increasing penetration of inverter-based resources (IBRs), large loads, microgrids, and power electronic devices. Ensuring reliable and stable operation of the modern power grid is a multi-faceted challenge that requires detailed understanding of this complex system. Dynamic stability is a major concern in maintaining the security of power grids as the generation mixes and large loads transitions to include high shares of power electronic devices. The operation of IBRs in regions with low system strength and higher grid impedances has been found to be the main reason behind many of the power system instabilities that manifest themselves in various types of oscillations and interactions that, if not properly addressed and damped, can jeopardize the reliable operation of the power system. Weak grid conditions compound such stability problems, particularly when many IBRs operate in proximity to and connect to weak power grids. Therefore, it is important to assess grid strength for planning, integration and operation of IBRs for a given power system. In this report, we aim to understand and classify existing methodologies for grid strength assessment, along with their limitations and future needs. Further, we aim to utilize the huge untapped potential in utilizing hydro energy resources in addressing some of the pertinent challenges of grid strength and reliable operation of modern power systems. Hydropower, historically valued for its flexibility and dispatchability, now faces new constraints due to reduced share of synchronous machines in the generation mix and seasonal variability of available water resources. Yet, these same plants present untapped potential beyond energy generation - notably, as providers of critical grid services. This report explores how hydropower plants, particularly through operation as synchronous condensers, can play a pivotal role in strengthening the grid amid evolving system dynamics.

13 HYDRO ENERGY↗
DOE OSTI2025

Thin-Film Fracture Behavior for Diketopyrrolopyrrole Semiconducting Polymeric Films

Fracture energy, which quantifies a material’s resistance to the propagation of a pre-existing crack, is a key parameter for ensuring the mechanical reliability of stretchable organic electronic devices. However, most existing methods, such as a four-point bending fracture energy, utilized for measuring the fracture energy of semiconducting polymeric thin films are complicated by substrate effects, making it challenging to isolate the intrinsic behavior of the film from interfacial influences. In this study, we employed a pseudo free-standing pure shear method to systematically investigate the cohesive fracture energy of poly(diketopyrrolopyrrole-terthiophene) P(DPP-T)-based thin films to examine the effects of nanoconfinement, side chain length, degree of crystallinity, and strain rates. This method effectively eliminates substrate interference, enabling a direct assessment of the cohesive fracture energy of P(DPP-T) thin films. We found that thinner films and those with lower molecular weights exhibited significantly reduced fracture energies due to diminished chain entanglements. Additionally, films with shorter side chains displayed notably higher fracture energies, which were attributed to an increase in the degree of crystallinity. Finally, slower strain rates led to higher fracture energies, consistent with an enhanced stress relaxation. These insights offer practical guidelines for designing mechanically robust semiconducting polymers, contributing to the advancement of reliable, durable, flexible, and wearable electronic devices.

Zhang, Song [Univ. of Southern Mississippi, Hattie↗
DOE OSTI2025

Nanoscale Editing of Multi and Single Layer Tungsten Disulfide via Gas‐Assisted Focused Electron Beam Induced Etching for Device Prototyping

Focused electron beam induced etching (FEBIE) with XeF 2 (xenon difluoride) precursor is conducted on multi-layer exfoliated WS 2 (tungsten disulfide) and monolayer WS 2 grown by chemical vapor deposition (CVD). The films are characterized by atomic force microscopy (AFM) and Raman and photoluminescence (PL) spectroscopy post-etching. The etch rates/efficiencies are reported as a function of electron beam energy, current, dwell time, and XeF 2 pressure. Bulk film Raman spectra are unchanged post-FEBIE, indicating minimal subsurface damage. Monolayer WS 2 shows a decrease in Raman and PL intensity post-FEBIE, with a dose-to-clear of ≈2 nC µm −2 . The study reveals regimes affected by the various mass transport contributions such as refresh time and the ratio of electrons/XeF 2 . Spontaneous etching was discovered during FEBIE of large patterned areas due to the long frame/refresh times. Density functional theory and ab initio molecular dynamics simulations compares desorption of SF x and WF x molecules from pristine WS 2 basal planes and pore edges, revealing the spontaneous etching is consistent with etching of partially etched monolayers during each frame. Single-line etching width of 21 nm, and patterning flakes into 100 nm wide channels are demonstrated. In conclusion, this work demonstrates the possibility of editing WS 2 flakes into electronic devices of arbitrary dimensions for semiconductor applications.

2D materials↗
DOE OSTI2025

Benchmarking Density Functional Theory Methods for Efficient Calculations of a Strongly Correlated Li 1– x Ni 1– y O 2−δ System

Transition metal oxides (TMOs), such as LiNiO 2 , are promising candidates for energy storage and electronic devices due to their unique electronic properties, exceptional physical and chemical characteristics, and ability to adopt multiple oxidation states. However, accurately predicting their properties using mean-field density functional theory (DFT) is challenging due to the presence of strongly correlated d-electrons and the complex interplay between their structural, electronic, and magnetic responses. These challenges are further exacerbated by the need to model defects, surfaces, and interfaces, which require computationally efficient, large-scale simulations. To address these issues, we carry out a benchmark study on the Li 1–x NiO 2 system, evaluating the performance of several popular functionals. Our findings demonstrate that combining SCAN functional relaxation with single-step HSE calculations provides a practical and scalable computational strategy. This approach balances accuracy and efficiency, enabling high-throughput simulations of strongly correlated TMOs and improved predictive modeling capability of TMOs for practical applications.

25 ENERGY STORAGE↗
DOE OSTI2026

Characterization of Electronic Stress-Induced Changes in Multilayer MoS 2

Transition metal dichalcogenides like molybdenum disulfide (MoS 2 ) are compelling for next-generation electronic devices. In this work, we investigate the impact of electronic stress on MoS 2 to illustrate that observational and phenomenological information on multiple devices can be useful to describe changes in the device, and caution against the rationalization of paltry results as representative or correlative to device behavior. Here, we stress MoS 2 by applying a sustained 20 V DC bias to study the material’s response. Post-stress electronic characterization revealed nonuniform shifts in current–voltage (I–V) behavior alongside microscale changes. Complementary mechanical, spectroscopic, and scanning microwave impedance measurements showed that stress-induced features locally modulate stiffness, surface potential, Raman intensity, and charge carrier density. We correlated I–V behavior with morphological features (wrinkles, tears, folds, height) and device-level geometry (MoS 2 overlap with electrodes, channel area, contact length) on 50 test structures across five chips to move beyond anecdotal conclusions. We found no universal correlations before DC stress. However, device-level geometry was correlated with I–V behavior after DC stress, suggesting that electrode contacts play a more dominant role than morphology in determining performance. Delamination and thinning induced by DC stress led to localized reductions in charge carrier density within the affected regions. Further, delamination and thinning appear to map to I–V device performance in a few samples, but the correlation is lost when a larger sample size is considered. This suggests significant sample-to-sample variability in surface electronic states of the test structures. We also discuss how environmental factors introduced during fabrication may contribute to the observed heterogeneous device response. Progress will require high-resolution, multimodal analysis across many samples constructed under controlled, clean conditions. By building data sets that capture variability, we can better identify the true drivers of performance.

36 MATERIALS SCIENCE↗
DOE OSTI2026

Recycling of Printed Circuit Boards to Recover Critical Materials

The printed circuit board (PCB), a central component of most electronic devices, represents a significant fraction of the electronic product waste stream. The complex composition of PCBs, consisting of metals, polymers, and fiberglass, requires specialized recovery steps to reclaim valuable and critical materials and the safe disposal of brominated compounds. In this review paper, we describe the current state of critical material recovery and traditional recycling technologies and identify key obstacles to large-scale implementation. Metals present at high concentrations, such as copper, lead, and iron, are conventionally recovered from PCBs using hydrometallurgical, pyrometallurgical, or electrometallurgical processes. Hydrometallurgical methods achieve high selectivity through chemical leaching but pose significant challenges for effluent and reagent recovery. Pyrometallurgical methods facilitate rapid metal separation through smelting but require substantial energy and may release harmful gases. Electrometallurgical techniques produce high-purity metals but are constrained by pretreatment requirements and the consumption of energy. The non-metallic fraction of PCB waste is recycled using thermochemical conversion, microwave-aided heating, and direct recycling of epoxy–fiberglass composites, enabling material or energy recovery. The recovered polymer from direct recycling may have reduced mechanical strength and poor compatibility with new polymer matrices, and the resulting products from the thermal conversion suffer from incomplete conversion, degradation of quality, and residual contamination, as compared to synthetic polymers. Recent process developments have focused on extracting rare earth and supply-critical materials present at lower concentrations in the waste stream. The literature on existing and emerging approaches for recycling PCB wastes is reviewed to identify sustainable, economically viable, and environmentally responsible strategies for the recovery and reuse of critical materials from waste streams.

36 MATERIALS SCIENCE↗
DOE OSTI2025

Probing the Effects of the First Atomic Layer on the Dynamic Behavior of Sub-2 nm MgO/Al 2 O 3 Memristors

As electronic devices continue to scale down from the current sub-5 nm range, atomic-scale control of defects becomes increasingly crucial to suppressing their impact on the physical properties of the devices. Memristors present an excellent example as a nonlinear and dynamic device with high speed and endurance required for electronic applications ranging from neuromorphic computing to nonvolatile memories. Herein we investigate the impact of atomic defects in sub-2 nm thick MgO/Al 2 O 3 atomic layer stack (ALS) memristors that use an M1 (switching layer)/M2 (oxygen vacancy reservoir layer) bilayer structure grown using in vacuo atomic layer deposition (iALD). Intriguingly, we revealed a direct correlation of the atomic defects in the M2 layer with the memristor dynamic behavior using a combined analysis of in situ scanning tunneling spectroscopy (iSTS) on the M2 layer and ex situ characterization on the memristors. Specifically, incomplete coverage of the 1st ALD atomic layer of M2 on the electrode yields defects at the M2/electrode interface. Despite the monotonic increase of ALD coverage, by almost three-fold from ~30% to >90%, at completion of the M2 layer of ~ 0.7 nm in thickness, the impact of the defects on the M2/electrode interface has been found detrimental to both memristor switching speed and endurance. Guided by atomistic simulation, we addressed the issue of interface defects via tuning of the Al surface hydroxylation to increase the first atomic layer ALD coverage to ~75%, leading to improved memristor switching speed and endurance by several orders of magnitude. In conclusion, these findings shed light on the correlation between the atomic defects and the dynamic behavior of sub-2 nm memristors and the importance of minimizing the atomic defects in memristors for future electronic applications.

Atomic Layer Deposition↗