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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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System-on-chip integrated circuit technology applications on the DIII-D tokamak for multi-field measurements
Several mm-wave diagnostics on the DIII-D tokamak provide multi-scale and multi-dimensional measurements of plasma profile evolution and turbulence fluctuations. Mm-wave fusion plasma diagnostics that adopt system-on-chip integrated circuit technology can provide better space utilization, flexible installation, and improved sensitivity. In order to further extend this technology for additional fusion facilities with a higher toroidal magnetic field, V-band (55–75 GHz) and F-band (90–140 GHz) chips for Microwave Imaging Reflectometer (MIR) and Electron Cyclotron Emission Imaging (ECEI) instruments are developed and tested in the Davis Millimeter Wave Research Center (DMRC). Current measurement data show that correlation between these SoC-based diagnostic instruments with other state-of-the-art diagnostics enables co-located multi-field turbulence fluctuation measurement.
The Simulation and Design of an On-Chip Superconducting Millimetre Filter-Bank Spectrometer
Abstract Superconducting on-chip filter banks provide a scalable, space saving solution to create imaging spectrometers at millimetre and submillimetre wavelengths. We present an easy to realise, lithographed superconducting filter design with a high tolerance to fabrication error. Using a capacitively coupled $$\lambda /2$$ λ / 2 microstrip resonator to define a narrow ( $$\lambda /\Delta \lambda = 300$$ λ / Δ λ = 300 ) spectral pass band, the filtered output of a given spectrometer channel directly connects to a lumped-element kinetic inductance detector. We show the tolerance analysis of our design, demonstrating $$<11\%$$ < 11 % change in filter quality factor to any one realistic fabrication error and a full filter-bank efficiency forecast to be 50% after accounting for fabrication errors and dielectric loss tangent.
Kinematic chip to chip bonding
The various technologies presented herein relate to integrating an IC having at least one waveguide incorporated therein with a v-groove array IC such that an optical fiber located in a v-groove is aligned relative to a waveguide in the IC maximizing optical coupling between the fiber and the waveguide. The waveguide IC and the v-groove array IC are bonded in a stacked configuration. Alignment of the waveguide IC and the array IC in the stacked configuration enables advantage to be taken of lithographic accuracy of features formed with respect to the Z-direction. Further, kinematic pins and sockets are utilized to provision accuracy in the X- and Z-directions, wherein advantage is taken of the placement accuracy and fabrication tolerance(s) which can be utilized when forming the and sockets. Accordingly, automated alignment of the waveguide IC and the array IC is enabled, facilitating accurate alignment of the respective waveguides and fibers.
China’s Bid To Lead Artificial Intelligence Chip Development within the Decade
In 2017, the Chinese government announced an ambitious, broad strategy to become the global leader in artificial intelligence (AI) theories, technologies, and applications by 2030 and indicated that China’s ability to indigenously produce cutting-edge AI chips would be integral to its success. China’s goal to become a dominant producer of AI hardware within a decade is a bold undertaking because China faces domestic chip production challenges and fierce competition from US chip producers. Our review of Chinese AI chip product lines shows various levels where Chinese companies compete with global firms in the production chain. China lacks a robust indigenous AI chip production infrastructure, and the United States and its allies are tightening controls on the supply of advanced semiconductor manufacturing equipment (SME) and electronic design automation (EDA) software to China. In contrast to their Chinese counterparts, US companies operate in all areas of AI chip production and have consistently driven the development of new chip designs. AI chip production is a costly endeavor, and China’s chip producers currently lack the customer base to lead global AI chip development by the 2030 goal. An expanded customer base may help China attract the necessary expertise to bolster its AI chip production chain. This would also help Chinese producers make their investments in the requisite technology economically sustainable. Chinese researchers continue to pursue promising next-generation AI chip designs, such as neuromorphic computing-based architectures, which in the next five to ten years could position Chinese companies to make or contribute to key innovations in the field.
Microfluidic systems, pumps, valves, fluidic chips thereof, and applications of same
Microfluidic systems, pumps, valves and applications of the same are provided. The microfluidic system may be a pump or a valve having a fluidic chip and an actuator controlling the opening and closing of the fluidic channel in the fluidic chip. The actuator may be disposed to tilt from the fluidic chip, forming a tilted-rotor peristaltic pump. Alternatively, the actuator may be a rolling ball actuator, and different fluidic chips may be used in different applications. For example, the fluidic chip may be a spiral pump chip having spiral channels, a rotary peristaltic pump chip having multiple output channels, or a multi-port valve chip having one port interconnected with multiple different ports. An analytical valve chip may switchably interconnect bioreactor and rinse/calibration input channels to sensor and waste output channels. The actuator of a random-access valve can move from one valve position to another without opening or closing intermediate ones.
Microfluidic systems, pumps, valves, fluidic chips thereof, and applications of same
Microfluidic systems, pumps, valves and applications of the same are provided. The microfluidic system may be a pump or a valve having a fluidic chip and an actuator controlling the opening and closing of the fluidic channel in the fluidic chip. The actuator may be disposed to tilt from the fluidic chip, forming a tilted-rotor peristaltic pump. Alternatively, the actuator may be a rolling ball actuator, and different fluidic chips may be used in different applications. For example, the fluidic chip may be a spiral pump chip having spiral channels, a rotary peristaltic pump chip having multiple output channels, or a multi-port valve chip having one port interconnected with multiple different ports. An analytical valve chip may switchably interconnect bioreactor and rinse/calibration input channels to sensor and waste output channels. The actuator of a random-access valve can move from one valve position to another without opening or closing intermediate ones.
Directional dependence of equilibrated TLD-400 chips in multiple radiation fields
Fielding of thermoluminescent dosimeters (TLDs) for measurement of photon radiation dose in experiments is the standard practice for γ-irradiation facilities, pulsed power x-ray facilities, and reactor facilities at Sandia National Laboratories (SNL). Due to the high-dose experimental conditions and the mixed ( 1 n, γ) fields in these facilities, SNL radiation metrologists have historically used CaF 2 :Mn TLDs (also known as TLD-400). Recent inquiries to the radiation metrology staff have raised concerns that the aluminum-equilibrated TLD-400 chips may exhibit a directionally dependent response. The metrologists were asked whether the dose measured by the chip may be impacted by the angle of incidence on the equilibrated TLD. To provide a thorough answer to this query, a set of adjoint Monte Carlo radiation transport calculations was performed for three different equilibrated TLDs as well as bare TLD chips using the Integrated Tiger Series (ITS) code. The key feature of the adjoint calculations performed in this study is that each photon escaping the modeled geometry was tallied into angular bins to provide information on both the energy and angular dependence of the equilibrated chip. After the adjoint Monte Carlo calculations were completed, the resulting energy-dependent response function for each angular bin was convolved with multiple photon energy spectra representing various radiation facilities at SNL. The radiation facilities selected for analysis span a range of photon energies from approximately 1 keV up to approximately 20 MeV. Thus, the presented results are applicable to a wide variety of radiation facilities around the world. Although the bare TLD-400 chip was expected to display the largest variation due to the photon angle of impact on the dosimeter, the dosimeter with the thinnest aluminum equilibrator (SNL thin equilibrated TLD-400) was determined to have the biggest differential between the impact angle with the maximum dose ( D max ) and the impact angle with the minimum dose ( D min ). However, the SNL normal equilibrated TLD-400 chip demonstrated a dramatic reduction in that differential between maximum and minimum dose angles. The reduction in this differential is one of the dominant factors in experimenters’ choice to field these dosimeters at SNL radiation facilities. The results from the PNNL (Hanford) energy-flattening field capsule are consistent with the previous publications. The differential dose responses due to the photon impact angle indicate that experimenters should strive to field their TLD-400 dosimeters in a consistent manner to avoid additional uncertainty in the measurements based on dosimeter orientation.
Atom-resolved imaging with a silicon tip integrated into an on-chip scanning tunneling microscope
Limited throughput is a shortcoming of the Scanning Tunneling Microscope (STM), particularly when used for atomically precise lithography. To address this issue, we have developed an on-chip STM based on Microelectromechanical-Systems (MEMS) technology. The device reported here has one degree of freedom, replacing the Z axis in a conventional STM. The small footprint of the on-chip STM provides a great opportunity to increase STM throughput by incorporating a number of on-chip STMs in an array to realize parallel STM. The tip methodology adopted for the on-chip STM presented here, which is a batch-fabricated Si tip, makes our design conducive to this goal. In this work, we investigate the capability of this on-chip STM with an integrated Si tip for STM imaging. We integrate the on-chip STM into a commercial ultrahigh-vacuum STM system and perform imaging with atomic resolution on par with conventional STMs but at higher scan speeds due to the higher sensitivity of the MEMS actuator relative to a piezotube. The results attest that it is possible to achieve a parallel and high-throughput STM platform, which is a fully batch-fabricated MEMS STM nanopositioner capable of performing atomic-resolution STM imaging.
Productivity and cost of energy chipping with non-integrated harvesting systems in the Coastal Plain of the US south
Research from the 1980s–2010s suggested that integrated harvesting systems that harvest conventional products (e.g., sawtimber, pulpwood) and energy chips simultaneously were the most effective solution to produce energy chips in the US South. Alternatives, such as biomass-only systems, have important advantages in forest stands with low volumes of merchantable timber. The goal of this study was to estimate the productivity and cost of producing energy chips using non-integrated systems. Innovative chipping contractors using non-integrated systems were identified through contacts with procurement foresters responsible for purchasing energy chips. Elemental time-and-motion studies were conducted to estimate harvesting productivity on five operations, including one clearcut harvest and four first thinnings in overstocked stands. The hourly cost of equipment was estimated using the machine rate method. Cost per tonne was estimated by combining hourly productivity and hourly costs in a modified version of the Auburn Harvesting Analyzer. System productivity averaged 37 tonnes per scheduled machine hour (smh) and cut-and-haul costs averaged $33.86 t −1 (USD), which was comparable to previous estimates from integrated systems. In conclusion, this study suggests there are viable alternatives to integrated harvesting systems to produce energy chips, especially in stands with low volumes of merchantable timber.
Convolutional Neural Networks for the CHIPS Neutrino Detector R&D Project.
The CHerenkov detectors In mine PitS (Chips) neutrino detector R&D project aims to develop novel strategies and technologies for very large yet ‘cheap as chips’ water Cherenkov neutrino detectors. Via deployment in a body of water, use of commercially available components, and instrumentation coverage optimisation for the study of exclusively accelerator beam neutrinos, Chips will enable megaton scale detectors to become a reality at the cost of $200k-$300k per kt of sensitive mass. During the summer of 2019 a prototype Chips detector, Chips-5, was deployed into the Wentworth 2W disused mine pit in northern Minnesota, 7 mrad off the NuMI beam axis. A novel data acquisition system was introduced using cheap single-board computers and open-source software. This work presents a novel approach to water Cherenkov neutrino detector event reconstruction and classification. Three forms of a Convolutional Neural Network, a type of deep learning algorithm, have been trained to reject cosmic muon events, classify beam events, and estimate neutrino energies, all using only the raw detector event as input. When evaluated on the expected distribution of Chips-5 events, this new approach is shown to be robust and explainable as well as providing a significant performance increase over the standard likelihood-based reconstruction and simple neural network classification. Promisingly, the performance presented here is comparable to the more complex (and expensive) neutrino oscillation experiments within the field.
Multi-chip photonics transceiver
A photonics transceiver is described herein, wherein the photonics transceiver exhibits improved areal bandwidth density and improved energy per bit consumption relative to conventional photonics transceivers. The photonics transceiver achieves an areal bandwidth density of at least 5 Tbps/mm2 with an energy consumption of less than 500 fJ/bit (sum of energy consumed for both a transmitted bit and a received bit). The photonics transceiver is a multi-chip module, where chips in the multi-chip module are tightly integrated with one another. The multi-chip module includes light source, photodetector, photonics, and control/logic chips. The photonics chip includes transparent conducting oxide integrated optical modulators and multiplexers and demultiplexers based on MEMS-tunable optical ring resonators.
An optimized ChIP-Seq framework for profiling histone modifications in Chromochloris zofingiensis
The eukaryotic green alga Chromochloris zofingiensis is a reference organism for studying carbon partitioning and a promising candidate for the production of biofuel precursors. Recent transcriptome profiling transformed our understanding of its biology and generally algal biology, but epigenetic regulation remains understudied and represents a fundamental gap in our understanding of algal gene expression. Chromatin immunoprecipitation followed by deep sequencing (ChIP-Seq) is a powerful tool for the discovery of such mechanisms, by identifying genome-wide histone modification patterns and transcription factor-binding sites alike. Here, we established a ChIP-Seq framework for Chr. zofingiensis yielding over 20 million high-quality reads per sample. The most critical steps in a ChIP experiment were optimized, including DNA shearing to obtain an average DNA fragment size of 250 bp and assessment of the recommended formaldehyde concentration for optimal DNA-protein cross-linking. We used this ChIP-Seq framework to generate a genome-wide map of the H3K4me3 distribution pattern and to integrate these data with matching RNA-Seq data. In line with observations from other organisms, H3K4me3 marks predominantly transcription start sites of genes. Our H3K4me3 ChIP-Seq data will pave the way for improved genome structural annotation in the emerging reference alga Chr. zofingiensis.
System-on-Chip approach microwave diagnostics development for burning plasma
System-on-chip (SoC) millimeter wave integrated circuit technology has been developed and employed in chip heterodyne radiometers in Electron Cyclotron Emission Imaging (ECEI) and Microwave Imaging Reflectometer (MIR) on the DIII-D tokamak for 2D electron temperature and density fluctuation diagnostics. The W-band (75-110 GHz) ECEI system has been employed with 20 poloidal horn receiver modules with customized monolithic integrated circuit chips and internal local oscillator coupling path. The new SoC approach demonstrates > 30 dB additional gain on the receiver and 95% electronics noise suppression compared to the previous Schottky diode mixer array . An F-band (110-140 GHz) receiver chip has been developed to measure MHD and turbulence behavior on the DIII-D high-field side, such as Alfven eigenmodes. Furthermore, it can image pedestal structure evolution on fusion facilities with stronger magnetic fields, such as ASDEX-U, EAST, HL-2M, and LHD. The F-band chip performance has been tested in the laboratory. Also, V-band (55-75 GHz) transmitter and receiver modules (55-75 GHz) have been developed for DIII-D and NSTX-U Furthermore, microwave Imaging Reflectometer (MIR) application suitability for 2D density fluctuation imaging on the pedestal region.
RD53A: A large-scale prototype chip for the phase II upgrade in the serially powered HL-LHC pixel detectors
The phase II upgrade of the HL-LHC experiments within the LHC intends to deepen the studies of the Higgs boson and to allow the discovery of further particles by adding an integrated luminosity of about 4000 fb -1 over 10 years of operation. This upgrade would overwhelm the installed pixel detector readout chips with higher hit rates and radiation levels than ever before. To match these extreme requirements the RD53 collaboration, a joint effort between ATLAS and CMS, developed RD53A, a new generation pixel detector readout chip prototype manufactured in a 65 nm CMOS technology. It is half the size of the final pixel chips and designed to meet requirements in the face of 3 GHz/cm 2 hit rate after irradiation to 500 Mrad. The detector is able to use 50×50 μm 2 or 25×100 μm 2 pixels with high readout speed of up to 4 links per chip with 1.28 Gbit/s each. Shunt–LDO regulators integrated on the bottom of the chip provide the required voltages to the two power domains, analog and digital. These regulators enable serial powering of the pixel modules, which is the only feasible, radiation hard scheme to ensure acceptable power cable losses and to stay within the material budget for the future pixel detectors. Finally, an overview of the status and challenges of serial powering and the Shunt–LDO regulator development will be given.
Plug-and-play polymer microfluidic chips for hydrated, room temperature, fixed-target serial crystallography
The practice of serial X-ray crystallography (SX) depends on efficient, continuous delivery of hydrated protein crystals while minimizing background scattering. Of the two major types of sample delivery devices, fixed-target devices offer several advantages over widely adopted jet injectors, including: lower sample consumption, clog-free delivery, and the ability to control on-chip crystal density to improve hit rates. In this study we present our development of versatile, inexpensive, and robust polymer microfluidic chips for routine and reliable room temperature serial measurements at both synchrotrons and X-ray free electron lasers (XFELs). Our design includes highly X-ray-transparent enclosing thin film layers tuned to minimize scatter background, adaptable sample flow layers tuned to match crystal size, and a large sample area compatible with both raster scanning and rotation based serial data collection. The optically transparent chips can be used both for in situ protein crystallization (to eliminate crystal handling) or crystal slurry loading, with prepared samples stable for weeks in a humidified environment and for several hours in ambient conditions. Serial oscillation crystallography, using a multi-crystal rotational data collection approach, at a microfocus synchrotron beamline (SSRL, beamline 12-1) was used to benchmark the performance of the chips. Furthermore, high-resolution structures (1.3–2.7 Å) were collected from five different proteins – hen egg white lysozyme, thaumatin, bovine liver catalase, concanavalin-A (type VI), and SARS-CoV-2 nonstructural protein NSP5. Overall, our modular fabrication approach enables precise control over the cross-section of materials in the X-ray beam path and facilitates chip adaption to different sample and beamline requirements for user-friendly, straightforward diffraction measurements at room temperature.
A radiation tolerant clock generator for the CMS endcap timing layer readout chip
Here, we present the test results of a low jitter Phase Locked Loop (PLL) prototype chip for the CMS Endcap Timing Layer readout chip (ETROC). This chip is based on the improved version of a clock synthesis circuit named ljCDR from the Low Power Gigabit Transceiver (lpGBT) project. The ljCDR is tested in its PLL mode. An automatic frequency calibration (AFC) block with the Triple Modular Redundancy (TMR) register is developed for the LC-oscillator calibration. The chip was manufactured in a 65 nm CMOS process with 10 metal layers. The chip has been extensively tested, including Total Ionizing Dose (TID) testing up to 300 Mrad and Single Event Upset (SEU) testing with heavy ions possessing a Linear Energy Transfer (LET) from 1.3 to 62.5 MeV × cm 2 /mg.
Testing the limits of ITkPixV2: the ATLAS inner tracker pixel detector readout chip
The ITkPixV2 chip is the final production readout chip for the ATLAS Phase 2 Inner Tracker (ITk) upgrade at the upcoming High-Luminosity LHC (HL-LHC). Due to the extraordinarily high peak luminosity at the HL-LHC of 5 × 1034 cm-1 s-1, ITkPixV2 must meet significant increases in nearly all design requirements compared to the current ATLAS Inner Detector (ID), including a 10× increase in trigger rate, a 7.5× increase in hit rate, a 3× increase in radiation tolerance, and a 12.5× decrease in pixel current draw per unit area, all while maintaining a similar power per unit area as present pixel detectors. Here we present the first measurements of the ITkPixV2 chip operated at the limits of the full chip design requirements, including in particular a measurement of the activity-induced current of the chip as a function of increasing hit rate.