SEARCH · Engineering Papers
Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.
Although the weakest link of CSP assembly reliability has been often internal package failure, solder joint fatigue is still considered to be the key factor for reliability.
This paper reviews many factors that affect interconnect reliability of commercial-off-the-shelf (COSTS) chip scale package (CSP) assemblies.
The JPL-led MicrotypeBGA Consortium of enterprises representing government agencies and private companies have jointed together to pool in-kind resources for developing the quality and reliability of chip scale packages (CSPs) for a variety of projects.
Reviews the many factors that affect interconnect reliability of emerging chip scale package (CSP) assemblies. These include: package type, package build, board design, and assembly variables.
This paper reviews the accelerated thermal cycling test methods that are currently used by industry to characterize the interconnect reliability of commercial-off-the-shelf (COTS) ball grid array (BGA) and chip scale package (CSP) assemblies.
Explore the source record for details and available documents.
The test results for numerous chip scale package assembly performed under MicrotypeBGA Consortium led by the Jet Propulsion Laboratory have been published previously.
This paper reviews the package trend towards further miniaturization of emerging chip scale package (CSP).
This paper will compare three different CSP concepts as well as their assembly reliability.
The popularity of emerging miniaturized Chip Scale Packages (CSPs) is rapidly growing because of their benefits and smaller size.
Explore the source record for details and available documents.
A JPL-led chip scale package consortium of enterprises recently joined together to pool in-kind resources for developing the quality and reliability of chip scale packages for a variety of projects. The experience of the consortium in building more than 150 test vehicle assemblies, single and double sided multilayer PWBs, and the environmental test results has now been published as a chip scale package guidelines document.
Availability of board solder joint reliability information is critical to the wider implementation of Chip Scale Packages (CSPs).
Explore the source record for details and available documents.
This paper presents vibration behavior of these assemblies along with optical and SEM cross-sectional micrographs taken after failures.
Inspection results along with SEM and optical cross-sectional photos revealing damage and failure mechanisms will also be presented.
Different aspects of advanced surface mount package technology have been investigated. Three key areas included the assembly reliability of conventional Surface Mount (SM), Ball Grid Arrays (BGAs), and Chip Scale Packages (CSPs).