SEARCH · Engineering Papers
Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
Quote a phrase for an exact phrase match. Source license links do not imply unrestricted reuse.
Chip level modeling techniques, functional fault simulation, simulation software development, a more efficient, high level version of GSP, and a parallel architecture for functional simulation are discussed.
A description of a single VLSI chip for computing syndromes in the (255, 223) Reed-Solomon decoder is presented. The architecture that leads to this single VLSI chip design makes use of the dual basis multiplication algorithm. The same architecture can be applied to design VLSI chips to compute various kinds of number theoretic transforms.
The Proton Upset Monte Carlo Simulation (PROPSET) program calculates the frequency of on-orbit upsets in computer chips (for given orbits such as Low Earth Orbit, Lunar Orbit, and the like) from proton bombardment based on the results of heavy ion testing alone. The software simulates the bombardment of modern microelectronic components (computer chips) with high-energy (.200 MeV) protons. The nuclear interaction of the proton with the silicon of the chip is modeled and nuclear fragments from this interaction are tracked using Monte Carlo techniques to produce statistically accurate predictions.
Recent developments in materials technology now make it possible to fabricate nonthermal thin-film radioisotopic energy converters (REC) with a specific power of 24 W/kg and a 10 year working life at 5 to 10 watts. This creates applications never before possible, such as placing the power supply directly on integrated circuit chips. The efficiency of the REC is about 25 percent which is two to three times greater than the 6 to 8 percent capabilities of current thermoelectric systems. Radio isotopic energy converters have the potential to meet many future space power requirements for a wide variety of applications with less mass, better efficiency, and less total area than other power conversion options. These benefits result in significant dollar savings over the projected mission lifetime.
Single-chip computer and sensor-circuit chips preprocess sensor data. Self-contained circuitry combines sensor signals for serial digital transmission. Gripping surfaces crossed with grooves for grasping differently shaped objects. Gripper cavities house sensors and preprocessing circuitry. Sensors and preprocessing circuitry in robot gripper reduce amount of data being transmitted between robot controller and gripper. Placement in gripper reduces signal delays and vulnerability to electromagnetic interference.
The Modified Gerchberg-Saxton (MGS) algorithm is an image-based wavefront-sensing method that can turn any science instrument focal plane into a wavefront sensor. MGS characterizes optical systems by estimating the wavefront errors in the exit pupil using only intensity images of a star or other point source of light. This innovative implementation of MGS significantly accelerates the MGS phase retrieval algorithm by using stream-processing hardware on conventional graphics cards. Stream processing is a relatively new, yet powerful, paradigm to allow parallel processing of certain applications that apply single instructions to multiple data (SIMD). These stream processors are designed specifically to support large-scale parallel computing on a single graphics chip. Computationally intensive algorithms, such as the Fast Fourier Transform (FFT), are particularly well suited for this computing environment. This high-speed version of MGS exploits commercially available hardware to accomplish the same objective in a fraction of the original time. The exploit involves performing matrix calculations in nVidia graphic cards. The graphical processor unit (GPU) is hardware that is specialized for computationally intensive, highly parallel computation. From the software perspective, a parallel programming model is used, called CUDA, to transparently scale multicore parallelism in hardware. This technology gives computationally intensive applications access to the processing power of the nVidia GPUs through a C/C++ programming interface. The AAMGS (Accelerated Adaptive MGS) software takes advantage of these advanced technologies, to accelerate the optical phase error characterization. With a single PC that contains four nVidia GTX-280 graphic cards, the new implementation can process four images simultaneously to produce a JWST (James Webb Space Telescope) wavefront measurement 60 times faster than the previous code.
Chip-level modeling techniques in the evaluation of fault tolerant systems were researched. A fault tolerant computer was modeled. An efficient approach to functional fault simulation was developed. Simulation software was also developed.
The time when computing power is limited by the copper wire inherent in the computer system and not the speed of the microprocessor is rapidly approaching. With constant advances in computer technology, many researchers believe that in only a few years, optical interconnects will begin to replace copper wires in your Central Processing Unit (CPU). On a more macroscopic scale, the telecommunications industry has already made the switch to optical data transmission as, to date, fiber optic technology is the only reasonable method of reliable, long range data transmission. Within the span of a decade, we will see optical technologies move from the macroscopic world of the telecommunications industry to the microscopic world of the computer chip. Already, the communications industry is marketing commercially available optical links to connect two personal computers, thereby eliminating the need for standard and comparatively slow wired and wireless Ethernet transfers and greatly increasing the distance the computers can be separated. As processing demands continue to increase, the realm of optical communications will continue to move closer to the microprocessor and quite possibly onto the microprocessor itself. A day may come when copper connections are used only to supply power, not transfer data. This summer s work marks some of the beginning stages of a 5 to 10 year, long-term research project to create and study a free-space, 1 Gigabit/sec optical interconnect. The research will result in a novel fabricated, chip-to-chip interconnect consisting of a Vertical Cavity Surface Emitting Laser (VCSEL) Diode linked through free space to a Metal- Semiconductor-Metal (MSM) Photodetector with the possible integration of microlenses for signal focusing and Micro-Electromechanical Systems (MEMS) devices for optical signal steering. The advantages, disadvantages, and practicality of incorporating flip-chip mounting technologies will also be addressed. My work began with the design and construction of a test setup for the experiment and then appropriate characterization of the test system. Specifically, I am involved in the characterization of a commercially available 1550nm wavelength, 5mW diode laser and a study of its modulation bandwidth. Commercially produced photodetectors as well as the incorporation of microwave technology, in the form of RF input and output, are used in the characterization procedure. The next stage involves the use of a probe station and network analyzer to characterize and test a series of photodetectors fabricated on a 2 inch, Indium Gallium Arsenide (InGaAs) wafer in the Branch s microlithography lab. Other project responsibilities include, but are not limited to the incorporation of a transimpedance amplifier to the photodetector circuit; a study of VCSEL technology; bit error rate analysis of an optical interconnect system; and analysis of free space divergence of the VCSEL, optical path length of the interconnect; and any other pertinent optical properties of the one gigabit per second interconnect for fabrication and testing.
Document fraud including unauthorized duplication of identification cards and credit cards is a serious problem facing the government, banks, businesses, and consumers. In addition, counterfeit products such as computer chips, and compact discs, are arriving on our shores in great numbers. With the rapid advances in computers, CCD technology, image processing hardware and software, printers, scanners, and copiers, it is becoming increasingly easy to reproduce pictures, logos, symbols, paper currency, or patterns. These problems have stimulated an interest in research, development and publications in security technology. Some ID cards, credit cards and passports currently use holograms as a security measure to thwart copying. The holograms are inspected by the human eye. In theory, the hologram cannot be reproduced by an unauthorized person using commercially-available optical components; in practice, however, technology has advanced to the point where the holographic image can be acquired from a credit card-photographed or captured with by a CCD camera-and a new hologram synthesized using commercially-available optical components or hologram-producing equipment. Therefore, a pattern that can be read by a conventional light source and a CCD camera can be reproduced. An optical security and anti-copying device that provides significant security improvements over existing security technology was demonstrated. The system can be applied for security verification of credit cards, passports, and other IDs so that they cannot easily be reproduced. We have used a new scheme of complex phase/amplitude patterns that cannot be seen and cannot be copied by an intensity-sensitive detector such as a CCD camera. A random phase mask is bonded to a primary identification pattern which could also be phase encoded. The pattern could be a fingerprint, a picture of a face, or a signature. The proposed optical processing device is designed to identify both the random phase mask and the primary pattern [1-3]. We have demonstrated experimentally an optical processor for security verification of objects, products, and persons. This demonstration is very important to encourage industries to consider the proposed system for research and development.
Four trends in spacecraft flight operations are discussed which will reduce overall program costs. These trends are the use of high-speed, highly reliable data communications systems for distributing operations functions to more convenient and cost-effective sites; the improved capability for remote operation of sensors; a continued rapid increase in memory and processing speed of flight qualified computer chips; and increasingly capable ground-based hardware and software systems, notably those augmented by artificial intelligence functions. Changes reflected by these trends are reviewed starting from the NASA Viking missions of the early 70s, when mission control was conducted at one location using expensive and cumbersome mainframe computers and communications equipment. In the 1980s, powerful desktop computers and modems enabled the Magellan project team to operate the spacecraft remotely. In the 1990s, the Hubble Space Telescope project uses multiple color screens and automated sequencing software on small computers. Given a projection of current capabilities, future control centers will be even more cost-effective.
The applicability of the Directed Graph Methodology (DGM) to the design and analysis of special purpose image and signal processing hardware was evaluated. A special purpose image processing system was designed and described using DGM. The design, suitable for very large scale integration (VLSI) implements a region labeling technique. Two computer chips were designed, both using metal-nitride-oxide-silicon (MNOS) technology, as well as a functional system utilizing those chips to perform real time region labeling. The system is described in terms of DGM primitives. As it is currently implemented, DGM is inappropriate for describing synchronous, tightly coupled, special purpose systems. The nature of the DGM formalism lends itself more readily to modeling networks of general purpose processors.
Parallelism will be an essential ingredient of high performance systems of the future. The Inmos transputer is a high performance single-chip computer whose architecture facilitates the construction of parallel processing systems. Occam is a high level language developed for use with the Inmos transputer. This paper describes a project to evaluate the feasibility of using the transputer to implement real time processing of telemetry data.
A survey of digital image processing techniques and processing systems for aerodynamic images has been conducted. These images covered many types of flows and were generated by many types of flow diagnostics. These include laser vapor screens, infrared cameras, laser holographic interferometry, Schlieren, and luminescent paints. Some general digital image processing systems, imaging networks, optical sensors, and image computing chips were briefly reviewed. Possible digital imaging network systems for the Ames Unitary Wind Tunnel were explored.
The demand for larger crystals is increasing especially in applications associated with the electronic industry, where large and pure electronic crystals (notably silicon) are the essential material to make high-performance computer chips. Crystal growth under weightless conditions has been considered an ideal way to produce bigger and hopefully better crystals. One technique which may benefit from a microgravity environment is the float-zone crystal-growth process, a containerless method for producing high-quality electronic material. In this method, a rod of material to be refined is moved slowly through a heating device which melts a portion of it. Ideally, as the melt resolidifies it does so as a single crystal which is then used as substrate for building microelectronic devices. The possibility of contamination by contact with other material is reduced because of the 'float' configuration. However, since the weight of the material contained in the zone is supported by the surface-tension force, the size of the resulting crystal is limited in Earth-based productions; in fact, some materials have properties which prevent this process from being used to manufacture crystals of reasonable size. Consequently, there has been a great deal of interest in exploiting the microgravity environment of space to grow larger size crystals of electronic material using the float-zone method. In addition to allowing larger crystals to be grown, a microgravity environment would also significantly reduce the magnitude of convection induced by buoyancy forces during the melting state. This type of convection was once thought to be at least partially responsible for the presence of undesirable nonuniformities--called striations--in material properties observed in float-zone material. However, past experiments on crystal growth under weightless conditions found that even with the absence of gravity, the float-zone method sometimes still results striations. It is believed that another mechanism is playing a dominant role in the microgravity environment.
Neural network capabilities include automatic and organized handling of complex information, quick adaptation to continuously changing environments, nonlinear modeling, and parallel implementation. This viewgraph presentation presents Bellcore work on applications, learning chip computational function, learning system block diagram, neural network equalization, broadband access control, calling-card fraud detection, software reliability prediction, and conclusions.
Harris Semiconductor Company used technology which they found in Tech Briefs as the basis for an integrated circuit to reduce onto one chip most of the circuitry of the motors, for example working machines, drill presses, etc. Harris produced an induction motor energy saver (IMES) centered upon a silicon chip. The chip computes the precise voltage and the IMES monitors the motor and provides the energy. An IMES equipped drill press uses only 79 watts of energy as compared to the usual 160 watts.
As an alternative to conventional tubing instrumentation for measuring airflow, designers and technicians at the NASA Glenn Research Center have been fabricating packaging components and assembling a set of unique probes using commercial-off-the-shelf microelectromechanical systems (MEMS) integrated circuits (computer chips). Using MEMS as an alternative has some compelling advantages over standard measurement devices. Sensor technologies have matured through high-production usage in industries such as automotive and aircraft manufacturers. Currently, MEMS are the choice in applications such as tire pressure monitors, altimeters, pneumatic controls, cable leak detectors, and consumer appliances. Conventional instrumentation uses tubing buried in the model aerodynamic surfaces or wind tunnel walls. The measurements are made when pressure is introduced at the tube opening. The pressure then must travel the tubing for lengths ranging from 20 to hundreds of feet before reaching an electronic signal conditioner. This condition causes a considerable amount of damping and requires measurements to be made only after the test rig has reached steady-state operation. The electronic MEMS pressure sensor is able to take readings continuously under dynamic states in nearly real time. The use of stainless steel tubing for pressure measurements requires many tubes to be cleaned, cut to length, carefully installed, and delicately deburred and spliced for use. A cluster of a few hundred 1/16-in.- (0.0625-in.-) diameter tubes (not uncommon in research testing facilities) can be several inches in diameter and may weigh enough to require two men to handle. Replacing hard tubing with electronic chips can eliminate much of the bulk. Each sensor would fit on the tip of the 1/16-in. tubing with room to spare. The P592 piezoresistive silicon pressure sensor (Lucas NovaSensor, Fremont, CA) was chosen for this project because of its cost, availability, and tolerance to extreme ambient conditions. The chip is 1 mm square by 0.6 mm thick (0.039 by 0.023 in.) with 0.12-mm (0.005-in.) wire connection tabs. Three MEMS chips were used to build the first type of flow-angularity probe. This MEMS probe will be demonstrated as an alternative to a standard tube type "Cobra Probe" now used routinely in wind tunnel and aeronautical hardware applications. The response time and accuracy would allow the probe to be translated on an actuator across a flow field, yielding precision dynamic measurements not possible with conventional instrumentation. The low profile, the minimal power requirement, the rugged construction, and the moderate cost all contribute to making MEMS sensors the enticing choice instrument in future research measurement needs. The MEMS probe efforts are a continuation of work initiated by Brian Willis, without whose foresight and efforts this project would never have been realized. This task was funded through cooperation with the NASA Electronic Parts and Packaging (NEPP) program at the Jet Propulsion Laboratory.
The Environmental Research Aircraft and Sensor Technology (ERAST) Alliance was created in 1994 and operated for 9 years as a NASA-sponsored coalition of 28 members from small companies, government, universities, and nonprofit organizations. ERAST s goal was to foster development of remotely piloted aircraft technology for scientific, humanitarian, and commercial purposes. Some of the aircraft in the ERAST Alliance were intended to fly unmanned at high altitudes for days at a time, and flying for such durations required alternative sources of power that did not add weight. The most successful solution for this type of sustained flight is the lightest solar energy. Photovoltaic cells convert sunlight directly into electricity. They are made of semi-conducting materials similar to those used in computer chips. When sunlight is absorbed, electrons are knocked loose from their atoms, allowing electricity to flow. Under the ERAST Alliance, two solar-powered technology demonstration aircraft, Pathfinder and Helios, were developed. Pathfinder is a lightweight, remotely piloted flying wing aircraft that demonstrated the technology of applying solar cells for long-duration, high-altitude flight. Solar arrays covering most of the upper wing surface provide power for the aircraft s electric motors, avionics, communications, and other electronic systems. Pathfinder also has a backup battery system that can provide power for between 2 and 5 hours to allow limited-duration flight after dark. It was designed, built, and operated by AeroVironment, Inc., of Monrovia, California. On September 11, 1995, Pathfinder reached an altitude of 50,500 feet, setting a new altitude record for solar-powered aircraft. The National Aeronautic Association presented the NASA-industry team with an award for 1 of the 10 Most Memorable Record Flights of 1995.