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At least 19 records
All sourcesNASA NTRSDOE OSTI
DOE OSTI2018

Testbeam results of irradiated ams H18 HV-CMOS pixel sensor prototypes

HV-CMOS pixel sensors are a promising option for the tracker upgrade of the ATLAS experiment at the LHC, as well as for other future tracking applications in which large areas are to be instrumented with radiation-tolerant silicon pixel sensors. We present results of testbeam characterisations of the 4 th generation of Capacitively Coupled Pixel Detectors (CCPDv4) produced with the ams H18 HV-CMOS process that have been irradiated with different particles (reactor neutrons and 18 MeV protons) to fluences between 1×10 14 and 5×10 15 1–MeV– n eq . The sensors were glued to ATLAS FE-I4 pixel readout chips and measured at the CERN SPS H8 beamline using the FE-I4 beam telescope. Results for all fluences are very encouraging with all hit efficiencies being better than 97% for bias voltages of 85 V. The sample irradiated to a fluence of 1×10 15 neq—a relevant value for a large volume of the upgraded tracker—exhibited 99.7% average hit efficiency. Furthermore, the results give strong evidence for the radiation tolerance of HV-CMOS sensors and their suitability as sensors for the experimental HL-LHC upgrades and future large-area silicon-based tracking detectors in high-radiation environments.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗
DOE OSTI2019

Performance of CMOS pixel sensor prototypes in ams H35 and aH18 technology for the ATLAS ITk upgrade

Pixel sensors based on commercial high-voltage CMOS processes are an exciting technology that is considered as an option for the outer layer of the ATLAS inner tracker upgrade at the High Luminosity LHC. Here, charged particles are detected using deep n-wells as sensor diodes with the depleted region extending into the silicon bulk. Both analog and digital readout electronics can be added to achieve different levels of integration up to a fully monolithic sensor. Small scale prototypes using the ams CMOS technology have previously demonstrated that it can achieve the required radiation tolerance of 10(15) n(eq)/cm(2) and detection efficiencies above 99.5%. Recently, large area prototypes, comparable in size to a full sensor, have been produced that include most features required towards a final design: the H35demo prototype produced in ams H35 technology that supports both external and integrated readout and the monolithic ATLASPix1 pre-production design produced in ams aH18 technology. Both chips are based on large fill-factor pixel designs, but differ in readout structure. Performance results for H35DEMO with capacitively-coupled external readout and first results for the monolithic ATLASPix1 are shown.

ATLAS ITk upgrade↗
DOE OSTI2021

High-Voltage CMOS Active Pixel Sensor

The high-voltage CMOS (HVCMOS) sensors are a novel type of CMOS active pixel sensors for ionizing particles that can be implemented in CMOS processes with deep n-well option. The pixel contains one sensor electrode formed with a deep n-well implanted in a p-type substrate. CMOS pixel electronics, embedded in shallow wells, are placed inside the deep n-well. By biasing the substrate with a high negative voltage and by the use of a lowly doped substrate, a depleted region depth of at least 30 µm can be achieved. The electrons generated by a particle are collected by drift, which induces fast detectable signals. This publication presents a 4.2-cm 2 large HVCMOS pixel sensor implemented in a commercial 180-nm process on a lowly doped substrate and its characterization.

73 NUCLEAR PHYSICS AND RADIATION PHYSICS↗
DOE OSTI2018

CMOS Pixel Development for the ATLAS Experiment at HL-LHC. In: Proceedings of International Conference on Technology and Instrumentation in Particle Physics 2017

The high luminosity upgrade of the LHC necessitates a complete exchange of the current ATLAS Inner Tracker for a purely silicon one. Large areas therefore have to be covered by radiation tolerant, low cost and low material budget silicon detectors. New approaches are being explored using CMOS pixel sensors, providing charge collection in a depleted layer. They are based on technologies that allow to use high depletion voltages and high resistivity wafers for large depletion depths with multiple nested wells, enabling for CMOS electronics to be embedded safely into the sensor substrate. We are investigating depleted CMOS pixel detectors with monolithic or hybrid designs in view of their suitability for high trigger rates, fast timing and the high radiation environment at HL-LHC. This paper will discuss recent results of the main candidate technologies and the current developments towards a monolithic solution.

ATLAS ITk↗
DOE OSTI2019

Design of ePixM, a fully-depleted monolithic CMOS active pixel sensor for soft X-ray experiments at LCLS-II

The LCLS-II Free Electron Laser (FEL) will produce X-ray pulses with a repetition rate of up to 1 MHz and energies between 250 eV and 5 keV. Experiments conducted at LCLS-II will require 2D imaging detectors with a unique set of features, such as high-spatial resolution, low-noise performance, high-dynamic range and high-frame rates up to 1 MHz. We present the design of ePixM, a fully-depleted monolithic CMOS detector tailored for soft X-rays applications at high-repetition rates FEL. It consists of an array of 384×192 active pixel sensors, with a pixel size of 50×50 μm 2 and a total sensitive area of 2×1 cm 2 . ePixM has been designed in a 150 nm CMOS technology on high-resistivity substrate to achieve full depletion of the substrate. Each pixel includes a Charge Sensitive Amplifier (CSA) with gain auto-ranging capability and a noise-shaper performing Correlated Double Sampling (CDS). A novel technique named correlated pre-charging removes the excess noise introduced by the gain-switching mechanism. The performance of the design has been evaluated through post-layout simulations. The Equivalent Noise Charge (ENC) of 11.3 electrons enables single-photon detection at X-ray energies down to 250 eV, and the dynamic range exceeds 10 3 photons at 500 eV thanks to the auto-ranging circuitry.

47 OTHER INSTRUMENTATION↗
DOE OSTI2019

A data acquisition system for HV-CMOS sensor research and development in the upgrade of ATLAS experiment

In the High Luminosity LHC (HL-LHC) upgrade of ATLAS experiment in 2026, the new inner tracker detector will be installed. As a promising candidate for the outer layer of the inner tracker detector, the High Voltage CMOS (HV-CMOS) pixel sensors are being investigated by the ATLAS collaboration. A Front-End LInk eXchange (FELIX) based Data Acquisition (DAQ) system is developed for the R&D of the HV-CMOS sensors. A FELIX card with PCIe interface in the back-end is used to control, monitor, calibrate and read out the front-end electronics. In the front-end, a Xilinx evaluation board ZC706 works as the interface between the back- end and custom boards with HV-CMOS sensors and the readout ASIC. In conclusion, the DAQ system was successfully deployed for the testbeam experiment at CERN. Design of the DAQ system, the tuning of sensors and testbeam results will be described in details.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗
DOE OSTI2018

Charge collection characterisation with the Transient Current Technique of the ams H35DEMO CMOS detector after proton irradiation

This paper reports on the characterisation with Transient Current Technique measurements of the charge collection and depletion depth of a radiation-hard high-voltage CMOS pixel sensor produced at ams AG. Several substrate resistivities were tested before and after proton irradiation with two different sources: the 24 GeV Proton Synchrotron at CERN and the 16.7 MeV Cyclotron at Bern Inselspital.

47 OTHER INSTRUMENTATION↗
DOE OSTI2018

Test beam measurement of ams H35 HV-CMOS capacitively coupled pixel sensor prototypes with high-resistivity substrate

In the context of the studies of the ATLAS High Luminosity LHC programme, radiation tolerant pixel detectors in CMOS technologies are investigated. To evaluate the effects of substrate resistivity on CMOS sensor performance, the H35DEMO demonstrator, containing different diode and amplifier designs, was produced in ams H35 HV-CMOS technology using four different substrate resistivities spanning from 80 cm to 1000 cm. A glueing process using a high-precision flip-chip machine was developed in order to capacitively couple the sensors to FE-I4 Readout ASIC using a thin layer of epoxy glue with good uniformity over a large surface. The resulting assemblies were measured in beam test at the Fermilab Test Beam Facilities with 120 GeV protons and CERN SPS H8 beamline using 180 GeV pions. Furthermore, the in-time efficiency and tracking properties measured for the different sensor types are shown to be compatible with the ATLAS ITk requirements for its pixel sensors.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗
DOE OSTI2026

Beam test performance of AstroPix sensor with 120 GeV protons

AstroPix is a High-Voltage CMOS Monolithic Active Pixel Sensor (HV-CMOS MAPS) developed for precision gamma-ray imaging and spectroscopy in the medium-energy regime, as well as for precise shower imaging and tracking in the Barrel Imaging Calorimeter (BIC) of the Electron Proton/Ion Collider (ePIC) detector at the future Electron–Ion Collider (EIC). We present beam test results of the AstroPix_v3 sensor using a 120 GeV proton beam at the Fermilab Test Beam Facility (FTBF), performed as part of the broader experimental campaign for the BIC prototype calorimeter. The sensor’s 500 µm pixel pitch enabled precise measurement of the beam profile, providing important information for the calorimeter performance studies. Using the measured 120 GeV proton data, we measure the energy deposit of minimum ionizing particles (MIP) and use them to extract the corresponding effective depletion depth at a single bias voltage of −150 V .

AstroPix↗
DOE OSTI2024

A Cryogenic readout integrated circuit with analog pile-up and in-Pixel ADC for high frame rate Skipper CCD-in-CMOS Sensors

The Skipper CCD-in-CMOS Parallel Read-Out Circuit V2 (SPROCKET2) is designed to enable high frame rate readout of Skipper CCD-in-CMOS image sensors. The SPROCKET2 pixel is fabricated in a 65 nm CMOS process and occupies a 60$\mu$m $\times$ 60$\mu$m footprint. SPROCKET2 is intended to be heterogeneously integrated with a pixelated Skipper CCD-in-CMOS sensor, such that one readout pixel is connected to a multiplexed array of 16 active image sensor pixels, to match their spatial geometry. Our design benefits from the Skipper CCD-in-CMOS sensor's non-destructive readout capability to achieve exceptionally low noise through multi-sampling and averaging while optimizing for total power consumption. The pixel readout utilizes correlated double sampling to minimize 1/f noise and includes "pile-up" of ten successive samples in the analog domain before digitizing at a rate of 66.7 ksps. Measurement results of in-pixel serial SAR ADC show DNL and INL of ~0. 44 LSB and 0.58 LBS respectively. A large area array of 20,000 SPROCKET2 ADC pixels (multiplexed 1:16 to 320,000 sensor pixels) is currently under test. By reading out data over a 10 Gbps optical link, this pixel design enables a frame rate of $\sim$ 4 kfps for large sensing areas with minimal sensing deadtime. In the highest gain mode, the pixelated ADC has an input-referred resolution of 10$\mu$V with a simulated power consumption of 50$\mu$W. The pixel operates with constant current draw to minimize power-rail crosstalk.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2023

A Cryogenic Readout IC with 100 KSPS in-Pixel ADC for Skipper CCD-in-CMOS Sensors

The Skipper CCD-in-CMOS Parallel Read-Out Circuit (SPROCKET) is a mixed-signal front-end design for the readout of Skipper CCD-in-CMOS image sensors. SPROCKET is fabricated in a 65 nm CMOS process and each pixel occupies a 50$\mu$m $\times$ 50$\mu$m footprint. SPROCKET is intended to be heterogeneously integrated with a Skipper-in-CMOS sensor array, such that one readout pixel is connected to a multiplexed array of nine Skipper-in-CMOS pixels to enable massively parallel readout. The front-end includes a variable gain preamplifier, a correlated double sampling circuit, and a 10-bit serial successive approximation register (SAR) ADC. The circuit achieves a sample rate of 100 ksps with 0.48 $\mathrm{e^-_{rms}}$ equivalent noise at the input to the ADC. SPROCKET achieves a maximum dynamic range of 9,000 $e^-$ at the lowest gain setting (or 900 $e^-$ at the lowest noise setting). The circuit operates at 100 Kelvin with a power consumption of 40 $\mu W$ per pixel. A SPROCKET test chip was submitted in September 2022, and test results will be presented at the conference.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2024

Development of selenium imaging detectors toward a definitive search for neutrinoless ββ decay

Imaging sensors made from an ionization target layer of amorphous selenium (aSe) coupled to a silicon complementary metal-oxide-semiconductor (CMOS) active pixel array for charge readout are a promising technology for neutrino physics. The high spatial resolution in a solid-state target provides unparalleled rejection of backgrounds from natural radioactivity in the search for the neutrinoless ββ decay of 82 Se. With this grant, we experimentally determined two crucial factors necessary for the realization of this novel technology: i) the intrinsic energy response of aSe to ionizing electrons, and ii) the feasibility to couple a target layer of aSe to a CMOS active pixel sensor to image electron tracks.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2021

A 24-Channel Digitizer With a JESD204B-Compliant Serial Interface for High-Speed Detectors

In this report a 24-channel application-specific integrated circuit (ASIC) for the readout of high-speed CMOS active pixel sensors for charged particle detection is presented. The chip comprises 24 preamplifiers, 24 distinct 12-bit, 25 MSPS Pipelined analog-to-digital converters (ADCs) with self-calibration, an internal phase-locked loop (PLL), and a 3 Gbps serial interface that conforms to the JESD204B standard. To simplify interfacing with a variety of sensors, the ASIC also includes an automatic offset calibration loop. The high level of integration of the ASIC reduces overall system cost and area, and exploiting the signal characteristics of the image sensor allows the ADC to be optimized for reduced power dissipation. The use of an integrated serializer and an industry standard protocol simplifies integration of the ASIC into a complete camera system. The ASIC, called the High-Speed Image Preprocessor Targeted for Electron Readout, or HIPSTER, with a die area of 64.26 mm 2 , is packaged in a 480-ball grid array (BGA) and is fabricated in 180-nm CMOS technology. HIPSTER achieves typical differential nonlinearity (DNL) < 0.55 LSB, input-referred thermal noise of $114.5 μV-rms, and a bit error rate (BER) of better than 10-14. The power dissipation is 98 mW/channel.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗
DOE OSTI2019

The 4D Camera: Very High Speed Electron Counting for 4D-STEM

A vast array of new experimental modalities have been enabled in the past several years through the development of pixelated detectors synchronized to probe scanning electronics. Such camera systems can then acquire the rich information present in the central portion of the convergent beam electron diffraction pattern as a function of probe position (4D-STEM). Here, we present the development, installation, and characterization of the 4D Camera, a CMOS Active Pixel Sensor that consists of a 576 x 576 array of 10 μm pixels of a design related to the original TEAM detector and an outer HAADF detector with 16 concentric quadrant diodes.

47 OTHER INSTRUMENTATION↗