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At least 19 records

A UVLO Circuit in SiC Compatible With Power MOSFET Integration

The design and test of the first undervoltage lock-out circuit implemented in a low-voltage 4H silicon carbide process capable of single-chip integration with power MOSFETs is presented. The lock-out circuit, a block of the protection circuitry of a single-chip gate driver topology designed for use in a plug-in hybrid vehicle charger, was demonstrated to have rise/fall times compatible with a MOSFET switching speed of 250 kHz while operating over the targeted operating temperature range between 0°C and 200°C. Captured data show the circuit to be functional over a temperature range from -55°C to 300°C. The design of the circuit and test results is presented.

Glover, Michael D.↗

Optimization of a low noise detection circuit for probing the structure of damage cascades with IBIC

Optimal detector / pre-amplifier combinations have been identified for the use of light ion IBIC (ion beam induced charge) to probe the physical structure of electrically active defects in damage cascades caused by heavy ion implantation. The ideal detector must have a sufficiently thin dead layer that incident ions will produce the majority of damage cascades in the depletion region of the detector rather than the dead layer. Detector and circuit noise must be low enough to detect the implantation of a single heavy ion as well as the decrease in the light ion IBIC signal caused by Shockley-Read-Hall recombination when the beam scans regions of the detector damaged by the heavy ion. The IBIC signals from three detectors irradiated with 750 keV He⁺ ions are measured with commercial and bespoke charge sensitive pre-amplifiers to identify the combination with the lowest noise.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Determining Series Resistance for Equivalent Circuit Models of a PV Module

Literature describes various methods for determining a series resistance for a photovoltaic device from measured IV curves. We investigate use of these techniques to estimate the series resistance parameter for a single diode equivalent circuit model. With simulated IV curves we demonstrate that the series resistance values obtained by these techniques differ systematically from the known series resistance parameter values used to generate the curves, indicating that these methods are not suitable for determining the series resistance parameter for the single diode model equation. Furthermore, we present an alternative method to determine the series resistance parameter jointly with the other parameters for the single diode model equation, and demonstrate the accuracy and reliability of this technique in the presence of measurement errors.

42 ENGINEERING↗

Control circuits for asynchronous circuits

The described embodiments include a computing device with one or more asynchronous circuits and control circuits that control the operation of the asynchronous circuits. In some embodiments, the control circuits are arranged in a hierarchy with a top-level control circuit atop the hierarchy and one or more local control circuits lower in the hierarchy. In these embodiments, the top-level control circuit processes operating information for the one or more asynchronous circuits and/or other functional blocks in the computing device to determine an operating state for the computing device. Based on the operating state, the top-level control circuit communicates commands to the local control circuits to cause the local control circuits to operate in corresponding operating modes. Based on a corresponding operating mode command, each local control circuit sets one or more operating parameters for corresponding asynchronous circuits (and/or one or more other functional blocks).

42 ENGINEERING↗

Equivalent Circuit Models of Voltage-Controlled Dual Active Bridge Converters: Preprint

In this paper, we introduce a new method of modeling voltage-controlled dual active bridge converters as equivalent circuits. What makes the proposed model unique is that the entire closed loop system converter and control are represented together in one equivalent circuit. Since the full system can be recast as a circuit, this allows for deeper insights on how the closed-loop system performs and for the direct application of circuit analysis techniques. In particular, we reveal how classical control notions can be understood as circuit laws.

24 POWER TRANSMISSION AND DISTRIBUTION↗

A Novel Spatial-Temporal Variational Quantum Circuit to Enable Deep Learning on NISQ Devices

Quantum computing presents a promising approach for machine learning with its capability for extremely parallel computation in high-dimension through superposition and entanglement. Despite its potential, existing quantum learning algorithms, such as Variational Quantum Circuits (VQCs), face challenges in handling more complex datasets, particularly those that are not linearly separable. What’s more, it encounters the deployability issue, making the learning models suffer a drastic accuracy drop after deploying them to the actual quantum devices. To overcome these limitations, this paper proposes a novel spatial-temporal design, namely “ST-VQC”, to integrate nonlinearity in quantum learning and improve the robustness of the learning model to noise. Specifically, ST-VQC can extract spatial features via a novel block-based encoding quantum sub-circuit coupled with a layer-wise computation quantum sub-circuit to enable temporal-wise deep learning. Additionally, a SWAP-Free physical circuit design is devised to improve robustness. These designs bring a number of hyperparameters. After a systematic analysis of the design space for each design component, an automated optimization framework is proposed to generate the ST-VQC quantum circuit. The proposed ST-VQC has been evaluated on two IBM quantum processors, ibm-cairo with 27 qubits and ibmq-lima with 7 qubits to assess its effectiveness. The results of the evaluation on the standard dataset for binary classification show that ST-VQC can achieve over 30% accuracy improvement compared with existing VQCs on actual quantum computers. Moreover, on a non-linear synthetic dataset, the STVQC outperforms a linear classifier by 27.9%, while the linear classifier using classical computing outperforms the existing VQC by 15.58%.

Li, Jinyang↗

Setting operating points for circuits in an integrated circuit chip using an integrated voltage regulator power loss model

An apparatus includes an integrated circuit chip with a set of circuits having two or more subsets of circuits; an external voltage regulator separate from the integrated circuit chip; two or more integrated voltage regulators on the integrated circuit chip that each provide an input voltage to a respective subset of the circuits; and a controller. The controller determines, using an integrated voltage regulator power loss model, an electrical power loss for the integrated voltage regulators for a first combination of operating points for the subsets of the circuits. The controller then determines, based on the electrical power loss, a second combination of operating points for the subsets of the circuits that includes an adjustment to an operating point for at least one of the subsets of the circuits that compensates for an electrical power loss of the corresponding integrated voltage regulator. The controller sets an operating point of each of the subsets of the circuits based on the second combination of operating points.

42 ENGINEERING↗

Design of low loss helix circuits for interference fitted and brazed circuits

The RF loss properties and thermal capability of brazed helix circuits and interference fitted circuits were evaluated. The objective was to produce design circuits with minimum RF loss and maximum heat transfer. These circuits were to be designed to operate at 10 kV and at 20 GHz using a gamma a approximately equal to 1.0. This represents a circuit diameter of only 0.75 millimeters. The fabrication of this size circuit and the 0.48 millimeter high support rods required considerable refinements in the assembly techniques and fixtures used on lower frequency circuits. The transition from the helices to the waveguide was designed and the circuits were matched from 20 to 40 GHz since the helix design is a broad band circuit and at a gamma a of 1.0 will operate over this band. The loss measurement was a transmission measurement and therefore had two such transitions. This resulting double-ended match required tuning elements to achieve the broad band match and external E-H tuners at each end to optimize the match for each frequency where the loss measurement was made. The test method used was a substitution method where the test fixture was replaced by a calibrated attenuator.

Jacquez, A.↗

Setting operating points for circuits in an integrated circuit chip

The described embodiments include an apparatus that controls voltages for an integrated circuit chip having a set of circuits. The apparatus includes a switching voltage regulator separate from the integrated circuit chip and two or more low dropout (LDO) regulators fabricated on the integrated circuit chip. The switching voltage regulator provides an output voltage that is received as an input voltage by each of the two or more LDO regulators, and each of the two or more LDO regulators provides a local output voltage, each local output voltage received as a local input voltage by a different subset of the circuits in the set of circuits. During operation, a controller sets an operating point for each of the subsets of circuits based on a combined power efficiency for the subsets of the circuits and the LDO regulators, each operating point including a corresponding frequency and voltage.

42 ENGINEERING↗

Setting operating points for circuits in an integrated circuit chip

The described embodiments include an apparatus that controls voltages for an integrated circuit chip having a set of circuits. The apparatus includes a switching voltage regulator separate from the integrated circuit chip and two or more low dropout (LDO) regulators fabricated on the integrated circuit chip. The switching voltage regulator provides an output voltage that is received as an input voltage by each of the two or more LDO regulators, and each of the two or more LDO regulators provides a local output voltage, each local output voltage received as a local input voltage by a different subset of the circuits in the set of circuits. During operation, a controller sets an operating point for each of the subsets of circuits based on a combined power efficiency for the subsets of the circuits and the LDO regulators, each operating point including a corresponding frequency and voltage.

Huang, Wei↗

Gate drive latching circuit for an auxiliary resonant commutation circuit

A gate drive latching circuit for an auxiliary resonant commutation circuit for a power switching inverter includes a current monitor circuit providing a current signal to a pair of analog comparators to implement latching of one of a pair of auxiliary switching devices which are used to provide commutation current for commutating switching inverters in the circuit. Each of the pair of comparators feeds a latching circuit which responds to an active one of the comparators for latching the associated gate drive circuit for one of the pair of auxiliary commutating switches. An initial firing signal is applied to each of the commutating switches to gate each into conduction and the resulting current is monitored to determine current direction and therefore the one of the switches which is carrying current. The comparator provides a latching signal to the one of the auxiliary power switches which is actually conducting current and latches that particular power switch into an on state for the duration of current through the device. The latching circuit is so designed that the only time one of the auxiliary switching devices can be latched on is during the duration of an initial firing command signal.

Delgado, Eladio Clemente↗

Dynamics of coupled simplest chaotic two-component electronic circuits and its potential application to random bit generation

We numerically investigate the possibility of using a coupling to increase the complexity in simplest chaotic two-component electronic circuits operating at high frequency. We subsequently show that complex behaviors generated in such coupled systems, together with the post-processing are suitable for generating bit-streams which pass all the NIST tests for randomness. The electronic circuit is built up by unidirectionally coupling three two-component (one active and one passive) oscillators in a ring configuration through resistances. It turns out that, with such a coupling, high chaotic signals can be obtained. By extracting points at fixed interval of 10 ns (corresponding to a bit rate of 100 Mb/s) on such chaotic signals, each point being simultaneously converted in 16-bits (or 8-bits), we find that the binary sequence constructed by including the 10(or 2) least significant bits pass statistical tests of randomness, meaning that bit-streams with random properties can be achieved with an overall bit rate up to 10×100 Mb/s =1Gbit/s (or 2×100 Mb/s =200 Megabit/s). Moreover, by varying the bias voltages, we also investigate the parameter range for which more complex signals can be obtained. Besides being simple to implement, the two-component electronic circuit setup is very cheap as compared to optical and electro-optical systems.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

An Innovative Circuit Breaker for Renewable Power Grids

A key step towards a carbon-neutral future could be reached through dispersed power grids, featuring networks of local-scale renewable energy and battery storage plants. To prevent these power grids from damaging themselves and their surroundings when electrical faults arise, they must be integrated with ‘circuit breakers’, which temporarily interrupt the current flowing through them. However, currently available circuit breakers cannot handle the medium-voltage direct currents best suited for these grids. Through an innovative new circuit breaker design, Steve Schmalz and his colleagues at Eaton Corporation, the Illinois Institute of Technology (IIT), Virginia Tech and the National Energy Technology Laboratory (NETL), hope that this challenge will soon be overcome.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Radial direct bandgap p-i-n GaNP microwire solar cells with enhanced short circuit current

We report the demonstration of dilute nitride heterostructure core/shell microwire solar cells utilizing the combination of top-down reactive-ion etching to create the cores (GaP) and molecular beam epitaxy to create the shells (GaNP). Systematic studies of cell performance over a series of microwire lengths, array periods, and microwire sidewall morphologies examined by transmission electron microscopy were conducted to shed light on performance-limiting factors and to optimize the cell efficiency. We show by microscopy and correlated external quantum efficiency characterization that the open circuit voltage is degraded primarily due to the presence of defects at the GaP/GaNP interface and in the GaNP shells, and is not limited by surface recombination. Compared to thin film solar cells in the same growth run, the microwire solar cells exhibit greater short circuit current but poorer open circuit voltage due to greater light absorption and number of defects in the microwire structure, respectively. The comprehensive understanding presented in this work suggests that performance benefits of dilute nitride microwire solar cells can be achieved by further tuning of the epitaxial quality of the underlying materials.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Possibilistic simulation of quantum circuits by classical circuits

In a breakthrough work, Bravyi, Gosset, and König (BGK) [Science 362, 308 (2018)] unconditionally proved that constant-depth quantum circuits are more powerful than their classical counterparts. Here, their result is equivalent to saying that a particular family of constant-depth quantum circuits takes classical circuits at least Ω⁡(log⁡n) depth to “simulate,” in a certain sense. In our paper, we formalize their sense of simulation, which we call “possibilistic simulation” or “p-simulation,” and construct explicit classical circuits that can p-simulate any depth-d quantum circuit with Clifford and t T-gates in depth O(d+t). Our classical circuits use {NOT,AND,OR} gates of fan-in ≤ 2.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗