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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 1,693 records · Page 94

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NASA NTRS1977

Standard high-reliability integrated circuit logic packaging

A family of standard, high-reliability hardware used for packaging digital integrated circuits is described. The design transition from early prototypes to production hardware is covered and future plans are discussed. Interconnections techniques are described as well as connectors and related hardware available at both the microcircuit packaging and main-frame level. General applications information is also provided.

Slaughter, D. W.↗

NASA NTRS1977

Laser drilling of vias in dielectric for high density multilayer LSHI thick film circuits

A design analysis of a high density multilevel thick film digital microcircuit used for large scale integration is presented. The circuit employs 4 mil lines, 4 mil spaces and requires 4 mil diameter vias. Present screened and fired thick film technology is limited on a production basis to 16 mil square vias. A process whereby 4 mil diameter vias can be fabricated in production using laser technology was described along with a process to produce 4 mil diameter vias for conductor patterns which have 4 mil lines and 4 mil spacings.

Cocca, T.↗

NASA NTRS1978

Measurement of control system response using an analog operational circuit

Ten basic steps are established for an analog method that measures control system response parameters. An example shows how these steps were used on a speed control portion of an auxiliary power unit. The equations and calculations necessary to describe this subsystem are given. The mechanization schematic and simulation diagram for obtaining the measured response parameters of the control system using an analog circuit are explained. Methods for investigating the various effects of the control parameters are described. It is concluded that the optimum system should be underdamped enough to be slightly oscillatory during transients.

Lalli, V. R.↗

NASA NTRS1977

SEM analysis of ionizing radiation effects in linear integrated circuits

A successful diagnostic technique was developed using a scanning electron microscope (SEM) as a precision tool to determine ionization effects in integrated circuits. Previous SEM methods radiated the entire semiconductor chip or major areas. The large area exposure methods do not reveal the exact components which are sensitive to radiation. To locate these sensitive components a new method was developed, which consisted in successively irradiating selected components on the device chip with equal doses of electrons /10 to the 6th rad (Si)/, while the whole device was subjected to representative bias conditions. A suitable device parameter was measured in situ after each successive irradiation with the beam off.

Stanley, A. G.↗

NASA NTRS1978

Effect of dissociation pulse circuit inductance on the CuCl laser

The performance of the double-pulsed CuCl laser is improved by a decrease in the inductance of the dissociation pulse circuit. Higher efficiency is obtained due to a larger ground-state copper atom population and lower optimum dissociation energy.

Vetter, A. A.↗

NASA NTRS1979

Low-frequency attenuator circuit

Circuit uses only single operational amplifier and few passive components to remove background noise from miniature "wristwatch" pulse detector. It can be applied to other systems where background noise is slowly varying, such as ultrasonics, strain-gage sensors, and accelerometers.

Cash, W. H., Jr.↗

NASA NTRS1979

Development of CMOS integrated circuits

Report documents life cycles of two custom CMOS integrated circuits: (1) 4-bit multiplexed register with shift left and shift right capabilities, and (2) dual 4-bit registers. Cycles described include conception as logic diagrams through design, fabrication, testing, and delivery.

Bertino, F.↗

NASA NTRS1980

Design rules for CMOS/SOS circuits

Report presents design rules for advanced-technology integrated circuits made by self-aligned silicongate complementary - metal - oxide - semiconductor/silicon-on-sapphir (CMOS/SOS) process.

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NASA NTRS1979

Circuit for automatic load sharing in parallel converter modules

A nondissipative circuit for automatic load sharing in parallel converter modules having push-pull power transistors is presented. Each transistor has a separate current-sensing transformer and an impedance-adjusting transformer in series with its collector. The impedance-adjusting transformer functions as a current-controlled variable impedance that is responsive to the difference between the peak collector current of the transistor and the average peak current of all collector currents of power transistors in all modules, thereby to control the collector currents of all power transistors with reference to the average peak collector current.

Nagano, S.↗

NASA NTRS1979

Open-circuit voltage improvements in low-resistivity solar cells

Mechanisms limiting the open-circuit voltage in 0.1 ohm-cm solar cells were investigated. It was found that a rather complicated multistep diffusion process could produce cells with significantly improved voltages. The voltage capabilities of various laboratory cells were compared independent of their absorption and collection efficiencies. This was accomplished by comparing the cells on the basis of their saturation currents or, equivalently, comparing their voltage outputs at a constant current-density level. The results show that for both the Lewis diffused emitter cell and the Spire ion-implanted emitter cell the base component of the saturation current is voltage controlling. The evidence for the University of Florida cells, although not very conclusive, suggests emitter control of the voltage in this device. The data suggest further that the critical voltage-limiting parameter for the Lewis cell is the electron mobility in the cell base.

Godlewski, M. P.↗

NASA NTRS1978

Analysis of squaring circuit mechanizations in Costas and squaring loops

The paper discusses implementations of the carrier recovery loop for suppressed carrier binary phase shift keyed signals. The tracking performance of a practical squaring loop where the times-two multiplier is mechanized as a limiter/multiplier combination is developed. This produces the absolute value of the arriving signal which is practical in terms of low signal-to-noise ratios, a wide dynamic range of signal level, and temperature variations. The approach is compared to the usual squaring loop whose squaring circuit is the times-two multiplier exhibiting a square law characteristic.

Lindsey, W. C.↗

NASA NTRS1977

Factors affecting the open-circuit voltage and electrode kinetics of some iron/titanium/redox flow cells

The effect of acid concentration on the performance of the iron-titanium redox flow cell was studied. When the acidity was increased, open-circuit voltages decreased on the titanium side but load voltages increased due to decreased polarization. The best load voltage occurs when there is high acidity on the titanium side coupled with low acidity on the iron side, but such cells show voltage losses with repeated cycling because of the diffusion of acid through the membrane. No membrane tested has been found capable of maintaining the differences in acidity. Chelating agents show some promise in reducing polarization at the Ti electrode and thus improving energy efficiency.

Reid, M. A.↗

NASA NTRS1977

The use of hybrid integrated circuit techniques in biotelemetry applications

A review is presented of some features of hybrid integrated circuits that make their use advantageous in miniature biotelemetry applications. The various techniques for fabricating resistors, capacitors and interconnections by both thin film and thick film technology are discussed. The use of chip capacitors, resistors, and especially standard IC chips on substrates with fired-on interconnection patterns is emphasized. The review is designed primarily to acquaint biotelemetry users and designers with an overview of this fabrication technique so that they can better communicate their needs with an understanding of its limitations and advantages to facilities specializing in hybrid construction.

Fryer, T. B.↗

NASA NTRS1978

Development of an optical parallel logic device and a half-adder circuit for digital optical processing

The paper describes the fabrication and operation of an optical parallel logic (OPAL) device which performs Boolean algebraic operations on binary images. Several logic operations on two input binary images were demonstrated using an 8 x 8 device with a CdS photoconductor and a twisted nematic liquid crystal. Two such OPAL devices can be interconnected to form a half-adder circuit which is one of the essential components of a CPU in a digital signal processor.

Athale, R. A.↗

NASA NTRS1978

Short circuit current changes in electron irradiated GaAlAs/GaAs solar cells

Heteroface p-GaAlAs/p-GaAs/n-GaAs solar cells with junction depths of 0.8, 1.5, and 4 microns were irradiated with 1 MeV electrons. The short-circuit current for the 4 micron junction depth cells is significantly reduced by the electron irradiation. Reduction of the junction depth to 1.5 microns improves the electron radiation resistance of the cells while further reduction of the junction depth to 0.8 microns improves the stability of the cells even more. Primary degradation is in the blue region of the spectrum. Considerable recovery of lost response is obtained by annealing the cells at 200 C. Computer modeling shows that the degradation is caused primarily by a reduction in the minority carrier diffusion length in the p-GaAs.

Walker, G. H.↗

NASA NTRS1980

Simple circuit monitors "third wire" in ac lines

Device detects interruption of ground connection in three-wire electrical equipment and shuts off ac power to prevent shock hazard. Silicon-controlled rectifiers detect floating ground, and deenergize optoelectric relays thereby breaking power connections. Circuit could be incorporated into hand tools, appliances, and other electrical equipment.

Kojima, T. T.↗

NASA NTRS1980

Placement technique for semicustom digital LSI circuits

Small lots of special-purpose integrated circuits are fabricated from standard transitor arrays. Folded linear order of cells minimzes interconnection length and puts cell in juxtaposition. Cell-placement technique is carried out via computer program.

Carroll, B.↗

NASA NTRS1981

CADAT integrated circuit mask analysis

CADAT System Mask Analysis Program (MAPS2) is automated software tool for analyzing integrated-circuit mask design. Included in MAPS2 functions are artwork verification, device identification, nodal analysis, capacitance calculation, and logic equation generation.

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