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At least 1,675 records · Page 93

Neuromorphic computing architecture with dynamically accessible contexts

Various technologies pertaining to allocating computing resources of a neuromorphic computing system are described herein. Subgraphs of a neural algorithm graph to be executed by the neuromorphic computing system are identified. The subgraphs are each executed by a group of neuron circuits serially. Output data generated by execution of the subgraphs are provided to the same or a second group of neuron circuits at a same time or with associated timing data indicative of a time at which the output data was generated. The same or second group of neuron circuits performs one or more processing operations based upon the output data.

Aimone, James Bradley↗

Efficiency, Power Loss, and Power Factor Measurement of Quadrupole Magnet Power Supplies at the Spallation Neutron Source

The linear accelerator (LINAC) quadrupole magnets are powered by 42 silicon-controlled rectifier (SCR) based power supplies at the Spallation Neutron Source (SNS) facility of Oak Ridge National Laboratory. These 35V, 525A power supplies are bulky, inefficient and require both air and water cooling. The reliability of the SNS facility is impacted due to water leaks internal to power supplies and current readback issues associated with their unique control system interface, resulting in multiple downtime events. Hence, an alternate solution is necessary for the continued reliable operation of the SNS. To mitigate the above-mentioned problems, this paper proposes the use of off-the-shelf Switch Mode Power Supplies (SMPS) rated for 20V, 500A with serial control interface. These SMPS are air-cooled, more efficient and more compact owing to their switching speeds of approximately 160 kHz. The performance enhancements of the SMPS in comparison with the existing SCR power supply are discussed in detail in this paper. The features of the SMPS, along with experimental results for both power supplies, like efficiency, power losses and stability, are presented. Ongoing work is also discussed.

Harave, Sudarshan↗

m-CUBES An efficient and portable implementation of multi-dimensional integration for gpus

The task of multi-dimensional numerical integration is frequently encountered in physics and other scientific fields, e.g., in modeling the effects of systematic uncertainties in physical systems and in Bayesian parameter estimation. Multi-dimensional integration is often time-prohibitive on CPUs. Efficient implementation on many-core architectures is challenging as the workload across the integration space cannot be predicted a priori. We propose m-Cubes, a novel implementation of the well-known Vegas algorithm for execution on GPUs. Vegas transforms integration variables followed by calculation of a Monte Carlo integral estimate using adaptive partitioning of the resulting space. m-Cubes improves performance on GPUs by maintaining relatively uniform workload across the processors. As a result, our optimized Cuda implementation for Nvidia GPUs outperforms parallelization approaches proposed in past literature. We further demonstrate the efficiency of m-Cubes by evaluating a six-dimensional integral from a cosmology application, achieving significant speedup and greater precision than the CUBA library's CPU implementation of VEGAS. We also evaluate m-Cubes on a standard integrand test suite. m-Cubes outperforms the serial implementations of the Cuba and GSL libraries by orders of magnitude speedup while maintaining comparable accuracy. Our approach yields a speedup of at least 10 when compared against publicly available Monte Carlo based GPU implementations. In summary, m-Cubes can solve integrals that are prohibitively expensive using standard libraries and custom implementations. A modern C++ interface header-only implementation makes m-Cubes portable, allowing its utilization in complicated pipelines with easy to define stateful integrals. Compatibility with non-Nvidia GPUs is achieved with our initial implementation of m-Cubes using the Kokkos framework.

Sakiotis, Ioannis↗

Integrated rectifier-generator system for AC-to-DC conversion

This disclosure relates AC-to-DC rectification and power flow control of electrical power generators. An integrated rectifier-generator AC-DC conversion circuit and system are disclosed for providing a regulated DC output. The integrated rectifier-generator AC-DC conversion circuit and system may include serially stacked passive and active rectifiers connected to multiple AC ports of an electrical power generator driven by mechanical energy captured by an energy harvester. The integrated rectifier-generator AC-DC conversion circuit and system may be configured to perform active ripple control and a maximum power tracking from the energy harvester by controlling a fraction of an overall power that flow through the active rectifier.

Huynh, Phuc Thanh↗

Scalable Approaches to Selecting Key Entities in Large Networked Infrastructure Systems

This work aims at bringing advances in discrete optimization algorithms to solving practical engineering problems at scale. Often times, in many engineering design problems, there is a need to select a small set of influential or representative elements from a large ground set of entities in an optimal fashion. Submodular optimization provides for a formal way to solve such problems. Common examples with infrastructure systems involve sensor placement and identification of key entities with certain objectives. However, scaling these approaches to large infrastructure systems can be challenging because of the high computational complexity of the overall framework that include the optimization algorithms as well as high-complexity compute-oracles that provide the necessary objective function values. In this work, we explore a well-studied and widely-applicable paradigm, namely leader-selection in a multi-agent networked setting in the context of scalable methodologies. We demonstrate novel frameworks that utilize variations of accelerated submodular optimization algorithms along with linear-algebraic methods that can help accelerate the oracle computations. We further explore this combination in conjunction with graph partitioning paradigms to take advantage of the accelerated algorithms in a distributed setting. Finally we demonstrate the key findings on a practical problem in an operational setting. For this, we leverage an example road network with approximately 18k nodes and 27k edges in a traffic control application, where we seek a limited number of k=200 key intersections. This problem can be solved in a serial setting in just under 5 hours providing more than 2 orders of magnitude speed-up over methods that do not consider acceleration techniques.

Visweswara Sathanur, Arun↗

Multiplexing-Based Flyback Converter for Multi-Port USB Power Delivery with True Power-Sharing

Universal serial bus power delivery (USB-PD) chargers are more attractive to consumers with multiple output ports. Existing multiple port charger designs take multi-stage approach thus increase power loss and charger size. Also, ports are normally designed with different power capability thus the high-power port becomes under-used if the connected device is fully charged while the other lower power ports cannot take over the unused power. This is mainly limited by the power architecture design. This paper addresses this issue by presenting a multiplexing based multi-port quasi-resonant flyback converter. The design achieves true power-sharing with high efficiency, small size, and simple analog implementation. This paper discusses the operating principle and design considerations. A GaN-based 60 W dual port charger verifies the proposed scheme while achieving 76% size reduction and 1% efficiency improvement than state-of-the-art.

Xue, Lincoln↗

Module-OT: A Turnkey Solution for Securing Energy Systems

The Modular Security Apparatus for Managing Distributed Cryptography for Command-and-Control Messages on Operational Technology Networks (Module-OT) is a flexible and lightweight solution for grid-edge devices focusing on end-to-end security. It is a bump- in- the-wire solution acting as a secure conduit for data between devices or systems across a network. It improves the cybersecurity posture of DER systems by providing authentication, authorization, and data integrity to secure DER communications. Additionally, it performs key management, provides data security through whitelisting Internet Protocol addresses and ports, blocks unauthorized connections, controls user access, and allows serial or Ethernet connections for added flexibility. The core software is portable to various Linux-based operating systems and is developed to be customized by the developer and researcher communities. Module-OT has been validated in the lab, has been demonstrated at a 500-KW PV-plus-storage site, and has been proven ready to secure operational technology devices. Its core functionality meets current standards, including validation procedures of the NIST Cryptographic Algorithm Validation Program (CAVP) and the Federal Information Processing Standard (FIPS 140-2). Because of its capability to provide an accessible and affordable option for stepping up security across modern energy systems, Module-OT can serve as an effective technological option to standardize cybersecurity moving forward.

cryptography↗

Intergranular Oxidation of Unstressed Alloy 600 SA and Alloy 600TT in PWR Primary Water

Unstressed coupons of Alloy 600 SA (solution-annealed) and Alloy 600TT were exposed to simulated pressurized water reactor (PWR) primary water at 360oC. The depth of intergranular oxide penetration, as well as the microstructure and microchemistry associated with intergranular (IG) oxidation of selected samples, were characterized by SEM, serial FIB sectioning, TEM and APT. There is no clear trend to indicate that IG oxidation depths in unstressed coupons are different between Alloy 600 SA and TT. At the same time, all SA+TT materials examined evidenced significant interaction between oxidation and Cr-rich GB precipitates. In addition, the spatial extent of GB compositional changes ahead of the oxidation front (e.g. Cr depletion and Ni enrichment) appears different for Alloy 600 SA vs. SA+TT. In SA heats exposed for only 1000 h (42 days), the composition of some GBs changes over distances of 500–1000 nm. SA+TT materials appear not to develop such long-range GB compositional changes (10s nm alteration distances only).

Alloy 600, IGA, PWR, Oxidation, FIB, TEM, APT↗

Evaluations of Silicon Carbide Temperature Monitors

The effect of irradiation on materials properties is an important field of study for materials usage in both fission and fusion systems for energy production. Neutron flux and energy spectrums are well understood; however, the irradiation temperature can be more difficult to determine. Since the early 1960s, Silicon Carbide (SiC) has been used as a passive post-irradiation temperature monitor because the irradiation defects anneal out above the irradiation temperature. Irradiation temperature is determined by measuring a property change after isochronal annealing or during a continuously monitored annealing process. There are many properties that may be measured including electrical resistivity, bulk density, dimensions, thermal diffusivity, or lattice spacing. Electrical resistivity is accepted as a robust measurement technique; however, such method is time-consuming since the steps involved must be performed in a serial manner. The use of thermal expansion from continuous dilatometry is an automated process requiring minimal setup time. As part of a Nuclear Science User Facilities (NSUF) project, low dose silicon carbide monitors were irradiated in the BR2 material test reactor at SCK, Belgium, and were then evaluated at the Idaho National Laboratory (INL) High Temperature Test Laboratory (HTTL) to determine their peak temperature achieved during irradiation. The technical significance of this work was that the monitors were irradiated to a dose that was significantly less than recommended in published literature. This paper will discuss the evaluation processes available at HTTL and the performance of the low dose silicon carbide temperature monitors.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

A Cryogenic Readout IC with 100 KSPS in-Pixel ADC for Skipper CCD-in-CMOS Sensors

The Skipper CCD-in-CMOS Parallel Read-Out Circuit (SPROCKET) is a mixed-signal front-end design for the readout of Skipper CCD-in-CMOS image sensors. SPROCKET is fabricated in a 65 nm CMOS process and each pixel occupies a 50$\mu$m $\times$ 50$\mu$m footprint. SPROCKET is intended to be heterogeneously integrated with a Skipper-in-CMOS sensor array, such that one readout pixel is connected to a multiplexed array of nine Skipper-in-CMOS pixels to enable massively parallel readout. The front-end includes a variable gain preamplifier, a correlated double sampling circuit, and a 10-bit serial successive approximation register (SAR) ADC. The circuit achieves a sample rate of 100 ksps with 0.48 $\mathrm{e^-_{rms}}$ equivalent noise at the input to the ADC. SPROCKET achieves a maximum dynamic range of 9,000 $e^-$ at the lowest gain setting (or 900 $e^-$ at the lowest noise setting). The circuit operates at 100 Kelvin with a power consumption of 40 $\mu W$ per pixel. A SPROCKET test chip was submitted in September 2022, and test results will be presented at the conference.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

UAV ground penetrating radar array

A GPR system the implements a modified multistatic mode of operation is provided. The GPR is suitable for mounting on an unmanned aerial vehicle. The GPR system has radar transceivers. The GPR system transmits transmit signal serially via the transceivers. For each transceiver that transmits a transmit signal, the GPR system receives a return signal acquired by each transceiver except for a return signal for the transceiver that transmits the transmit signal. The GPR system outputs of matrix of return signals that includes a null value for the return signals of the transceivers that transmit.

Beer, N. Reginald↗

FunMC^2: A Filter for Uncertainty Visualization of Marching Cubes on Multi-Core Devices

Visualization is an important tool for scientists to extract understanding from complex scientific data. Scientists need to understand the uncertainty inherent in all scientific data in order to interpret the data correctly. Uncertainty visualization has been an active and growing area of research to address this challenge. Algorithms for uncertainty visualization can be expensive, and research efforts have been focused mainly on structured grid types. Further, support for uncertainty visualization in production tools is limited. In this paper, we adapt an algorithm for computing key metrics for visualizing uncertainty in Marching Cubes (MC) to multi-core devices and present the design, implementation, and evaluation for a Filter for uncertainty visualization of Marching Cubes on Multi-Core devices (FunMC2). FunMC2 accelerates the uncertainty visualization of MC significantly, and it is portable across multi-core CPUs and GPUs. Evaluation results show that FunMC2 based on OpenMP runs around 11× to 41× faster on multi-core CPUs than the corresponding serial version using one CPU core. FunMC2 based on a single GPU is around 5× to 9× faster than FunMC2 running by OpenMP. Moreover, FunMC2 is flexible enough to process ensemble data with both structured and unstructured mesh types. Furthermore, we demonstrate that FunMC2 can be seamlessly integrated as a plugin into ParaView, a production visualization tool for post-processing.

Wang, Jay↗

CMSSW Scaling Limits on Many-Core Machines

Today the LHC offline computing relies heavily on CPU resources, despite the interest in compute accelerators, such as GPUs, for the longer term future. The number of cores per CPU socket has continued to increase steadily, reaching the levels of 64 cores (128 threads) with recent AMD EPYC processors, and 128 cores on Ampere Altra Max ARM processors. Over the course of the past decade, the CMS data processing framework, CMSSW, has been transformed from a single-threaded framework into a highly concurrent one. The first multithreaded version was brought into production by the start of the LHC Run 2 in 2015. Since then, the framework's threading efficiency has gradually been improved by adding more levels of concurrency and reducing the amount of serial code paths. The latest addition was support for concurrent Runs. In this work we review the concurrency model of the CMSSW, and measure its scalability with real CMS applications, such as simulation and reconstruction, on mode rn many-core machines. We show metrics such as event processing throughput and application memory usage with and without the contribution of I/O, as I/O has been the major scaling limitation for the CMS applications.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗

Community Engagement - A Citizen-Centric Approach to Seeking a Social License - 20017

The long regulatory road has finally been completed-after years of effort a Record of Decision has been signed and a Permit to Construct has been granted or a Permit to Operate has been obtained. But what about the other road that should be taken in parallel-community engagement? Working with the public is not a sequential activity, rather it is a consequential one and needs to be integrated with overall project planning. Unless you have effectively, meaningfully, and patiently engaged with the project's communities of impact, you may find your project trying to obtain a social license or a social license to operate (SLO). The SLO has its origins in the mining industry and its roots in the business model of corporate social responsibility and sustainability. These latter practices are well known to the US DOE and its contractor community. Aspects of the SLO are emerging as individuals and communities are becoming more informed and have increased expectations for being able to influence and shape decisions. When local community issues are not sought out, listened to, or addressed early, and questions are left unanswered, they can become agenda items for larger unaffiliated groups, and project loss (through delays and/or cancellation) can occur. Issues can transition from resolvable to intractable, a type of SLO face-off. Social media campaigns, serial negative media coverage, and protest signs at project sites opposing regulatory decisions already made are no longer anomalies. These types of incidents demonstrate the increasingly delicate relationship between approved regulatory/technical decisions and public acceptance of those decisions. A SLO is not a requirement. However, the building-blocks of a SLO - working with members of affected communities to build understanding, potentially to obtain and maintain community acceptance or even gain approval or support - are evidence of leadership by project sponsors. Actions taken, or not taken, by project sponsors truly have the ability to influence an outcome. While projects are not assured of success or failure, engaging the community in an empowered process is an investment of time and resources toward success for the project and thus for the communities of impact. Authors Note: Extensive literature searches were performed in developing this paper. The majority of the published literature on SLO as a 'movement' was found from sources in Canada, the European Union (Germany and France in particular), South Asia, South Korea, and many Latin American countries. The literature addressed resource development (mining), infrastructure, and energy projects. Articles written by US sources often spoke to origins and structural theory, specific project issues such as Not in My Back Yard (NIMBY) and to protests/demonstrations related to those projects, rather than systemic opposition/conflict phenomena. For these reasons many international SLO experiences and sources are cited in the discussion. The authors recognize these non-US experiences with SLO as having a 'forecast' value to US projects, especially those related to nuclear projects of any type, waste treatment and disposal, energy development (especially fossil fuels as well as alternative sources), mining, and infrastructure. The body of future SLO experiences in the US will shape the future responses to it. (authors)

99 GENERAL AND MISCELLANEOUS↗

Device-Centric Ransomware Detection using Machine Learning-Based Memory Forensics for Smart Inverters

Ransomware attacks are the fastest-growing form of cyberattacks worldwide. Recently, ransomware attacks have targeted industrial control systems (ICSs), including power grids. Lessons learned from recent incidents in ICSs show that ransomware groups can deliver ransomware into not only the organization’s control servers, but also the operational technology (OT) devices such as smart inverters and smart grid devices. This paper proposes a machine learning (ML)- based memory forensics method enabling the detection of ransomware binaries stored in the memory of a commercial smart inverter. Device firmware binary files are extracted from a Serial Peripheral Interface (SPI) flash memory, and samples of both benign and ransomware binaries are generated by a binary manipulation method and a real-world ransomware encryption, separately. A deep transfer learning (DTL) method is used to retrain a convolutional neural network (CNN)-based ransomware detection algorithm using the generated samples. The experimental result validates that the proposed ML-based memory forensics method can accurately detect ransomware files.

97 MATHEMATICS AND COMPUTING↗

Modbus RTU for Embedded Cyber Secure Inverter Controller

The Modbus communication protocol is a widely adopted communication standard in industrial control systems. This communication protocol is known for being reliable and straightforward to implement while being versatile in terms of its operating parameters while supporting multiple formats over various hardware infrastructures and architectures. Many intelligent devices such as Programmable Logic Controllers (PLCs), Human-Machine Interfaces (HMIs), Internet-of-Things (IoT), and various Operational Technologies (OT) utilize Modbus for their communication systems. These types of systems must communicate with each other through a standardized and central communication process. To support the integration of these modular systems, a Field-Programmable Gate Array (FPGA) can act as an embedded central routing fabric for this communication to take place. Embedded systems are versatile enough to interface with various devices and systems to accomplish various goals. Additionally, embedded systems require relatively small physical designs to minimize the required resources to facilitate the intended application by providing low-level system access. This minimization of system resources goes hand in hand with reducing the financial cost of a proposed solution or system. As remotely collaborating researchers often use FPGAs to prototype designs that are required to have a method for data transmission among systems, it is imperative to provide a baseline standard for communications among devices and systems. A typical method of implementing the Modbus RTU communication protocol in an embedded environment is using integrated logic architectures within the FPGA called “Intellectual Property (IP) cores.” IP cores can be designed using integrated logic or circuit designs to function as an embedded processor. These IP cores can then perform the required computational actions to support the Modbus RTU communication protocol by utilizing high-level programming languages such as the C programming language. The hardware description language of Very High-Speed Integrated Circuit Hardware Description Language (VHDL) allows for the control of real hardware at the logic gate and signal level. These logic gates and signals can be designed and controlled to perform desired actions based on the system design. Programming an FPGA using VHDL allows an individual to access the lowest abstraction level of the system during FPGA development. This level of abstraction is referred to as the register-transfer level (RTL), which gives access to manipulating values and variables at the register level. This register-level manipulation provides precision over creating the logical circuit within the FPGA, thus minimizing the required code to perform desired operations. The Modbus RTU communication protocol can be implemented within an FPGA using VHDL programming to establish a standardized and embedded serial communication pathway. This implementation provides a standardized communication protocol to streamline research efforts among researchers, thus increasing the efficiency of research efforts. Additionally, this Modbus RTU implementation requires fewer resources when compared to typical communication protocol implementations that utilize an IP core, reducing the hardware requirement for effective research efforts.

communication↗

Embedding Neural Thermal Scattering (NeTS) Modules in SERPENT for Higher Fidelity Advanced Reactor Analysis

When a neutron born in fission thermalizes to the order of $k$ $B$ $T$, it’s de-Broglie wavelength and energy approach the order of inter-atomic spacing and elementary lattice oscillations, respectively. $S$($a,β,t$) or the scattering law, uuantify these temperature-dependent crystallographic contributions to total cross section (or reaction rate). In a Monte Carlo analysis, cumulative distribution functions (CDFs) of $S$($a,β,t$) are loaded to memory from “A Compact ENDF” (ACE) files for stochastically selecting thermal scattered neutron trajectories. In this work, novel neural thermal scattering (NeTS) modules for $S$($a,β,t$) CDFs are designed, trained, serialized and embedded within SERPENT using Python’s limited C-API for on-the-fly deployment of crystalline graphite $S$($a,β,t$) sampling. Torchscript tracing and Numba just-in-time (JIT) compilation streamline neural inference on NVIDIA GPUs with CUDA libraries. Demonstrations of bare sphere thermalization of fast and thermal sources show excellent agreement between embedded NeTS in SERPENT and MCNP. With an explicit model of the reactor, NeTS can predict on-the-fly changes in TREAT neutron spectra as a function of local temperature, which can serve to improve transient and accident predictions in a multiphysics analysis framework. This framework can be further extended to account on-the-fly for changes in local graphitic microstructure to scattering cross sections, and outlines a novel coupling of modern machine learning with state-of-the-art reactor physics methods.

97 MATHEMATICS AND COMPUTING↗

Streaming Matching and Edge Cover in Practice

Graph algorithms with polynomial space and time requirements often become infeasible for massive graphs with billions of edges or more. State-of-the-art approaches therefore employ approximate serial, parallel, and distributed algorithms to tackle these challenges. However, such approaches require storing the entire graph in memory and thus need access to costly computing resources such as clusters and supercomputers. In this paper, we present practical streaming approaches for solving massive graph problems using limited memory for two prototypical graph problems: maximum weighted matching and minimum weighted edge cover. For matching, we conduct a thorough computational study on two of the semi-streaming algorithms including a recent breakthrough result that achieves a $1/(2+\varepsilon)$-approximation of the weight while using $O( n \log W /\epsilon)$ memory (here $n$ is the number of vertices and $W$ is the maximum edge weight), designed by Paz and Schwartzman [SODA, 2017]. Empirically, we show that the semi-streaming algorithms produce matchings whose weight is close to the best $1/2$-approximate offline algorithm while requiring less time and an order-of-magnitude less memory. For minimum weighted edge cover, we develop three novel semi-streaming algorithms. Two of these algorithms require a single pass through the input graph, require $O(n \log n)$ memory, and provide a 2-approximation guarantee on the objective. We also leverage a relationship between approximate maximum weighted matching and approximate minimum weighted edge cover to develop a two-pass $3/2+\epsilon$-approximate algorithm with the memory requirement of Paz and Schwartzman's semi-streaming matching algorithm. These streaming approaches are compared against the state-of-the-art 3/2-approximate offline algorithm. The semi-streaming matching and the novel edge cover algorithms proposed in this paper can process graphs with several billions of edges in under 30 minutes using 6 GB of memory, which is at least an order of magnitude improvement from the offline (non-streaming) algorithms. For the largest graph, the best alternative offline parallel approximation algorithm (GPA+ROMA) could not finish in three hours even while employing hundreds of processors and 1 TB of memory. We also demonstrate an application of the semi-streaming algorithm by computing a matching using linearly bounded memory on item intersection graphs derived from three machine learning datasets, whereas the existing offline algorithms could not complete on one of these datasets since their memory requirements exceeded 1TB.

Ferdous, S M.↗