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At least 1,675 records · Page 93

OLCF Summit Supercomputer GPU Snapshots During Double-Bit Errors and Normal Operations

As we move into the exascale era, the power and energy footprints of high-performance computing (HPC) systems have grown significantly larger. Due to the harsh power and thermal conditions the system, components are exposed to extreme operating conditions. Operation of such modern HPC systems requires deep insights into long term system behavior to maintain its efficiency as well as its longevity. To help the HPC community to gain such insights, we provide double-bit errors using system telemetry data and logs collected from the Summit supercomputer, equipped with 27,648 Tesla V100 GPUs with 2nd-generation high-bandwidth memory (HBM2). The dataset relies on Nvidia XID records internally collected by GPU firmware at the time of failure occurrence, on the reboot-time logs of each Summit node, on node-level job scheduler records collected after each job termination, and on a 1Hz data rate from the baseboard management controllers (BMCs) of each Summit compute node using the OpenBMC event subscription protocol. Technical details can be found in the paper Oles et. al “Understanding GPU Memory Corruption at Extreme Scale: The Summit Case Study” ICS’24 (https://doi.org/10.1145/3650200.3656615).

97 MATHEMATICS AND COMPUTING↗

Data-driven recovery of hidden physics in reduced order modeling of fluid flows

In this article, we introduce a modular hybrid analysis and modeling (HAM) approach to account for hidden physics in reduced order modeling (ROM) of parameterized systems relevant to fluid dynamics. The hybrid ROM framework is based on using first principles to model the known physics in conjunction with utilizing the data-driven machine learning tools to model the remaining residual that is hidden in data. This framework employs proper orthogonal decomposition as a compression tool to construct orthonormal bases and Galerkin projection (GP) as a model to build the dynamical core of the system. Our proposed methodology hence compensates structural or epistemic uncertainties in models and utilizes the observed data snapshots to compute true modal coefficients spanned by these bases. The GP model is then corrected at every time step with a data-driven rectification using a long short-term memory (LSTM) neural network architecture to incorporate hidden physics. A Grassmannian manifold approach is also adopted for interpolating basis functions to unseen parametric conditions. The control parameter governing the system's behavior is thus implicitly considered through true modal coefficients as input features to the LSTM network. The effectiveness of the HAM approach is then discussed through illustrative examples that are generated synthetically to take hidden physics into account. Furthermore, our approach thus provides insights addressing a fundamental limitation of the physics-based models when the governing equations are incomplete to represent underlying physical processes.

42 ENGINEERING↗

A petabyte size electronic library using the N-Gram memory engine

A model library containing petabytes of data is proposed by Triada, Ltd., Ann Arbor, Michigan. The library uses the newly patented N-Gram Memory Engine (Neurex), for storage, compression, and retrieval. Neurex splits data into two parts: a hierarchical network of associative memories that store 'information' from data and a permutation operator that preserves sequence. Neurex is expected to offer four advantages in mass storage systems. Neurex representations are dense, fully reversible, hence less expensive to store. Neurex becomes exponentially more stable with increasing data flow; thus its contents and the inverting algorithm may be mass produced for low cost distribution. Only a small permutation operator would be recalled from the library to recover data. Neurex may be enhanced to recall patterns using a partial pattern. Neurex nodes are measures of their pattern. Researchers might use nodes in statistical models to avoid costly sorting and counting procedures. Neurex subsumes a theory of learning and memory that the author believes extends information theory. Its first axiom is a symmetry principle: learning creates memory and memory evidences learning. The theory treats an information store that evolves from a null state to stationarity. A Neurex extracts information data without a priori knowledge; i.e., unlike neural networks, neither feedback nor training is required. The model consists of an energetically conservative field of uniformly distributed events with variable spatial and temporal scale, and an observer walking randomly through this field. A bank of band limited transducers (an 'eye'), each transducer in a bank being tuned to a sub-band, outputs signals upon registering events. Output signals are 'observed' by another transducer bank (a mid-brain), except the band limit of the second bank is narrower than the band limit of the first bank. The banks are arrayed as n 'levels' or 'time domains, td.' The banks are the hierarchical network (a cortex) and transducers are (associative) memories. A model Neurex was built and studied. Data were 50 MB to 10 GB samples of text, data base, and images: black/white, grey scale, and high resolution in several spectral bands. Memories at td, S(m(sub td)), were plotted against outputs of memories at td-1. S(m(sub td)) was Boltzman distributed, and memory frequencies exhibited self-organized criticality (SOC); i.e., 'l/f(sup beta)' after long exposures to data. Whereas output signals from level n may be encoded with B(sub output) = O(-log(2)f(sup beta)) bits, and input data encoded with B(sub input) = O((S(td)/S(td-1))(sup n)), B(sup output)/B(sub input) is much less than 1 always, the Neurex determines a canonical code for data and it is a lossless data compressor. Further tests are underway to confirm these results with more data types and larger samples.

Bugajski, Joseph M.↗

A Case For Intra-rack Resource Disaggregation in HPC

The expected halt of traditional technology scaling is motivating increased heterogeneity in high-performance computing (HPC) systems with the emergence of numerous specialized accelerators. As heterogeneity increases, so does the risk of underutilizing expensive hardware resources if we preserve today’s rigid node configuration and reservation strategies. This has sparked interest in resource disaggregation to enable finer-grain allocation of hardware resources to applications. However, there is currently no data-driven study of what range of disaggregation is appropriate in HPC. To that end, we perform a detailed analysis of key metrics sampled in NERSC’s Cori, a production HPC system that executes a diverse open-science HPC workload. In addition, we profile a variety of deep-learning applications to represent an emerging workload. We show that for a rack (cabinet) configuration and applications similar to Cori, a central processing unit with intra-rack disaggregation has a 99.5% probability to find all resources it requires inside its rack. In addition, ideal intra-rack resource disaggregation in Cori could reduce memory and NIC resources by 5.36% to 69.01% and still satisfy the worst-case average rack utilization.

97 MATHEMATICS AND COMPUTING↗

Multiplexer/Demultiplexer Loading Tool (MDMLT)

The purpose of the MDMLT is to improve the reliability and speed of loading multiplexers/demultiplexers (MDMs) in the Software Development and Integration Laboratory (SDIL) by automating the configuration management (CM) of the loads in the MDMs, automating the loading procedure, and providing the capability to load multiple or all MDMs concurrently. This loading may be accomplished in parallel, or single MDMs (remote). The MDMLT is a Web-based tool that is capable of loading the entire International Space Station (ISS) MDM configuration in parallel. It is able to load Flight Equivalent Units (FEUs), enhanced, standard, and prototype MDMs as well as both EEPROM (Electrically Erasable Programmable Read-Only Memory) and SSMMU (Solid State Mass Memory Unit) (MASS Memory). This software has extensive configuration management to track loading history, and the performance improvement means of loading the entire ISS MDM configuration of 49 MDMs in approximately 30 minutes, as opposed to 36 hours, which is what it took previously utilizing the flight method of S-Band uplink. The laptop version recently added to the MDMLT suite allows remote lab loading with the CM of information entered into a common database when it is reconnected to the network. This allows the program to reconfigure the test rigs quickly between shifts, allowing the lab to support a variety of onboard configurations during a single day, based on upcoming or current missions. The MDMLT Computer Software Configuration Item (CSCI) supports a Web-based command and control interface to the user. An interface to the SDIL File Transfer Protocol (FTP) server is supported to import Integrated Flight Loads (IFLs) and Internal Product Release Notes (IPRNs) into the database. An interface to the Monitor and Control System (MCS) is supported to control the power state, and to enable or disable the debug port of the MDMs to be loaded. Two direct interfaces to the MDM are supported: a serial interface (debug port) to receive MDM memory dump data and the calculated checksum, and the Small Computer System Interface (SCSI) to transfer load files to MDMs with hard disks. File transfer from the MDM Loading Tool to EEPROM within the MDM is performed via the MILSTD- 1553 bus, making use of the Real- Time Input/Output Processors (RTIOP) when using the rig-based MDMLT, and via a bus box when using the laptop MDMLT. The bus box is a cost-effective alternative to PC-1553 cards for the laptop. It is noted that this system can be modified and adapted to any avionic laboratory for spacecraft computer loading, ship avionics, or aircraft avionics where multiple configurations and strong configuration management of software/firmware loads are required.

Brewer, Lenox Allen↗

Optimizing Management of Persistent Data Structures in High-Performance Analytics

Large-scale data analytics workflows ingest massive input data into various data structures, including graphs and key-value datastores. These data structures undergo multiple transformations and computations and are typically reused in incremental and iterative analytics workflows. Persisting in-memory views of these data structures enables reusing them beyond the scope of a single program run while avoiding repetitive raw data ingestion overheads. Memory-mapped I/O enables persisting in-memory data structures without data serialization and deserialization overheads. However, memory-mapped I/O lacks the key feature of persisting consistent snapshots of these data structures for incremental ingestion and processing. The obstacles to efficient virtual memory snapshots using memory-mapped I/O include background writebacks outside the application’s control, and the significantly high storage footprint of such snapshots. To address these limitations, we present Privateer, a memory and storage management tool that enables storage-efficient virtual memory snapshotting while also optimizing snapshot I/O performance. Here, we integrated Privateer into Metall, a state-of-the-art persistent memory allocator for C++, and the Lightning Memory-Mapped Database (LMDB), a widely-used key-value datastore in data analytics and machine learning. Privateer optimized application performance by 1.22× when storing data structure snapshots to node-local storage, and up to 16.7× when storing snapshots to a parallel file system. Privateer also optimizes storage efficiency of incremental data structure snapshots by up to 11× using data deduplication and compression.

Computer science↗

An encoder–decoder LSTM-based EMPC framework applied to a building HVAC system

Numerous studies have demonstrated the benefit of economic model predictive control (EMPC) applied to building heating, ventilation, and air conditioning (HVAC) systems. However, the construction and training of predictive models for building HVAC systems are widely recognized as a key technological barrier preventing large-scale adoption of EMPC for buildings. In this work, an encoder–decoder long short-term memory-based EMPC framework is developed. The key advantage of the approach is that a model may be automatically generated from a list of inputs and outputs. From the definition of inputs and outputs, the constructed model may be trained and automatically embedded into the EMPC framework for real-time estimation and control. The overall end-to-end EMPC framework from model training to on-line estimation and control are described. To this end, the encoder–decoder model provides a natural framework for state estimation (encoder), which is required to provide an initial condition for the predictive model of EMPC (decoder). Closed-loop simulations using EnergyPlus are performed to demonstrate the approach. The simulated closed-loop system consists of a building zone from a multi-zone building, which is served by an air handling unit-variable air volume HVAC system. For the HVAC example considered, the trained encoder–decoder model can predict the indoor air temperature and HVAC sensible cooling rate of a building zone over a two-day horizon with high accuracy. Overall, we find that considering a time-of-use electric rate structure, the EMPC, which manipulates the zone temperature setpoint, can reduce the HVAC power consumption cost relative to keeping the zone temperature setpoint at its maximum value (i.e., minimum energy approach).

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗

Electronic shift register memory based on molecular electron-transfer reactions

The design of a shift register memory at the molecular level is described in detail. The memory elements are based on a chain of electron-transfer molecules incorporated on a very large scale integrated (VLSI) substrate, and the information is shifted by photoinduced electron-transfer reactions. The design requirements for such a system are discussed, and several realistic strategies for synthesizing these systems are presented. The immediate advantage of such a hybrid molecular/VLSI device would arise from the possible information storage density. The prospect of considerable savings of energy per bit processed also exists. This molecular shift register memory element design solves the conceptual problems associated with integrating molecular size components with larger (micron) size features on a chip.

Hopfield, J. J.↗

Network acceleration techniques

Splintered offloading techniques with receive batch processing are described for network acceleration. Such techniques offload specific functionality to a NIC while maintaining the bulk of the protocol processing in the host operating system ("OS"). The resulting protocol implementation allows the application to bypass the protocol processing of the received data. Such can be accomplished this by moving data from the NIC directly to the application through direct memory access ("DMA") and batch processing the receive headers in the host OS when the host OS is interrupted to perform other work. Batch processing receive headers allows the data path to be separated from the control path. Unlike operating system bypass, however, the operating system still fully manages the network resource and has relevant feedback about traffic and flows. Embodiments of the present disclosure can therefore address the challenges of networks with extreme bandwidth delay products (BWDP).

Crowley, Patricia↗

Further Development Of Aperture: A Precise Extremely Large Reflective Telescope Using Re-Configurable Elements: NASA Innovative Advanced Concepts (NIAC) - Phase II

One of the pressing needs for space ultraviolet-visible astronomy is a design to allow larger mirrors than the James Webb Space Telescope primary. The diameter of the rocket fairing limits the mirror diameter such that all future missions calling for mirrors up to 16 meters in diameter or larger will require a mirror that is deployed post-launch. In response to the deployment requirement, we address the issues of this concept called "A Precise Extremely Large Reflective Telescope Using Reconfigurable Elements (APERTURE) with both hardware experiments and software simulations... We designed and built several fixtures with O-rings to hold a membrane. We established a coating process to make a membrane that was coated on one side with Cr and the other side with Cr-Terfenol-D-NiCo. The Terfenol-D (T-D hereafter) is the MSM (Magnetic Smart Memory) we use. We bought and established a procedure for measuring a deformation over time and purchased a Shack Hartmann system from Imagine Optic (https://www.imagine-optic.com). The first substrate we used was DuPont (TM) Kapton® polyimide film. Due to material creep, we found the stability over a 48-hour period with a Kapton substrate was not as good as desired (greater than 1 micron). We then switched to CP1 Polyimide. We found the CP1 much more stable to creep, being stable from about 3 hours to 48 hours to within a measurement error to below approximately 0.1 micron. We produced a 13 micron maximum deviation on a 50-millimeter-diameter piece of CP1 (25 microns thick). The T-D coating was about 2 microns, and the other layers, about 10 nanometers. The magnetic field at the base was about 0.1 teslas. We can make the T-D film at least 5 times thicker and the magnetic field at least 5 times stronger, and hence make deformations as much as 25 times larger. We have a formed a collaboration produced at the NIAC (NASA Innovative Advanced Concepts) mid-term review with Dr. Ron Shiri of Goddard Space Flight Center (GSFC) to explore making controlled deviations on lambda/14-lambda/20 scales which are required to bring a surface to the diffraction limit. We carried out only preliminary work on Si using a Coordinate Measuring Machine (CMM), which produced deviations on the 1 micron level. We are still working on a program to bring to GSFC a flat enough (radius of curvature greater than 10 microns) -coated a Si piece with Cr, T-D, NiCo. Then we plan to carry out tests with an interferometer. Further, we formed a new collaboration with Prof. Rajan Vaidyanathan of the University of Central Florida to replace the CP1 with a shape memory alloy (SMA). With his collaboration, we acquired new Federal funding outside of NASA to explore the use of SMAs (we use NiTi). Our preliminary results indicate that we can produce deformations greater than 1 micron on approximately 100 microns thick. Furthermore we have shown that the NiTi can deploy to better than 1 micron of its set original and then trained shape.

Re-Configurable Elements↗

Effective field theory of stochastic diffusion from gravity

Planar black holes in AdS have long-lived quasinormal modes which capture the physics of charge and momentum diffusion in the dual field theory. How should we characterize the effective dynamics of a probe system coupled to the conserved currents of the dual field theory? Specifically, how would such a probe record the long-lived memory of the black hole and its Hawking fluctuations? We address this question by exhibiting a universal gauge invariant framework which captures the physics of stochastic diffusion in holography: a designer scalar with a gravitational coupling governed by a single parameter, the Markovianity index. We argue that the physics of gauge and gravitational perturbations of a planar Schwarzschild-AdS black hole can be efficiently captured by such designer scalars. We demonstrate that this framework allows one to decouple, at the quadratic order, the long-lived quasinormal and Hawking modes from the short-lived ones. It furthermore provides a template for analyzing fluctuating open quantum field theories with memory. In particular, we use this set-up to analyze the diffusive Hawking photons and gravitons about a planar Schwarzschild-AdS black hole and derive the quadratic effective action that governs fluctuating hydrodynamics of the dual CFT. Along the way we also derive results relevant for probes of hyperscaling violating backgrounds at finite temperature.

79 ASTRONOMY AND ASTROPHYSICS↗

Address tracing of parallel systems via TRAPEDS

Trace-driven simulation is an important aid in performance analysis of computer systems. Capturing address traces to use in these simulations, however, is a difficult problem for parallel processor architectures. A technique termed TRAPEDS modifies executable code (at the assembly language level) to dynamically collect the address trace from executing code. TRAPEDS has recently been implemented on both a hypercube multicomputer and a shared-memory multiprocessor. Particular attention is focused on strategies for efficiently and accurately collecting traces from both classes of parallel machines. The iPSC/2 hypercube multicomputer implementation traces both user and system code, and performs simulation on-the-fly to avoid large storage costs. Strategies are detailed for mitigating address trace distortion when collecting operating system traces. The Encore Multimax multiprocessor implementation uses a timer-based approach to reflect the interleaving of the processor traces and stores the traces to disc. Time and space overhead results are presented for both TRAPEDS implementations. Experimental cache simulation results derived from iPSC/2 address traces are presented to illustrate the importance of tracing operating system references.

Stunkel, Craig B.↗

Colloquium: Ice rule and emergent frustration in particle ice and beyond

Geometric frustration and the ice rule are two concepts that are intimately connected and widespread across condensed matter. The first refers to the inability of a system to satisfy competing interactions in the presence of spatial constraints. The second, in its more general sense, represents a prescription for the minimization of the topological charges in a constrained system. Both can lead to manifolds of high susceptibility and nontrivial, constrained disorder where exotic behaviors can appear and even be designed deliberately. This Colloquium describes the emergence of geometric frustration and the ice rule in soft condensed matter. It excludes the extensive developments of mathematical physics within the field of geometric frustration, but rather focuses on systems of confined microscopic or mesoscopic particles that emerge as a novel paradigm exhibiting spin degrees of freedom. In such systems, geometric frustration can be engineered artificially by controlling the spatial topology and geometry of the lattice, the position of the individual particle units, or their relative filling fraction. These capabilities enable the creation of novel and exotic phases of matter and also potentially lead toward technological applications related to memory and logic devices that are based on the motion of topological defects. The rapid progress in theory and experiments is reviewed and the intimate physical connections with other frustrated systems at different length scales are discussed.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Efficient discontinuous Galerkin implementations and preconditioners for implicit unsteady compressible flow simulations

This work presents and compares efficient implementations of high-order discontinuous Galerkin methods: a modal matrix-free discontinuous Galerkin (DG) method, a hybridizable discontinuous Galerkin (HDG) method, and a primal formulation of HDG, applied to the implicit solution of unsteady compressible flows. The matrix-free implementation allows for a reduction of the memory footprint of the solver when dealing with implicit time-accurate discretizations. HDG reduces the number of globally-coupled degrees of freedom relative to DG, at high order, by statically condensing element-interior degrees of freedom from the system in favor of face unknowns. The primal formulation further reduces the element-interior degrees of freedom by eliminating the gradient as a separate unknown. This paper introduces a p-multigrid preconditioner implementation for these discretizations and presents results for various flow problems. Benefits of the p-multigrid strategy relative to simpler, less expensive, preconditioners are observed for stiff systems, such as those arising from low-Mach number flows at high-order approximation. The p-multigrid preconditioner also shows excellent scalability for parallel computations. Finally, additional savings in both speed and memory occur with a matrix-free/reduced version of the preconditioner.

97 MATHEMATICS AND COMPUTING↗

Communication Optimizations for a Wireless Distributed Prognostic Framework

Distributed architecture for prognostics is an essential step in prognostic research in order to enable feasible real-time system health management. Communication overhead is an important design problem for such systems. In this paper we focus on communication issues faced in the distributed implementation of an important class of algorithms for prognostics - particle filters. In spite of being computation and memory intensive, particle filters lend well to distributed implementation except for one significant step - resampling. We propose new resampling scheme called parameterized resampling that attempts to reduce communication between collaborating nodes in a distributed wireless sensor network. Analysis and comparison with relevant resampling schemes is also presented. A battery health management system is used as a target application. A new resampling scheme for distributed implementation of particle filters has been discussed in this paper. Analysis and comparison of this new scheme with existing resampling schemes in the context for minimizing communication overhead have also been discussed. Our proposed new resampling scheme performs significantly better compared to other schemes by attempting to reduce both the communication message length as well as number total communication messages exchanged while not compromising prediction accuracy and precision. Future work will explore the effects of the new resampling scheme in the overall computational performance of the whole system as well as full implementation of the new schemes on the Sun SPOT devices. Exploring different network architectures for efficient communication is an importance future research direction as well.

Saha, Sankalita↗

System architecture of a gallium arsenide one-gigahertz digital IC tester

The design for a 1-GHz digital integrated circuit tester for the evaluation of custom GaAs chips and subsystems is discussed. Technology-related problems affecting the design of a GaAs computer are discussed, with emphasis on the problems introduced by long printed-circuit-board interconnect. High-speed interface modules provide a link between the low-speed microprocessor and the chip under test. Memory-multiplexer and memory-shift register architectures for the storage of test vectors are described in addition to an architecture for local data storage consisting of a long chain of GaAs shift registers. The tester is constructed around a VME system card cage and backplane, and very little high-speed interconnect exists between boards. The tester has a three part self-test consisting of a CPU board confidence test, a main memory confidence test, and a high-speed interface module functional test.

Fouts, Douglas J.↗

Defect-induced formation and frustration-driven multiple magnetic transitions in Gd 2 Co 0.90 Si 2.90

A new ternary compound, Gd 2 Co 0.90 Si 2.90 , has been synthesized in a chemically single phase by deliberately introducing lattice vacancies in the Co and Si sites. The system is characterized by DC magnetization, heat capacity, resistivity and density functional theory (DFT) calculations. Here, a detailed experimental study reveals that the system exhibits an antiferromagnetic transition below T N = 11.3 K followed by spin freezing behaviour below T B ~ 4.8 K. An additional high-temperature magnetic transition could also be detected at T H ~ 150 K, which is short range in character and is associated with defect-induced polarization of the conduction electrons. The spin-glass-like state formation in the system is additionally bolstered by the observation of magnetic relaxation and associated aging phenomena as well as the magnetic memory effect. On the basis of non-equilibrium dynamical behaviour, we argue that the glassy state in this compound favours the hierarchical model over the droplet model. DFT calculations and experimental outcomes establish that the ground state is magnetically frustrated due to the small energy difference between distinct spin configurations having closely spaced ground-state energies.

37 INORGANIC, ORGANIC, PHYSICAL, AND ANALYTICAL CH↗

The parallelism motifs of genomic data analysis

Genomic datasets are growing dramatically as the cost of sequencing continues to decline and small sequencing devices become available. Enormous community databases store and share these data with the research community, but some of these genomic data analysis problems require large-scale computational platforms to meet both the memory and computational requirements. These applications differ from scientific simulations that dominate the workload on high-end parallel systems today and place different requirements on programming support, software libraries and parallel architectural design. For example, they involve irregular communication patterns such as asynchronous updates to shared data structures. We consider several problems in high-performance genomics analysis, including alignment, profiling, clustering and assembly for both single genomes and metagenomes. We identify some of the common computational patterns or ‘motifs’ that help inform parallelization strategies and compare our motifs to some of the established lists, arguing that at least two key patterns, sorting and hashing, are missing. This article is part of a discussion meeting issue ‘Numerical algorithms for high-performance computational science’.

59 BASIC BIOLOGICAL SCIENCES↗