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NASA NTRS2006

FETs Based on Doped Polyaniline/Polyethylene Oxide Fibers

A family of experimental highly miniaturized field-effect transistors (FETs) is based on exploitation of the electrical properties of nanofibers of polyaniline/ polyethylene oxide (PANi/PEO) doped with camphorsulfonic acid. These polymer-based FETs have the potential for becoming building blocks of relatively inexpensive, low-voltage, highspeed logic circuits that could supplant complementary metal oxide/semiconductor (CMOS) logic circuits. The development of these polymerbased FETs offers advantages over the competing development of FETs based on carbon nanotubes. Whereas it is difficult to control the molecular structures and, hence, the electrical properties of carbon nanotubes, it is easy to tailor the electrical properties of these polymerbased FETs, throughout the range from insulating through semiconducting to metallic, through choices of doping levels and chemical manipulation of polymer side chains. A further advantage of doped PANi/PEO nanofibers is that they can be made to draw very small currents and operate at low voltage levels, and thus are promising for applications in which there are requirements to use many FETs to obtain large computational capabilities while minimizing power demands. Fabrication of an experimental FET in this family begins with the preparation of a substrate as follows: A layer of silicon dioxide between 50 and 200 nm thick is deposited on a highly doped (resistivity 0.01 W.cm) silicon substrate, then gold electrodes/contact stripes are deposited on the oxide. Next, one or more fibers of camphorsulphonic acid-doped PANi/PEO having diameters of the order of 100 nm are electrospun onto the substrate so as to span the gap between the gold electrodes (see Figure 1). Figure 2 depicts measured current-versus-voltage characteristics of the device of Figure 1, showing that saturation channel currents occur at source-todrain potentials that are surprisingly low, relative to those of CMOS FETs. The hole mobility in the depletion regime in this transistor was found to be 1.4 10(exp -4) sq cm/(V.s), while the one-dimensional charge density at zero gate bias was estimated to be approximately one hole per 50 two-ring repeat units of polyaniline, consistent with the rather high channel conductivity (approx. 10(exp -3) S/cm). Reducing or eliminating the PEO content of the fibers is expected to enhance the properties of future versions of this transistor.

Theofylaktos, Noulie↗

NASA NTRS2006

Nano Sensors for Gas Detection in Space and Ground Support Applications

Personnel living in a space environment as well as technicians and engineers preparing spacecraft for launch can potentially be exposed to small amounts of hazardous gases. It is therefore important to be able to detect, identify and quantify the presence of a gas especially when its presence could lead to a fatal situation. The use of small and sensitive sensors can allow for the placement of these devices over a large area, thus allowing for a more precise and timely determination of a gas leak. ASRC Aerospace and its research partners are developing nano sensors for detection of various gases, including but not limited to: H2, NH3, N2O4, hydrazine and others. Initial laboratory testing has demonstrated the capability to detect the gases in concentrations lower than parts per million. Testing and development is continuing to improve the response and recovery times, to increase the sensitivity of the devices. Different coatings and electrodes are currently being evaluated to determine the optimum configuration of a variety of gases. The small footprint of the Nano sensors allows for several devices, each responsive in a different way to different gases, to be placed into a single substrate. Multiple devices embedded into a single substrate results in increased reliability and in a decrease for periodic calibrations. The use of different coatings will result in a small electronic nose capable of distinguishing between different gases. A multi-channel signal conditioner amplifier built on a small multi chip module is used to process the output of the sensors and to deliver a signal that can be remotely monitored. All the data is digitized and transmitted over the same cable pair used to power the amplifier. Multiple outputs can be connected to a single cable pair in order to minimize the added weight and expense associated with cabling in a spacecraft. The sensors will be run through a qualification process to evaluate their suitability for space applications we are expecting to have fully functional sensors available for initial field deployment and testing by the end of the year 2006.

Medelius, Pedro J.↗

NASA NTRS2019

Applications of Atomic Layer Deposition in the Modification of Carbon Nanotubes

Atomic Layer Deposition (ALD) is a cost-effective nanoadditive-manufacturing technique that allows for conformal coating of substrates with atomic control in a benign temperature and pressure environment. Using paired precursor gases, thin films can be deposited on flat or textured surfaces ranging from glass, polymers, aerogels, and metals. Through atomic layer control, where single layers of atoms are deposited, fabrication of metal transparent films, nano-laminates, and coatings of nano-channels and pores is achievable. Reaction mechanisms in ALD are normally self-limiting, allowing for atomically accurate control of nanometer (nm) thicknesses. Therefore, high uniformity and precise thickness control make ALD an attractive process for the creation of novel nano-scale devices. Decreases in resistivity and density of electrical wire are needed to improve the function of electronics, electric motors and cables. Such improvements may be accomplished by adding ballistically conducting, metallic carbon nanotubes (CNT) to Cu. ALD was used to coat multiple substrates including CNT with Cu in an effort to make CNT-Cu composites which is more conductive and less dense than Cu. In addition, ALD can be used to as a method to deposit the catalyst layer seed layer for CNT growth using Ni. The ALD of copper metallic films can follow multiple reaction pathways depending on the ALD precursors used. For this work the reaction pathway was deposition of copper oxide and then post process annealing in a hydrogen environment. Copper(II) diacetylacetonate (Cu(acac)2) and ozone are used as precursors for copper oxide. As-deposited copper oxide films prepared at 180°C resulted in a growth per cycle of 1.0 A/cycle with low film resistivity.

Dwivedi, Vivek H.↗

NASA NTRSDate not supplied

Development of Multilayered Coatings for Nerva-Type Graphite Fuel Elements- An Overview

“Mid-passage corrosion” (MPC) was observed in NbC and ZrC-coated graphite (Gr)-based nuclear fuels during the NERVA/Rover programs. A new multilayered coating concept was proposed to solve this problem. The concept envisions designing a compliant multilayered coatings architecture to accommodate the thermal expansion mismatch strains between the ZrC outer coating and the Gr/(U,Zr)C fuel matrix. Additionally, the coating architecture uses diffusion barriers to minimize carbon diffusion from the substrate, and hydrogen diffusion from the flowing gas stream, into the multilayer coating. The present paper provides a brief overview of the development of multilayered coatings deposited on Gr disks, as well as within the inner channels of a19-hole hexagonal rod 152.4 mm long, by chemical vapor deposition (CVD) in proof-of concept studies. The cross-sectional microstructural observations are discussed. These trials have established that it is possible to deposit multilayered coatings by CVD in 19-hole hexagonal rods similar to the NERVA fuel rod design although the quality of the coatings and the uniformity of their thicknesses require further improvement.

Multilayer coatings, graphite, nuclear thermal pro↗

NASA NTRS2006

Four-Quadrant Analog Multipliers Using G4-FETs

Theoretical analysis and some experiments have shown that the silicon-on-insulator (SOI) 4-gate transistors known as G4-FETs can be used as building blocks of four-quadrant analog voltage multiplier circuits. Whereas a typical prior analog voltage multiplier contains between six and 10 transistors, it is possible to construct a superior voltage multiplier using only four G4-FETs. A G4-FET is a combination of a junction field-effect transistor (JFET) and a metal oxide/semiconductor field-effect transistor (MOSFET). It can be regarded as a single transistor having four gates, which are parts of a structure that affords high functionality by enabling the utilization of independently biased multiple inputs. The structure of a G4-FET of the type of interest here (see Figure 1) is that of a partially-depleted SOI MOSFET with two independent body contacts, one on each side of the channel. The drain current comprises of majority charge carriers flowing from one body contact to the other that is, what would otherwise be the side body contacts of the SOI MOSFET are used here as the end contacts [the drain (D) and the source (S)] of the G4-FET. What would otherwise be the source and drain of the SOI MOSFET serve, in the G4-FET, as two junction-based extra gates (JG1 and JG2), which are used to squeeze the channel via reverse-biased junctions as in a JFET. The G4-FET also includes a polysilicon top gate (G1), which plays the same role as does the gate in an accumulation-mode MOSFET. The substrate emulates a fourth MOS gate (G2). By making proper choices of G4-FET device parameters in conjunction with bias voltages and currents, one can design a circuit in which two input gate voltages (Vin1,Vin2) control the conduction characteristics of G4-FETs such that the output voltage (Vout) closely approximates a value proportional to the product of the input voltages. Figure 2 depicts two such analog multiplier circuits. In each circuit, there is the following: The input and output voltages are differential, The multiplier core consists of four G4- FETs (M1 through M4) biased by a constant current sink (Ibias), and The G4-FETs in two pairs are loaded by two identical resistors (RL), which convert a differential output current to a differential output voltage. The difference between the two circuits stems from their input and bias configurations. In each case, provided that the input voltages remain within their design ranges as determined by considerations of bias, saturation, and cutoff, then the output voltage is nominally given by Vout = kVin1Vin2, where k is a constant gain factor that depends on the design parameters and is different for the two circuits. In experimental versions of these circuits constructed using discrete G4- FETs and resistors, multiplication of voltages in all four quadrants (that is, in all four combinations of input polarities) was demonstrated, and deviations of the output voltages from linear dependence on the input voltages were found to amount to no more than a few percent. It is anticipated that in fully integrated versions of these circuits, the deviations from linearity will be made considerably smaller through better matching of devices.

Mojarradi, Mohammad↗

NASA NTRS2011

The QWIP Focal Plane Assembly for NASA's Landsat Data Continuity Mission

The Thermal Infrared Sensor (TIRS) is a QWIP based instrument intended to supplement the Operational Land Imager (OLI) for the Landsat Data Continuity Mission (LDCM). The TIRS instrument is a dual channel far infrared imager with the two bands centered at 10.8 m and 12.0 m. The focal plane assembly (FPA) consists of three 640x512 GaAs Quantum Well Infrared Photodetector (QWIP) arrays precisely mounted to a silicon carrier substrate that is mounted on an invar baseplate. The two spectral bands are defined by bandpass filters mounted in close proximity to the detector surfaces. The focal plane operating temperature is 43K. The QWIP arrays are hybridized to Indigo ISC9803 readout integrated circuits (ROICs). Two varieties of QWIP detector arrays are being developed for this project, a corrugated surface structure QWIP and a grating surface structure QWIP. This paper will describe the TIRS system noise equivalent temperature difference sensitivity as it affects the QWIP focal plane performance requirements: spectral response, dark current, conversion efficiency, read noise, temperature stability, pixel uniformity, optical crosstalk and pixel yield. Additional mechanical constraints as well as qualification through Technology Readiness Level 6 (TRL 6) will also be discussed.

Jhabvala, M.↗

NASA NTRS2017

An Introduction to Atomic Layer Deposition

Atomic Layer Deposition has been instrumental in providing a deposition method for multiple space flight applications. It is well known that ALD is a cost effective nanoadditive-manufacturing technique that allows for the conformal coating of substrates with atomic control in a benign temperature and pressure environment. Through the introduction of paired precursor gases, thin films can be deposited on a myriad of substrates from flat surfaces to those with significant topography. By providing atomic layer control, where single layers of atoms can be deposited, the fabrication of metal transparent films, precise nano-laminates, and coatings of nano-channels, pores and particles is achievable. The feasibility of this technology for NASA line of business applications range from thermal systems, optics, sensors, to environmental protection. An overview of this technology will be presented.

ALD↗

NASA NTRS2002

Sputtering Erosion Measurement on Boron Nitride as a Hall Thruster Material

The durability of a high-powered Hall thruster may be limited by the sputter erosion resistance of its components. During normal operation, a small fraction of the accelerated ions will impact the interior of the main discharge channel, causing its gradual erosion. A laboratory experiment was conducted to simulate the sputter erosion of a Hall thruster. Tests of sputter etch rate were carried out using 300 to 1000 eV Xenon ions impinging on boron nitride substrates with angles of attack ranging from 30 to 75 degrees from horizontal. The erosion rates varied from 3.41 to 14.37 Angstroms/[sec(mA/sq cm)] and were found to depend on the ion energy and angle of attack, which is consistent with the behavior of other materials.

Britton, Melissa↗

NASA NTRS1983

Method of making low leakage N-channel SOS transistors utilizing positive photoresist masking techniques

A self-aligned method of implanting the edges of NMOS/SOS transistors is described. The method entails covering the silicon islands with a thick oxide layer, applying a protective photoresist layer over the thick oxide layer, and exposing the photoresist layer from the underside of the sapphire substrate thereby using the island as an exposure mask. Only the photoresist on the islands' edges will be exposed. The exposed photoresist is then removed and the thick oxide is removed from the islands edges which are then implanted.

Policastro, Steven G.↗

NASA NTRS2010

The QWIP Focal Plane Assembly for NASA's Landsat Data Continuity Mission

The Thermal Infrared Sensor (TIRS) is a QWIP based instrument intended to supplement the Operational Land Imager (OLI) for the Landsat Data Continuity Mission (LDCM). The TIRS instrument is a dual channel far infrared imager with the two bands centered at 10.8[mu]m and 12.0[mu]m. The focal plane assembly (FPA) consists of three 640x512 GaAs Quantum Well Infrared Photodetector (QWIP) arrays precisely mounted to a silicon carrier substrate that is mounted on an invar baseplate. The two spectral bands are defined by bandpass filters mounted in close proximity to the detector surfaces. The focal plane operating temperature is 43K. The QWIP arrays are hybridized to Indigo ISC9803 readout integrated circuits (ROICs). Two varieties of QWIP detector arrays are being developed for this project, a corrugated surface structure QWIP and a grating surface structure QWIP. This paper will describe the TIRS system noise equivalent temperature difference sensitivity as it affects the QWIP focal plane performance requirements: spectral response, dark current, conversion efficiency, read noise, temperature stability, pixel uniformity, optical crosstalk and pixel yield. Additional mechanical constraints as well as qualification through Technology Readiness Level 6 (TRL 6) will also be discussed.

Jhabvala, M↗

NASA NTRS1990

Osteoclast cytosolic calcium, regulated by voltage-gated calcium channels and extracellular calcium, controls podosome assembly and bone resorption

The mechanisms of Ca2+ entry and their effects on cell function were investigated in cultured chicken osteoclasts and putative osteoclasts produced by fusion of mononuclear cell precursors. Voltage-gated Ca2+ channels (VGCC) were detected by the effects of membrane depolarization with K+, BAY K 8644, and dihydropyridine antagonists. K+ produced dose-dependent increases of cytosolic calcium ([Ca2+]i) in osteoclasts on glass coverslips. Half-maximal effects were achieved at 70 mM K+. The effects of K+ were completely inhibited by dihydropyridine derivative Ca2+ channel blocking agents. BAY K 8644 (5 X 10(-6) M), a VGCC agonist, stimulated Ca2+ entry which was inhibited by nicardipine. VGCCs were inactivated by the attachment of osteoclasts to bone, indicating a rapid phenotypic change in Ca2+ entry mechanisms associated with adhesion of osteoclasts to their resorption substrate. Increasing extracellular Ca2+ ([Ca2+]e) induced Ca2+ release from intracellular stores and Ca2+ influx. The Ca2+ release was blocked by dantrolene (10(-5) M), and the influx by La3+. The effects of [Ca2+]e on [Ca2+]i suggests the presence of a Ca2+ receptor on the osteoclast cell membrane that could be coupled to mechanisms regulating cell function. Expression of the [Ca2+]e effect on [Ca2+]i was similar in the presence or absence of bone matrix substrate. Each of the mechanisms producing increases in [Ca2+]i, (membrane depolarization, BAY K 8644, and [Ca2+]e) reduced expression of the osteoclast-specific adhesion structure, the podosome. The decrease in podosome expression was mirrored by a 50% decrease in bone resorptive activity. Thus, stimulated increases of osteoclast [Ca2+]i lead to cytoskeletal changes affecting cell adhesion and decreasing bone resorptive activity.

NASA Discipline Musculoskeletal↗

NASA NTRS2015

Fabrication of Nanopipette Arrays for Biosensing

Method for providing a nanopipette array for biosensing applications. A thin substrate of anodizable metal ("AN-metal," such as Al, Mg, Zn, Ti, Ta and/or Nb) is anodized at temperature T=20-200.degree. C., chemical bath pH=4-6 and electrical potential 1-300 Volts, to produce an array of anodized nanopipette channels, having diameters 10-50 nm, with oxidized channel surfaces of thickness 5-20 nm. A portion of exposed non-oxidized AN-metal between adjacent nanopipette channels, of length 1-5 .mu.m, is etched away, exposing inner and outer surfaces of a nanopipette channel. A probe molecule, is deposited on one or both surfaces to provide biosensing capability for K(.gtoreq.1) target molecules. Target molecule presence, in an above-threshold concentration, in a fluid passed through or adjacent to a nanopipette channel, produces characteristic detection signals associated with the probe molecule site.

Meyyappan, Meyya↗

NASA NTRS1988

Characterization of GaAlAs optical waveguide heterostructures grown by molecular beam epitaxy

Multiple-layer GaAlAs optical waveguide heterostructures have been grown by MBE. These samples were designed to operate at 840 nm with negligible coupling of guided light to the absorbing GaAs substrate. The Al concentration was 13 percent for the guiding layer and was 16 percent for the cladding layers. The process for growing waveguide layers was calibrated primarily by high-energy electron diffraction, with the optical quality confirmed by photoluminescence measurements. Channel waveguide structures having widths of 5 microns were etched in a low-pressure magnetically confined multipolar plasma reactor. The resulting waveguide structures were characterized by Raman spectroscopy, ellipsometry, AES, and optical-waveguide loss measurements.

Radens, C. J.↗

NASA NTRS2006

The Zero-Degree Detector System

We will report on a detector system used for accelerator measurement of nuclear fragmentation cross sections. This system consists of two detector planes, each carrying a ring of 8 detectors. Each detector has 64 pads. These two detector planes are arranged facing each other so that the matching detector pads on each plane form a two element charged particle telescope. Each of these telescopes is capable of determining the elemental identity of nuclear fragments passing through it. The system is used to measure light fragment production in the presence of heavier fragments. We will present a detailed discussion of the 64-pad detector design, the substrate design. The front-end electronics used to read out the signals is based on a custom VLSI chip developed for the Advanced Thin Ionization Calorimeter experiment which has been flown successfully twice in Antarctica. Each of these chips has 16 channels and each channel consists of a charge-sensitive preamplifier followed by a shaping amplifier and a track-and-hold circuit. The track-and-hold circuits are connected via a multiplexer to an output line driver. This allows the held signals to be presented, one-by-one via a common data line to a analog-to-digital converter. Because the output line driver can be placed in a high input impedance state when not in use, it is possible to daisy-change many chips on the same common data line. The front-end electronics and data readout scheme will be discussed in detail. The Zero Degree Detector has been used in several accelerator experiments conducted at the NASA Space Radiation Laboratory and the Alternating Gradient Synchrotron at Brookhaven National Laboratory as well as at the HIMAC accelerator in Japan. We will show examples of data taken at these accelerator runs to demonstrate how the system works.

Adams, James H.↗

NASA NTRS2007

G4-FETs as Universal and Programmable Logic Gates

An analysis of a patented generic silicon- on-insulator (SOI) electronic device called a G4-FET has revealed that the device could be designed to function as a universal and programmable logic gate. The universality and programmability could be exploited to design logic circuits containing fewer discrete components than are required for conventional transistor-based circuits performing the same logic functions. A G4-FET is a combination of a junction field-effect transistor (JFET) and a metal oxide/semiconductor field-effect transistor (MOSFET) superimposed in a single silicon island and can therefore be regarded as two transistors sharing the same body. A G4-FET can also be regarded as a single transistor having four gates: two side junction-based gates, a top MOS gate, and a back gate activated by biasing of the SOI substrate. Each of these gates can be used to control the conduction characteristics of the transistor; this possibility creates new options for designing analog, radio-frequency, mixed-signal, and digital circuitry. With proper choice of the specific dimensions for the gates, channels, and ancillary features of the generic G4-FET, the device could be made to function as a three-input, one-output logic gate. As illustrated by the truth table in the top part of the figure, the behavior of this logic gate would be the inverse (the NOT) of that of a majority gate. In other words, the device would function as a NOT-majority gate. By simply adding an inverter, one could obtain a majority gate. In contrast, to construct a majority gate in conventional complementary metal oxide/semiconductor (CMOS) circuitry, one would need four three-input AND gates and a four-input OR gate, altogether containing 32 transistors.

Johnson, Travis↗

NASA NTRS2016

Spectral and Wavefront Error Performance of WFIRST-AFTA Bandpass Filter Coating Prototypes

The Cycle 5 design baseline for the Wide-Field Infrared Survey Telescope Astrophysics Focused Telescope Assets (WFIRST/AFTA) instrument includes a single wide-field channel (WFC) instrument for both imaging and slit-less spectroscopy. The only routinely moving part during scientific observations for this wide-field channel is the element wheel (EW) assembly. This filter-wheel assembly will have 8 positions that will be populated with 6 bandpass filters, a blank position, and a Grism that will consist of a three-element assembly to disperse the full field with an undeviated central wavelength for galaxy redshift surveys. All filter elements in the EW assembly will be made out of fused silica substrates (110 mm diameter) that will have the appropriate bandpass coatings according to the filter designations (Z087, Y106, J129, H158, F184, W149 and Grism). This paper presents and discusses the performance (including spectral transmission and reflected/transmitted wavefront error measurements) of a subset of bandpass filter coating prototypes that are based on the WFC instrument filter compliment. The bandpass coating prototypes that are tested in this effort correspond to the Z087, W149, and Grism filter elements. These filter coatings have been procured from three different vendors to assess the most challenging aspects in terms of the in-band throughput, out of band rejection (including the cut-on and cutoff slopes), and the impact the wavefront error distortions of these filter coatings will have on the imaging performance of the wide-field channel in the WFIRST/AFTA observatory.

cryogenic temperatures↗

NASA NTRS2016

Spectral and Wavefront Error Performance of WFIRST/AFTA Prototype Filters

The Cycle 5 design baseline for the Wide-Field Infrared Survey Telescope Astrophysics Focused Telescope Assets (WFIRSTAFTA) instrument includes a single wide-field channel (WFC) instrument for both imaging and slit-less spectroscopy. The only routinely moving part during scientific observations for this wide-field channel is the element wheel (EW) assembly. This filter-wheel assembly will have 8 positions that will be populated with 6 bandpass filters, a blank position, and a Grism that will consist of a three-element assembly to disperse the full field with an undeviated central wavelength for galaxy redshift surveys. All filter elements in the EW assembly will be made out of fused silica substrates (110 mm diameter) that will have the appropriate bandpass coatings according to the filter designations (Z087, Y106, J129, H158, F184, W149 and Grism). This paper presents and discusses the performance (including spectral transmission and reflectedtransmitted wavefront error measurements) of a subset of bandpass filter coating prototypes that are based on the WFC instrument filter compliment. The bandpass coating prototypes that are tested in this effort correspond to the Z087, W149, and Grism filter elements. These filter coatings have been procured from three different vendors to assess the most challenging aspects in terms of the in-band throughput, out of band rejection (including the cut-on and cutoff slopes), and the impact the wavefront error distortions of these filter coatings will have on the imaging performance of the de-field channel in the WFIRSTAFTA observatory.

cryogenic temperatures↗

NASA NTRS2002

Methods for growth of relatively large step-free SiC crystal surfaces

A method for growing arrays of large-area device-size films of step-free (i.e., atomically flat) SiC surfaces for semiconductor electronic device applications is disclosed. This method utilizes a lateral growth process that better overcomes the effect of extended defects in the seed crystal substrate that limited the obtainable step-free area achievable by prior art processes. The step-free SiC surface is particularly suited for the heteroepitaxial growth of 3C (cubic) SiC, AlN, and GaN films used for the fabrication of both surface-sensitive devices (i.e., surface channel field effect transistors such as HEMT's and MOSFET's) as well as high-electric field devices (pn diodes and other solid-state power switching devices) that are sensitive to extended crystal defects.

Neudeck, Philip G.↗