Stabilization and control systems.
Spacecraft attitude control and stabilization emphasizing control computers, switching logic, mission requirements and system design
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Results for “digital logic”
Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Optical computing with laser light
Linear and nonlinear optical processing techniques (Fourier transformation, convolution and correlation, arithmetic operations - addition and subtraction with gratings, generalized orthogonal transformations; theta modulation, half-tone screen process, optical feedback) for mathematical computations are reviewed. The use of gratings and computer holograms in addition, subtraction, differentiation, and application of generalized transformations is discussed. Use of nonlinear optical elements with or without optical coherent feedback in such nonlinear operations as taking logarithms and thresholding is described. Applications in hybrid systems incorporating digital computer and optical processor with real-time interface devices, or optical threshold and logic devices for parallel processing to apply digital techniques to optical information are considered.
Lee, S. H.↗
Digital multiplexing of analog data in a microprocessor controlled data acquisition system
The purpose of the paper is to explore the ramifications of doing the multiplexing function in the digital domain and of using the microprocessor to replace the hardwired control logic which resides in the typical analog to digital converter. Two types of conversion (one working in parallel inputs, and one in sequential order) strategies are discussed where the microprocessor is in full control of the conversion. One advantage of using a digital multiplexor is that, contrary to an analog multiplexor, it does not degrade the fidelity of the conversion process.
Cliff, R. A.↗
Practical applications of digital integrated circuits. Part 4: Hybrid digital integrated circuits
The 7400 line of transistor to transistor logic (TTL) devices is emphasized almost exclusively where hardware is concerned. However, it should be noted that the logic theory contained herein applies to all hardware. Clock generators, waveform generation, signal shaping and conditioning, digital to analog conversion, and analog to digital conversion are discussed.
Source record↗
Onboard checkout and data management system - Design supplementary
System logic, data acquisition process, and digital data transmission system of onboard checkout and data management system
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Computer Aided Digital Systems Design /CADSD/
Computer aided digital systems design with combinatorial logic elements
Franke, E.↗
On-board processing concepts for future satellite communications systems
The initial definition of on-board processing for an advanced satellite communications system to service domestic markets in the 1990's is discussed. An exemplar system with both RF on-board switching and demodulation/remodulation baseband processing is used to identify important issues related to system implementation, cost, and technology development. Analyses of spectrum-efficient modulation, coding, and system control techniques are summarized. Implementations for an RF switch and baseband processor are described. Among the major conclusions listed is the need for high gain satellites capable of handling tens of simultaneous beams for the efficient reuse of the 2.5 GHz 30/20 frequency band. Several scanning beams are recommended in addition to the fixed beams. Low power solid state 20 GHz GaAs FET power amplifiers in the 5W range and a general purpose digital baseband processor with gigahertz logic speeds and megabits of memory are also recommended.
Brandon, W. T.↗
NASA Lewis F100 engine testing
Two builds of an F100 engine model derivative (EMD) engine were evaluated for improvements in engine components and digital electronic engine control (DEEC) logic. Two DEEC flight logics were verified throughout the flight envelope in support of flight clearance for the F100 engine model derivative program (EMPD). A nozzle instability and a faster augmentor transient capability was investigated in support of the F-15 DEEC flight program. Off schedule coupled system mode fan flutter, DEEC nose-boom pressure correlation, DEEC station six pressure comparison, and a new fan inlet variable vane (CIVV) schedule are identified.
Werner, R. A.↗
Miniature L-Band Radar Transceiver
A miniature L-band transceiver that operates at a carrier frequency of 1.25 GHz has been developed as part of a generic radar electronics module (REM) that would constitute one unit in an array of many identical units in a very-large-aperture phased-array antenna. NASA and the Department of Defense are considering the deployment of such antennas in outer space; the underlying principles of operation, and some of those of design, also are applicable on Earth. The large dimensions of the antennas make it advantageous to distribute radio-frequency electronic circuitry into elements of the arrays. The design of the REM is intended to implement the distribution. The design also reflects a requirement to minimize the size and weight of the circuitry in order to minimize the weight of any such antenna. Other requirements include making the transceiver robust and radiation-hard and minimizing power demand. Figure 1 depicts the functional blocks of the REM, including the L-band transceiver. The key functions of the REM include signal generation, frequency translation, amplification, detection, handling of data, and radar control and timing. An arbitrary-waveform generator that includes logic circuitry and a digital-to-analog converter (DAC) generates a linear-frequency-modulation chirp waveform. A frequency synthesizer produces local-oscillator signals used for frequency conversion and clock signals for the arbitrary-waveform generator, for a digitizer [that is, an analog-to-digital converter (ADC)], and for a control and timing unit. Digital functions include command, timing, telemetry, filtering, and high-rate framing and serialization of data for a high-speed scientific-data interface. The aforementioned digital implementation of filtering is a key feature of the REM architecture. Digital filters, in contradistinction to analog ones, provide consistent and temperature-independent performance, which is particularly important when REMs are distributed throughout a large array. Digital filtering also enables selection among multiple filter parameters as required for different radar operating modes. After digital filtering, data are decimated appropriately in order to minimize the data rate out of an antenna panel. The L-band transceiver (see Figure 2) includes a radio-frequency (RF)-to-baseband down-converter chain and an intermediate- frequency (IF)-to-RF up-converter chain. Transmit/receive (T/R) switches enable the use of a single feed to the antenna for both transmission and reception. The T/R switches also afford a built-in test capability by enabling injection of a calibration signal into the receiver chain. In order of decreasing priority, components of the transceiver were selected according to requirements of radiation hardness, then compactness, then low power. All of the RF components are radiation-hard. The noise figure (NF) was optimized to the extent that (1) a low-noise amplifier (LNA) (characterized by NF < 2 dB) was selected but (2) the receiver front-end T/R switches were selected for a high degree of isolation and acceptably low loss, regardless of the requirement to minimize noise.
McWatters, Dalia↗
A proposed magnetic digital temperature transducer, volume 1
A study has been made of the feasibility of using the discontinuous permeability versus temperature characteristics of some magnetic materials for a digital temperature transducer and a thermally controlled ON-OFF switch. Simple logic converts the number of output pulse to a digital word recognizable by the system. Efforts have been concentrated on materials with Curie temperatures between 0 and 100 C. One compound has the composition Mn(5-x)Fe(x)Ge3 where the amount of iron determines the transition temperature. The other compound is Ni-Zn ferrite and has the compositon Ni(1-x)Zn(x)Fe(1.95)O4 where the nickel: zinc ratio determines the transition temperature. A detailed report of materials prepared is presented. Toroidal inductors of the material have been constructed and the change in inductance with temperature measured. In view of these initial measurements, it is felt that a transducer utilizing the permeability versus temperature characteristics of these materials has promise as a reliable and sensitive solid state digital temperature transducer.
Collier, T. E.↗
HYTESS 2: A Hypothetical Turbofan Engine Simplified Simulation with multivariable control and sensor analytical redundancy
A hypothetical turbofan engine simplified simulation with a multivariable control and sensor failure detection, isolation, and accommodation logic (HYTESS II) is presented. The digital program, written in FORTRAN, is self-contained, efficient, realistic and easily used. Simulated engine dynamics were developed from linearized operating point models. However, essential nonlinear effects are retained. The simulation is representative of the hypothetical, low bypass ratio turbofan engine with an advanced control and failure detection logic. Included is a description of the engine dynamics, the control algorithm, and the sensor failure detection logic. Details of the simulation including block diagrams, variable descriptions, common block definitions, subroutine descriptions, and input requirements are given. Example simulation results are also presented.
Merrill, W. C.↗
Data compression/error correction digital test system. Appendix 3: Maintenance. Book 1: Transmitter assembly drawings
Assembly drawings, logic schematics, and circuit schematics useful in maintaining the equipment of the DC/EC digital test system are reviewed. The drawings are organized in accordance with the reference designations of the hardware. The transmitter subsystem assembly drawings are emphasized.
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Apollo experience report: Guidance and control systems - Digital autopilot design development
The development of the Apollo digital autopilots (the primary attitude control systems that were used for all phases of the lunar landing mission) is summarized. This report includes design requirements, design constraints, and design philosophy. The development-process functions and the essential information flow paths are identified. Specific problem areas that existed during the development are included. A discussion is also presented on the benefits inherent in mechanizing attitude-controller logic and dynamic compensation in a digital computer.
Peters, W. H.↗
"Glitch Logic" and Applications to Computing and Information Security
This paper introduces a new method of information processing in digital systems, and discusses its potential benefits to computing and information security. The new method exploits glitches caused by delays in logic circuits for carrying and processing information. Glitch processing is hidden to conventional logic analyses and undetectable by traditional reverse engineering techniques. It enables the creation of new logic design methods that allow for an additional controllable "glitch logic" processing layer embedded into a conventional synchronous digital circuits as a hidden/covert information flow channel. The combination of synchronous logic with specific glitch logic design acting as an additional computing channel reduces the number of equivalent logic designs resulting from synthesis, thus implicitly reducing the possibility of modification and/or tampering with the design. The hidden information channel produced by the glitch logic can be used: 1) for covert computing/communication, 2) to prevent reverse engineering, tampering, and alteration of design, and 3) to act as a channel for information infiltration/exfiltration and propagation of viruses/spyware/Trojan horses.
hardware vulnerabilities↗
My Rewarding Summer Research Experience at NASA
My summer research experience at the Kennedy Space Center has been a truly rewarding one. As an electrical engineering student at the University of South Florida, I was blessed with a beneficial opportunity to gain valuable knowledge in my career, and also apply it through working at NASA. One of my inspirations in becoming an engineer is to work at NASA someday, and I was very excited and honored to have this opportunity. My goal in this internship was to strengthen my preparation in becoming an engineer by learning new material, acquiring skills by practicing what I learned, and discovering the expectations of engineering work at NASA. Through this summer research, I was able to learn new computer programs and perform various tasks that gave me experience and skills as an engineer. My primary job was to conduct work on the Constellation Test article, which is a simulation model of the Crew Launch Vehicle (CLV) tanking system. This is a prototype of a launch facility and an Ares I Vehicle, which God willing will transport astronauts to the moon. Construction of the CLV is in progress and a test launch is anticipated for 2010. Moreover, the Test Article serves as a demonstration too, training test bed, and may be expanded for new simulation of launch system elements, which could be applied to real life operations. The test article is operated and run by a Programmable Logic Controller (PLC), which is a digital computer that is used to control all forms of machinery such as those in manufacturing buildings and other industries. PLCs are different than other computers because of the physical protection they have against damaging environmental conditions that would destroy other computers. Also, PLCs are equipped with lots of input and output connections that allow extensive amounts of commands to be executed, which would normally require many computers to do. Therefore, PLCs are small, rugged, and extremely powerful tools that may continue to be employed at NASA. Furthermore, in order to conduct productive work on the Test Article, I needed to learn the computer program called RS Logics 5000.
Aviles, Andres↗
Economical Implementation of a Filter Engine in an FPGA
A logic design has been conceived for a field-programmable gate array (FPGA) that would implement a complex system of multiple digital state-space filters. The main innovative aspect of this design lies in providing for reuse of parts of the FPGA hardware to perform different parts of the filter computations at different times, in such a manner as to enable the timely performance of all required computations in the face of limitations on available FPGA hardware resources. The implementation of the digital state-space filter involves matrix vector multiplications, which, in the absence of the present innovation, would ordinarily necessitate some multiplexing of vector elements and/or routing of data flows along multiple paths. The design concept calls for implementing vector registers as shift registers to simplify operand access to multipliers and accumulators, obviating both multiplexing and routing of data along multiple paths. Each vector register would be reused for different parts of a calculation. Outputs would always be drawn from the same register, and inputs would always be loaded into the same register. A simple state machine would control each filter. The output of a given filter would be passed to the next filter, accompanied by a "valid" signal, which would start the state machine of the next filter. Multiple filter modules would share a multiplication/accumulation arithmetic unit. The filter computations would be timed by use of a clock having a frequency high enough, relative to the input and output data rate, to provide enough cycles for matrix and vector arithmetic operations. This design concept could prove beneficial in numerous applications in which digital filters are used and/or vectors are multiplied by coefficient matrices. Examples of such applications include general signal processing, filtering of signals in control systems, processing of geophysical measurements, and medical imaging. For these and other applications, it could be advantageous to combine compact FPGA digital filter implementations with other application-specific logic implementations on single integrated-circuit chips. An FPGA could readily be tailored to implement a variety of filters because the filter coefficients would be loaded into memory at startup.
Kowalski, James E.↗
Procedure for extraction of disparate data from maps into computerized data bases
A procedure is presented for extracting disparate sources of data from geographic maps and for the conversion of these data into a suitable format for processing on a computer-oriented information system. Several graphic digitizing considerations are included and related to the NASA Earth Resources Laboratory's Digitizer System. Current operating procedures for the Digitizer System are given in a simplified and logical manner. The report serves as a guide to those organizations interested in converting map-based data by using a comparable map digitizing system.
Junkin, B. G.↗
Digital filter suppresses effects of nonstatistical noise bursts on multichannel scaler digital averaging systems
Digital filter suppresses the effects of nonstatistical noise bursts on data averaged over multichannel scaler. Interposed between the sampled channels and the digital averaging system, it uses binary logic circuitry to compare the number of counts per channel with the average number of counts per channel.
Goodman, L. S.↗