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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 163 records · Page 9
All sourcesNASA NTRSDOE OSTI
NASA NTRS1990

VLSI Architecture For Viterbi Decoder

"Pipeline" architecture developed for very-large-scale integrated (VLSI) Viterbi decoding circuits for binary convolutional codes of large constraint lengths. In scheme, single sequential processor computes path metrics in trellis diagram (diagram in which paths and nodes represent possible sequences of code states and in which metrics indicate relative likelihoods of sequences). Systolic-array method used to store path information as well as to choose path with best metric. VLSI Viterbi-decoder architecture is compromise between speed and complexity. Size of decoding circuit increases approximately linearly with constraint length of code, and additional circuit chips added with moderate numbers of interconnections.

Hsu, In-Shek↗
DOE OSTI2025

Quantum complexity in gravity, quantum field theory, and quantum information science

Quantum complexity quantifies the difficulty of preparing a state or implementing a unitary transformation with limited resources. Applications range from quantum computation to condensed matter physics and quantum gravity. Here, we seek to bridge the approaches of these fields, which define and study complexity using different frameworks and tools. We describe several definitions of complexity, along with their key properties. In quantum information theory, we focus on complexity growth in random quantum circuits. In quantum many-body systems and quantum field theory (QFT), we discuss a geometric definition of complexity in terms of geodesics on the unitary group. In dynamical systems, we explore a definition of complexity in terms of state or operator spreading, as well as concepts from tensor-networks. We also outline applications to simple quantum systems, quantum many-body models, and QFTs including conformal field theories (CFTs). Finally, we explain the proposed relationship between complexity and gravitational observables within the holographic anti-de Sitter (AdS)/CFT correspondence.

Baiguera, Stefano [Istituto Nazionale di Fisica Nu↗
NASA NTRS2009

G(sup 4)FET Implementations of Some Logic Circuits

Some logic circuits have been built and demonstrated to work substantially as intended, all as part of a continuing effort to exploit the high degrees of design flexibility and functionality of the electronic devices known as G(sup 4)FETs and described below. These logic circuits are intended to serve as prototypes of more complex advanced programmable-logicdevice-type integrated circuits, including field-programmable gate arrays (FPGAs). In comparison with prior FPGAs, these advanced FPGAs could be much more efficient because the functionality of G(sup 4)FETs is such that fewer discrete components are needed to perform a given logic function in G(sup 4)FET circuitry than are needed perform the same logic function in conventional transistor-based circuitry. The underlying concept of using G(sup 4)FETs as building blocks of programmable logic circuitry was also described, from a different perspective, in G(sup 4)FETs as Universal and Programmable Logic Gates (NPO-41698), NASA Tech Briefs, Vol. 31, No. 7 (July 2007), page 44. A G(sup 4)FET can be characterized as an accumulation-mode silicon-on-insulator (SOI) metal oxide/semiconductor field-effect transistor (MOSFET) featuring two junction field-effect transistor (JFET) gates. The structure of a G(sup 4)FET (see Figure 1) is the same as that of a p-channel inversion-mode SOI MOSFET with two body contacts on each side of the channel. The top gate (G1), the substrate emulating a back gate (G2), and the junction gates (JG1 and JG2) can be biased independently of each other and, hence, each can be used to independently control some aspects of the conduction characteristics of the transistor. The independence of the actions of the four gates is what affords the enhanced functionality and design flexibility of G(sup 4)FETs. The present G(sup 4)FET logic circuits include an adjustable-threshold inverter, a real-time-reconfigurable logic gate, and a dynamic random-access memory (DRAM) cell (see Figure 2). The configuration of the adjustable-threshold inverter is similar to that of an ordinary complementary metal oxide semiconductor (CMOS) inverter except that an NMOSFET (a MOSFET having an n-doped channel and a p-doped Si substrate) is replaced by an n-channel G(sup 4)FET

Mojarradi, Mohammad↗
DOE OSTI2024

Understanding the Phase of Responsivity and Noise Sources in Frequency-Domain Multiplexed Readout of Transition Edge Sensor Bolometers

Abstract Cosmic microwave background (CMB) experiments have deployed focal planes with $$\mathcal {O}(10^{4})$$ O ( 10 4 ) transition edge sensor (TES) bolometers cooled to sub-Kelvin temperatures by multiplexing the readout of many TES channels onto a single pair of wires. Digital Frequency-domain Multiplexing (DfMux) is a multiplexing technique used in many CMB polarization experiments, such as the Simons Array, SPT-3 G, and EBEX. The DfMux system studied here uses LC filters with resonant frequencies ranging from 1.5 to 4.5 MHz connected to an array of TESs. Each detector has an amplitude-modulated carrier tone at the resonant frequency of its accompanying LC resonator. The signal is recovered via quadrature demodulation where the in-phase (I) component of the demodulated current is in phase with the complex admittance of the circuit and the quadrature (Q) component is orthogonal to I. Observed excess current noise in the Q component is consistent with fluctuations in the resonant frequency. This noise has been shown to be non-orthogonal to the phase of the detector’s responsivity. We present a detailed analysis of the phase of responsivity of the TES and noise sources in our DfMux readout system. Further, we investigate how modifications to the TES operating resistance and bias frequency can affect the phase of noise relative to the phase of the detector responsivity, using data from Simons Array to evaluate our predictions. We find that both the phase of responsivity and phase of noise are functions of the two tuning parameters, which can be purposefully selected to maximize signal-to-noise (SNR) ratio.

47 OTHER INSTRUMENTATION↗
DOE OSTI2024

Tunnel junction-enabled monolithically integrated GaN micro-light emitting transistor

GaN/InGaN microLEDs are a very promising technology for next-generation displays. Switching control transistors and their integration are key components in achieving high-performance, efficient displays. Monolithic integration of microLEDs with GaN switching devices provides an opportunity to control microLED output power with capacitive (voltage)-controlled rather than current-controlled schemes. This approach can greatly reduce system complexity for the driver circuit arrays while maintaining device opto-electronic performance. In this work, we demonstrate a 3-terminal GaN micro-light emitting transistor that combines a GaN/InGaN blue tunneling-based microLED with a GaN n-channel FET. Further, the integrated device exhibits excellent gate control, drain current control, and optical emission control. This work provides a promising pathway for future monolithic integration of GaN FETs with microLED to enable fast switching, high-efficiency microLED display and communication systems.

42 ENGINEERING↗
NASA NTRS1974

The problem of controlling the directivity of low directivity antennas on spacecraft in flight

Interests exist in the creation of antennas allowing adjustment of the radiation pattern and directivity in flight without using complex switching and matching circuits. Results are presented of certain experimental tests performed with log-periodic conical helical antennas to determine the possibilities of regulation of their radiation patterns without changing the structure of the current-carrying elements, supply connections, etc.

Mashkov, V. I.↗
NASA NTRS1977

Direct-reading inductance meter

Meter indicates from 30 nH to 3 micro H. Reference inductor of 15 micro H is made by winding 50 turns of Number 26 Formvar wire on Micrometal type 50-2 (or equivalent) core. Circuit eliminates requirement for complex instrument compensation prior to taking coil inductance measurement and thus is as easy to operate as common ohmmeter.

Kolbly, R. B.↗
NASA NTRS1992

A fixed tuned broadband matching structure for submillimeter SIS receivers

We have designed, fabricated, and tested a quasi-optical spiral antenna mixer with a Nb/AlO(x)/Nb tunnel junction. This design incorporates a hybrid antenna fed by a planar logarithmic spiral antenna to couple to the radiation field, as previously done with Pb based devices, as well as a newly designed matching circuit. This matching circuit is a relatively complex structure requiring several layers of photolithographic processing on top of the actual tunneling device. Computer modeling of the device predicted the measured bandwidth to within 8 percent, making scale model measurements unnecessary. We have obtained a good match from 210 GHz to 460 GHz between the antenna and a relatively large area (1.25 by 1.25 sq microns) tunnel junction with omega R(sub N) C approx. = 2 - 4.4. This compares to simple inductive stubs that attain only a few percent of total bandwidth in the submillimeter band or inductively tuned SIS arrays with an upper limit of operating frequencies well below the submillimeter band. Noise temperatures were measured at 345 GHz, 426 GHz, and 492 GHz yielding double sideband noise temperatures at 200 K, 220 K, and 500 K, respectively.

Buettgenbach, Thomas H.↗
NASA NTRS1995

Full-Wave Analysis Of MMICs Using A Generalized Yee Algorithm

Improved method of temporal analysis of propagation of electro-magnetic waves in monolithic microwave integrated circuits (MMICs) implemented by generalized version of traditional Yee algorithm. Provides more accurate mathematical modeling for analysis and design of MMICs. Based on unstructured and otherwise irregular grids. Grids readily fitted to conductive and dielectric circuit elements having realistically complex three-dimensional shapes. Better for modeling important and geometrically complex phenomena like fringing fields.

Lansing, Faiza S.↗
NASA NTRS2001

Novel Multiplexing Technique for Detector and Mixer Arrays

Future submillimeter and far-infrared space telescopes will require large-format (many 1000's of elements) imaging detector arrays to perform state-of-the-art astronomical observations. A crucial issue related to a focal plane array is a readout scheme which is compatible with large numbers of cryogenically-cooled (typically < 1 K) detectors elements. When the number of elements becomes of the order of thousands, the physical layout for individual readout amplifiers becomes nearly impossible to realize for practical systems. Another important concern is the large number of wires leading to a 0.1-0.3 K platform. In the case of superconducting transition edge sensors (TES), a scheme for time-division multiplexing of SQUID read-out amplifiers has been recently demonstrated. In this scheme the number of SQUIDs is equal to the number (N) of the detectors, but only one SQUID is turned on at a time. The SQUIDs are connected in series in each column of the array, so the number of wires leading to the amplifiers can be reduced, but it is still of the order of N. Another approach uses a frequency domain multiplexing scheme of the bolometer array. The bolometers are biased with ac currents whose frequencies are individual for each element and are much higher than the bolometer bandwidth. The output signals are connected in series in a summing loop which is coupled to a single SQUID amplifier. The total number of channels depends on the ratio between the SQUID bandwidth and the bolometer bandwidth and can be at least 100 according to the authors. An important concern about this technique is a contribution of the out-of-band Johnson noise which multiplies by factor N(exp 1/2) for each frequency channel. We propose a novel solution for large format arrays based on the Hadamard transform coding technique which requires only one amplifier to read out the entire array of potentially many 1000's of elements and uses approximately 10 wires between the cold stage and room temperature electronics. This can significantly reduce the complexity of the readout circuits.

Karasik, Boris S.↗
NASA NTRS2001

Experiments on the evolution of digital to analog converters

Currently, there is a research effort in Evolvable Hardware being driven towards two purposes: the synthesis of circuits of medium to high complexity; and the design of reconfigurable architectures that facilitate the system evolvability and on-chip implementation of the evolved circuits. This work addresses these issues by describing the evolution of Digital to Analog Converters (DACs).

DACs evolvable hardware hierarchical evolution gen↗
NASA NTRS2007

Electromagnetic Radial Forces in a Hybrid Eight-Stator-Pole, Six-Rotor-Pole Bearingless Switched-Reluctance Motor

Analysis and experimental measurement of the electromagnet force loads on the hybrid rotor in a novel bearingless switched-reluctance motor (BSRM) have been performed. A BSRM has the combined characteristics of a switched-reluctance motor and a magnetic bearing. The BSRM has an eight-pole stator and a six-pole hybrid rotor, which is composed of circular and scalloped lamination segments. The hybrid rotor is levitated using only one set of stator poles. A second set of stator poles imparts torque to the scalloped portion of the rotor, which is driven in a traditional switched reluctance manner by a processor. Analysis was done for nonrotating rotor poles that were oriented to achieve maximum and minimum radial force loads on the rotor. The objective is to assess whether simple one-dimensional magnetic circuit analysis is sufficient for preliminary evaluation of this machine, which may exhibit strong three-dimensional electromagnetic field behavior. Two magnetic circuit geometries, approximating the complex topology of the magnetic fields in and around the hybrid rotor, were employed in formulating the electromagnetic radial force equations. Reasonable agreement between the experimental results and the theoretical predictions was obtained with typical magnetic bearing derating factors applied to the predictions.

Morrison, Carlos R.↗
NASA NTRS2008

Electromagnetic Forces in a Hybrid Magnetic-Bearing Switched-Reluctance Motor

Analysis and experimental measurement of the electromagnetic force loads on the hybrid rotor in a novel hybrid magnetic-bearing switched-reluctance motor (MBSRM) have been performed. A MBSRM has the combined characteristics of a switched-reluctance motor and a magnetic bearing. The MBSRM discussed in this report has an eight-pole stator and a six-pole hybrid rotor, which is composed of circular and scalloped lamination segments. The hybrid rotor is levitated using only one set of four stator poles, while a second set of four stator poles imparts torque to the scalloped portion of the rotor, which is driven in a traditional switched reluctance manner by a processor. Static torque and radial force analysis were done for rotor poles that were oriented to achieve maximum and minimum radial force loads on the rotor. The objective is to assess whether simple one-dimensional magnetic circuit analysis is sufficient for preliminary evaluation of this machine, which may exhibit strong three-dimensional electromagnetic field behavior. Two magnetic circuit geometries, approximating the complex topology of the magnetic fields in and around the hybrid rotor, were employed in formulating the electromagnetic radial force equations. Reasonable agreement between the experimental and the theoretical radial force loads predictions was obtained with typical magnetic bearing derating factors applied to the predictions.

Morrison, Carlos R.↗
NASA NTRS2010

Static Characteristics of the Ferroelectric Transistor Inverter

The inverter is one of the most fundamental building blocks of digital logic, and it can be used as the foundation for understanding more complex logic gates and circuits. This paper presents the characteristics of an inverter circuit using a ferroelectric field-effect transistor. The voltage transfer characteristics are analyzed with respect to varying parameters such as supply voltage, input voltage, and load resistance. The effects of the ferroelectric layer between the gate and semiconductor are examined, and comparisons are made between the inverters using ferroelectric transistors and those using traditional MOSFETs.

Mitchell, Cody↗
NASA NTRS2012

A Spacecraft Housekeeping System-on-Chip in a Radiation Hardened Structured ASIC

Housekeeping systems are essential to health monitoring of spacecraft and instruments. Typically, sensors are distributed across various sub-systems and data is collected using components such as analog-to-digital converters, analog multiplexers and amplifiers. In most cases programmable devices are used to implement the data acquisition control and storage, and the interface to higher level systems. Such discrete implementations require additional size, weight, power and interconnect complexity versus an integrated circuit solution, as well as the qualification of multiple parts. Although commercial devices are readily available, they are not suitable for space applications due the radiation tolerance and qualification requirements. The Housekeeping System-o n-A-Chip (HKSOC) is a low power, radiation hardened integrated solution suitable for spacecraft and instrument control and data collection. A prototype has been designed and includes a wide variety of functions including a 16-channel analog front-end for driving and reading sensors, analog-to-digital and digital-to-analog converters, on-chip temperature sensor, power supply current sense circuits, general purpose comparators and amplifiers, a 32-bit processor, digital I/O, pulse-width modulation (PWM) generators, timers and I2C master and slave serial interfaces. In addition, the device can operate in a bypass mode where the processor is disabled and external logic is used to control the analog and mixed signal functions. The device is suitable for stand-alone or distributed systems where multiple chips can be deployed across different sub-systems as intelligent nodes with computing and processing capabilities.

Suarez, George↗
NASA NTRS2016

Field Programmable Gate Aray (FPGA) Radiation Data: All Data is Not Equal

Electronic parts (integrated circuits) have grown in complexity such that determining all failure modes and risks based on single particle event radiation testing is impossible. In this presentation, the authors will present why this is so and provide some realism on what this means to FPGAs. Its all about understanding actual risks and not making assumptions.

radiation testing↗
DOE OSTI2024

Energy Systems Integration Facility (ESIF): World-Class Systems Integration Capabilities and Research

The Energy Systems Integration Facility (ESIF), located at the National Renewable Energy Laboratory (NREL) South Table Mountain campus, is a world-renowned user facility for research and development of modern, advanced, and clean energy technologies. ESIF is distinguished by its continuously evolving, highly integrated systems that span throughout the building, connecting research capabilities across multiple laboratories and test areas. The primary ESIF research systems include: [1] data, cyber, and control networks, [2] research electrical distribution buses (REDB), [3] thermal integration infrastructure, and [4] hydrogen systems. The data, cyber, and control networks provide monitoring, control, communication, automation, visualization, and time series data storage and tagging capabilities for research projects and ESIF systems, including facility safety functions. The REDB system consists of four dedicated AC and DC electrical power networks that can connect devices located across the facility through versatile, automatic circuit configuration to support complex power electronics experiments up to the megawatt-scale. The thermal integration infrastructure consists of three temperature-conditioned water loops that provide heating and cooling interfaces and capabilities for thermal energy research. The hydrogen systems provide megawatt-scale hydrogen production, drying, compression, high-pressure storage, and delivery to laboratory end uses, including hydrogen fuel cell vehicle fueling. The ESIF research systems interconnect and extend throughout the various lab areas of the facility to create elaborate networks composed of diverse technologies for cutting-edge research. The ESIF capabilities are operated and stewarded by the ESIF Research Operations group, who also actively upgrade and advance the systems to ensure they remain ahead of anticipated research - enabling the success of many pioneering energy integration projects. The poster, created by members of the ESIF Research Operations team, highlights and summarizes the four core integrated systems at ESIF. The poster was first presented at the internal NREL Energize Forum on May 13th, 2024, and received the "Best Poster" award.

capabilities↗
NASA NTRS1995

ASIC For Complex Fixed-Point Arithmetic

Application-specific integrated circuit (ASIC) performs 24-bit, fixed-point arithmetic operations on arrays of complex-valued input data. High-performance, wide-band arithmetic logic unit (ALU) designed for use in computing fast Fourier transforms (FFTs) and for performing ditigal filtering functions. Other applications include general computations involved in analysis of spectra and digital signal processing.

Petilli, Stephen G.↗