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At least 163 records · Page 9
All sourcesNASA NTRSDOE OSTI
NASA NTRS1977

Shuttle/GPSPAC experimentation study

The utilization is discussed of the GPSPAC, which is presently being developed to be used on the low altitude host vehicle (LAHV), for possible use in the shuttle avionics system to evaluate shuttle/GPS navigation performance. Analysis and tradeoffs of the shuttle/GPS link, shuttle signal interface requirements, oscillator tradeoffs and GPSPAC mechanical modifications for shuttle are included. Only the on-orbit utilization of GPSPAC for the shuttle is discussed. Other phases are briefly touched upon. Recommendations are provided for using the present GPSPAC and the changes required to perform shuttle on-orbit navigation.

Moses, J.↗
NASA NTRS1988

A fault-tolerant avionics suite for an entry research vehicle

A highly-reliable avionics suite has been designed for an Entry Research Vehicle. The autonomous spacecraft would be deployed from the Space Shuttle Orbiter and perform a variety of aerodynamic and propulsive maneuvers which may be required for future space transportation system vehicles. The flight electronics consist of a central fault-tolerant processor, which is resilient to all first failures, reliably cross-strapped to redundant and distributed sets of sensors and effectors. This paper describes the preliminary design and analysis of the architecture which resulted from a fifteen month study by the Charles Stark Draper Laboratory for the NASA Langley Research Center. After a brief introduction to the design task, the architecture of the central flight computer and its interface to the vehicle are discussed. Following this, the method and results of the baseline reliability study for the avionic suite are presented.

Dzwonczyk, Mark↗
NASA NTRS2002

ISS Material Science Research Rack HWIL Interface Simulation

In this paper, the first Material Science Research Rack (MSRR-1) hardware-in-the-loop (HWIL) interface simulation is described. Dynamic Concepts developed this HWIL simulation system with funding and management provided by the Flight Software group (ED14) of NASA-MSFC's Avionics Department. The HWIL system has been used both as a flight software development environment and as a software qualification tool. To fulfill these roles, the HWIL simulator accurately models the system dynamics of many MSRR-1 subsystems and emulates most of the internal interface signals. The modeled subsystems include the Experiment Modules, the Thermal Environment Control System, the Vacuum Access System, the Solid State Power Controller Module, and the Active Rack Isolation Systems. The emulated signals reside on three separate MIL-STD-1553B digital communication buses, the ISS Medium Rate Data Link, and several analog controller and sensor signals. To enhance the range of testing, it was necessary to simulate several off-nominal conditions that may occur in the interfacing subsystems.

Williams, Philip J.↗
NASA NTRS2019

Gateway System Requirements

The Gateway Program (GW) System Requirements Document (SRD) is approved for the public domain to support NASA's Lunar Gateway Program. The main intent of these documents is to define top level functional and performance requirements for the systems that facilitate cooperative deep space exploration endeavors and execute lunar missions. The SRD defines NASA requirements for the procurement and development of the GW mission. The Gateway Program is a collaboration of US government, international partners and commercial providers. The Gateway SRD are expected to be used by all parties in development of the Gateway Program elements. For effective development and integration of the Gateway vehicle, all involved entities must use, and have awareness of, these high level program requirements to flow down to their respective developmental responsibilities so all Gateway elements will be operable as an entity. The Gateway SRD represents the requirements that are necessary for the Gateway mission. NASA has determined there is benefit to U.S. and foreign spacecraft developers to approve this information for the public domain because all the parties/participants need a common understanding of the requirements and the parameters under which they operate (size, shape, form fit and function). This will allow systems built by various nations and commercial entities to attach and function together properly and safely in the hostile environment of space.The Gateway SRD provides information regarding the current requirements for Gateway elements. Specifically, the Gateway SRD provide an overview of expected features and capabilities and requirements for safe integration of elements within the Gateway program. The SRD contains top-level functional and performance descriptions of the Gateway and definition of the interfaces limited to the scope necessary for integration purposes between Gateway elements. The documents do NOT contain detailed design information or any specifics of hardware or software implementation. The data approved for release does not include: manufacturing drawings, detailed interface control and design data, software code, detailed CAD models, structural or thermal models of the system, avionics or avionics box, board, or cable manufacturing information.

Adamek, Christopher↗
NASA NTRSDate not supplied

Design, Instrumentation, and Data Analysis for the SLS Core Stage Green Run Test Series

The Space Launch System (SLS) Core Stage (CS) Thrust Vector Control (TVC) system is comprised of eight mechanical feedback Shuttle heritage Type III TVC actuators and four RS-25 engines, each attached to a Shuttle heritage gimbal block/bearing. The actuators are powered by a Shuttle-derived hydraulic Core Auxiliary Power Unit (CAPU), and integrated with an all-new Core Stage thrust structure. The actuators are interfaced to the SLS Vehicle Management (VM) software via an all-new TVC Actuator Control (TAC) avionics subsystem. Despite the significant test and flight experience of the Shuttle hardware, the SLS Green Run ambient and hot fire test activities revealed a number of new findings associated with the dynamic response of the TVC integrated system. Test responses suggested that the TVC system did not meet its performance specifications and its step and frequency responses exhibited unexpected departures from prior lab tests and modeled behavior. This paper is the fifth installment in a seven-paper series surveying the design, engineering, test validation, and flight performance of the Core Stage Thrust Vector Control system. In this paper, the design of the TVC analyses conducted during the Core Stage Green Run test series are discussed in detail. Throughout the course of the test activities, the SLS flight control team worked diligently with the Core Stage contractor to revise test command profiles and ensure sufficient instrumentation was available to collect data. Post-test analysis combined the Green Run modal, ambient, and hot fire test data, MSFC 2- axis Core Stage TVC Inertial Load Simulator (ILS) data, Hardware-In-the-Loop (HWIL) Systems Integration Lab (SIL) results, and actuator Acceptance Testing Procedure (ATP) responses. These data were used to characterize the response, validate critical math models of the TVC subsystem, and isolate the probable cause of the unexpected responses. Through comprehensive analysis of the available test data sources, the integrated team identified the dominant contributors to the observed response and developed test-correlated rationale for vehicle flight control system performance, ultimately leading to a confident posture for the Artemis I mission.

John H. Wall↗
NASA NTRS2003

Performance Testing of Thermal Interface Filler Materials in a Bolted Aluminum Interface Under Thermal/Vacuum Conditions

A thermal interface material is one of the many tools that are often used as part of the thermal control scheme for space-based applications. These materials are placed between, for example, an avionics box and a cold plate, in order to improve the conduction heat transfer so that proper temperatures can be maintained. Historically at Marshall Space Flight Center, CHO-THERM@ 1671 has primarily been used for applications where an interface material was deemed necessary. However, there have been numerous alternatives come on the market in recent years. It was decided that a number of these materials should be tested against each other to see if there were better performing alternatives. The tests were done strictly to compare the thermal performance of the materials relative to each other under repeatable conditions and they do not take into consideration other design issues such as off-gassing, electrical conduction or isolation, etc. This paper details the materials tested, test apparatus, procedures, and results of these tests.

Glasgow, Shaun↗
NASA NTRS2011

Enabling Future Robotic Missions with Multicore Processors

Recent commercial developments in multicore processors (e.g. Tilera, Clearspeed, HyperX) have provided an option for high performance embedded computing that rivals the performance attainable with FPGA-based reconfigurable computing architectures. Furthermore, these processors offer more straightforward and streamlined application development by allowing the use of conventional programming languages and software tools in lieu of hardware design languages such as VHDL and Verilog. With these advantages, multicore processors can significantly enhance the capabilities of future robotic space missions. This paper will discuss these benefits, along with onboard processing applications where multicore processing can offer advantages over existing or competing approaches. This paper will also discuss the key artchitecural features of current commercial multicore processors. In comparison to the current art, the features and advancements necessary for spaceflight multicore processors will be identified. These include power reduction, radiation hardening, inherent fault tolerance, and support for common spacecraft bus interfaces. Lastly, this paper will explore how multicore processors might evolve with advances in electronics technology and how avionics architectures might evolve once multicore processors are inserted into NASA robotic spacecraft.

multi-core processor↗
NASA NTRS1979

ORRC/SAIL interface control document for SAIL OFT data tapes, revision A

The formats for all orbital flight tests magnetic tape recordings produced in the Johnson Space Center Shuttle Avionics Laboratories which are required to be processed in the orbiter data reduction complex or by the mission control center network interference processor are described.

Source record↗
NASA NTRS2002

Range Safety Systems

The high kinetic and potential energy of a launch vehicle mandates there be a mechanism to minimize possible damage to provide adequate safety for the launch facilities, range, and, most importantly, the general public. The Range Safety System, sometimes called the Flight Termination System or Flight Safety System, provides the required level of safety. The Range Safety System section of the Avionics chapter will attempt to describe how adequate safety is provided, the system's design, operation, and it's interface with the rest of the launch vehicle.

Schrock, Kenneth W.↗
NASA NTRS1981

Description of a dual fail-operational redundant strapdown inertial measurement unit for integrated avionics systems research

Attention is given to a redundant strapdown inertial measurement unit for integrated avionics. The system consists of four two-degree-of-freedom turned rotor gyros and four two-degree-of-freedom accelerometers in a skewed and separable semi-octahedral array. The unit is coupled through instrument electronics to two flight computers which compensate sensor errors. The flight computers are interfaced to the microprocessors and process failure detection, isolation, redundancy management and flight control/navigation algorithms. The unit provides dual fail-operational performance and has data processing frequencies consistent with integrated avionics concepts presently planned.

Bryant, W. H.↗
NASA NTRS2014

Adapting the Reconfigurable SpaceCube Processing System for Multiple Mission Applications

This paper will detail the use of SpaceCube in multiple space flight applications including the Hubble Space Telescope Servicing Mission 4 (HST-SM4), an International Space Station (ISS) radiation test bed experiment, and the main avionics subsystem for two separate ISS attached payloads. Each mission has had varying degrees of data processing complexities, performance requirements, and external interfaces. We will show the methodology used to minimize the changes required to the physical hardware, FPGA designs, embedded software interfaces, and testing.This paper will summarize significant results as they apply to each mission application. In the HST-SM4 application we utilized the FPGA resources to accelerate portions of the image processing algorithms more than 25 times faster than a standard space processor in order to meet computational speed requirements. For the ISS radiation on-orbit demonstration, the main goal is to show that we can rely on the commercial FPGAs and processors in a space environment. We describe our FPGA and processor radiation mitigation strategies that have resulted in our eight PowerPCs being available and error free for more than 99.99 of the time over the period of four years. This positive data and proven reliability of the SpaceCube on ISS resulted in the Department of Defense (DoD) selecting SpaceCube, which is replacing an older and slower computer currently used on ISS, as the main avionics for two upcoming ISS experiment campaigns. This paper will show how we quickly reconfigured the SpaceCube system to meet the more stringent reliability requirements

SpaceCube↗
NASA NTRS2016

Transitioning Autonomous Systems Technology Research to a Flight Software Environment

NASA has developed methods and algorithms for autonomous spacecraft operations,including automated planning and scheduling, fault diagnostics and impact determination,procedure management and display. Making the transition from technology research tooperational flight software requires overcoming significant technical, programmatic andcultural challenges. Technology research is aimed at developing methods that performspecific functions correctly, but the resulting software may not be designed for flightprocessors with limited CPU, memory and network resources, and may not be easilyintegrated into spacecraft flight software. Our objective in the Autonomous Systems andOperations Project is to make significant strides toward the transformation from technologyto operational use. Our focus was twofold: maturing research grade autonomy software intoa flight software environment using broadly accepted languages and tools; and integratingautonomy applications with each other and with representative systems and their data andcommand interfaces. For a target flight software environment, we chose Core FlightSoftware, developed by Goddard Space Flight Center as a common operating systemindependent framework. Our hardware integration environment was provided by theIntegrated Power and Avionics Systems (iPAS) Lab at Johnson Space Center, in whichvarious subsystem development has been conducted to address engineering challenges forthe vehicles and systems required for long-duration missions into the solar system. The iPASand its network of connected facilities provides realistic subsystem hardware or simulationsof spacecraft power, life support, guidance, navigation and control, and command and datahandling subsystems. Interfaces between autonomy applications and the subsystems beingassessed and controlled were developed, assessed and refined. The hardware and softwareenvironment using CFS and the iPAS facility has proven to be a highly flexible and realisticenvironment in which to rapidly integrate applications in an iterative, low cost setting. Usingthe integration environment we have developed, we will turn our focus to performance andsizing analysis to determine the computational requirements for full-scale deployment ofautonomy technology. Scalability of reasoners and the spacecraft models upon which theyoperate, and robustness across the full range of spacecraft conditions and environments willbe explored and improved. We are making significant contributions to the future programsthat will build the spacecraft that will take humans beyond the Earth-Moon system, in whichprogram Systems Engineers will be able to accurately and confidently design in accurate,robust and mature autonomous operations systems.

Flight Software↗
NASA NTRS1990

IEEE/AIAA/NASA Digital Avionics Systems Conference, 9th, Virginia Beach, VA, Oct. 15-18, 1990, Proceedings

The present conference on digital avionics discusses vehicle-management systems, spacecraft avionics, special vehicle avionics, communication/navigation/identification systems, software qualification and quality assurance, launch-vehicle avionics, Ada applications, sensor and signal processing, general aviation avionics, automated software development, design-for-testability techniques, and avionics-software engineering. Also discussed are optical technology and systems, modular avionics, fault-tolerant avionics, commercial avionics, space systems, data buses, crew-station technology, embedded processors and operating systems, AI and expert systems, data links, and pilot/vehicle interfaces.

Source record↗
NASA NTRS2012

SCaN Testbed Software Development and Lessons Learned

National Aeronautics and Space Administration (NASA) has developed an on-orbit, adaptable, Software Defined Radio (SDR)Space Telecommunications Radio System (STRS)-based testbed facility to conduct a suite of experiments to advance technologies, reduce risk, and enable future mission capabilities on the International Space Station (ISS). The SCAN Testbed Project will provide NASA, industry, other Government agencies, and academic partners the opportunity to develop and field communications, navigation, and networking technologies in the laboratory and space environment based on reconfigurable, SDR platforms and the STRS Architecture.The SDRs are a new technology for NASA, and the support infrastructure they require is different from legacy, fixed function radios. SDRs offer the ability to reconfigure on-orbit communications by changing software for new waveforms and operating systems to enable new capabilities or fix any anomalies, which was not a previous option. They are not stand alone devices, but required a new approach to effectively control them and flow data. This requires extensive software to be developed to utilize the full potential of these reconfigurable platforms. The paper focuses on development, integration and testing as related to the avionics processor system, and the software required to command, control, monitor, and interact with the SDRs, as well as the other communication payload elements. An extensive effort was required to develop the flight software and meet the NASA requirements for software quality and safety. The flight avionics must be radiation tolerant, and these processors have limited capability in comparison to terrestrial counterparts. A big challenge was that there are three SDRs onboard, and interfacing with multiple SDRs simultaneously complicatesd the effort. The effort also includes ground software, which is a key element for both the command of the payload, and displaying data created by the payload. The verification of the software was an extensive effort. The challenges of specifying a suitable test matrix with reconfigurable systems that offer numerous configurations is highlighted. Since the flight system testing requires methodical, controlled testing that limits risk, a nearly identical ground system to the on-orbit flight system was required to develop the software and write verification procedures before it was installed and tested on the flight system. The development of the SCAN testbed was an accelerated effort to meet launch constraints, and this paper discusses tradeoffs made to balance needed software functionality and still maintain the schedule. Future upgrades are discussed that optimize the avionics and allow experimenters to utilize the SCAN testbed potential.

radio communication↗
NASA NTRS2000

NASA's 3D Flight Computer for Space Applications

The New Millennium Program (NMP) Integrated Product Development Team (IPDT) for Microelectronics Systems was planning to validate a newly developed 3D Flight Computer system on its first deep-space flight, DS1, launched in October 1998. This computer, developed in the 1995-97 time frame, contains many new computer technologies previously never used in deep-space systems. They include: advanced 3D packaging architecture for future low-mass and low-volume avionics systems; high-density 3D packaged chip-stacks for both volatile and non-volatile mass memory: 400 Mbytes of local DRAM memory, and 128 Mbytes of Flash memory; high-bandwidth Peripheral Component Interface (Per) local-bus with a bridge to VME; high-bandwidth (20 Mbps) fiber-optic serial bus; and other attributes, such as standard support for Design for Testability (DFT). Even though this computer system did not complete on time for delivery to the DS1 project, it was an important development along a technology roadmap towards highly integrated and highly miniaturized avionics systems for deep-space applications. This continued technology development is now being performed by NASA's Deep Space System Development Program (also known as X2000) and within JPL's Center for Integrated Space Microsystems (CISM).

Alkalai, Leon↗
NASA NTRS1983

A simulator evaluation of an automatic terminal approach system

The automatic terminal approach system (ATAS) is a concept for improving the pilot/machine interface with cockpit automation. The ATAS can automatically fly a published instrument approach by using stored instrument approach data to automatically tune airplane avionics, control the airplane's autopilot, and display status information to the pilot. A piloted simulation study was conducted to determine the feasibility of an ATAS, determine pilot acceptance, and examine pilot/ATAS interaction. Seven instrument-rated pilots each flew four instrument approaches with a base-line heading select autopilot mode. The ATAS runs resulted in lower flight technical error, lower pilot workload, and fewer blunders than with the baseline autopilot. The ATAS status display enabled the pilots to maintain situational awareness during the automatic approaches. The system was well accepted by the pilots.

Hinton, D. A.↗
NASA NTRS1993

Towards the formal specification of the requirements and design of a processor interface unit

Work to formally specify the requirements and design of a Processor Interface Unit (PIU), a single-chip subsystem providing memory interface, bus interface, and additional support services for a commercial microprocessor within a fault-tolerant computer system, is described. This system, the Fault-Tolerant Embedded Processor (FTEP), is targeted towards applications in avionics and space requiring extremely high levels of mission reliability, extended maintenance free operation, or both. The approaches that were developed for modeling the PIU requirements and for composition of the PIU subcomponents at high levels of abstraction are described. These approaches were used to specify and verify a nontrivial subset of the PIU behavior. The PIU specification in Higher Order Logic (HOL) is documented in a companion NASA contractor report entitled 'Towards the Formal Specification of the Requirements and Design of a Processor Interfacs Unit - HOL Listings.' The subsequent verification approach and HOL listings are documented in NASA contractor report entitled 'Towards the Formal Verification of the Requirements and Design of a Processor Interface Unit' and NASA contractor report entitled 'Towards the Formal Verification of the Requirements and Design of a Processor Interface Unit - HOL Listings.'

Fura, David A.↗