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At least 163 records · Page 9

Investigation of Hardware and Instrumentation to Measure Hand Grasp Activity with the Spacesuit Gloves

Introduction: During the 2022 suited injury summit, it was hypothesized that there will be concerns for hand and glove injuries for future exploration space missions, especially given the fact that the “total number of Extravehicular activity (EVA) hours and frequency” for lunar surface missions is expected to vastly increase [1]. It has been reported that the hands experienced the greatest “absolute numbers” of reported injuries and far exceeds other injuries during EVA [1, 2]. It was reported that the most fatiguing part of the surface EVA was the repetitive gripping tasks [3]. It was recommended that a “glove sub-team” be created to look at possible injury mechanism and mitigation strategies. Some of the recommendations that were suggested [1] are as follows: examine hand fatigue, utilize motion capture, examine the duration and frequency of hand movements, and identify frequent hand motions. We started assessing hardware and instrumentation to measure hand grasp activity in the pressurized glove environment. The purpose of this test was to perform a hardware evaluation for motion capture (MoCap) gloves obtained from StretchSense (Auckland, New Zealand). The specific gloves used were the Pro Fidelity and SuperSplay to determine the repeatability, reliability, feasibility, and useability inside of a pressurized gloved environment. Methods: The MoCap gloves were customized (e.g., battery/Bluetooth pack relocated to upper arm) to better suit the pressurized testing environment and protect the subject from unintentional injury (Fig. 1). Fourteen total subjects from different demographics (i.e., gender and pressurized glove experience level) participated in this test series. Testing included one session each of a baseline data collection (NASA Johnson Space Center (JSC) building 21) and a spacesuit glove box (Fig. 2 at JSC building 7 room 2027) data collection (under vacuum down to 4.3 psid), where each session lasted 3-5 hours. Controlled and reproducible tasks to systematically evaluate the repeatability and reliability of the hardware were performed during baseline data collection. Additionally, subjects performed simulated EVA-like tasks in a pressurized gloved environment. For all sessions, MoCap gloves were placed on each of the subjects’ hands and the signal from it, or the raw capacitance (Fig. 3), was analysed. The raw capacitance was used to estimate the open and closed hand states between the testing conditions and allow us to provide an offset caused by the pressurized environment. Results & Discussion: Initial observation with the bare hands (baseline) condition showed that the MoCap gloves appeared to track grasping and releasing of the fingers (opening and closing fist) with both high- and low-speed conditions, while adduction and abduction of the fingers were not relatively tracked. A hardware evaluation was done outside of the glove box to assess the reliability and repeatability of the MoCap glove. In one task, a point force was applied to various locations on the back of the hand. When the point force was applied to the space between the 1st digit and the pointer finger, there was a noticeable distortion to the MoCap data. Another task examining an increasing force from a 10 lb. sandbag applied to the back of the hand while lying flat on a table, showed a constant flat line with only a distortion when the weight was increased or added to the back of the hand. Fig. 3 shows an object relocation task where you can see when each individual finger “opened” and “closed” (changed position) when picking up and setting down the dumbbell. When the fingers were stationary, the signal remained relatively flat compared to the peaks and valleys that can be observed in Fig. 3. This study showed promising results and imperative input into an attempt to discriminate between hand states across various functional tasks and should be evaluated with context to the repeatability and reliability outcomes. Depending on the task done inside of the pressurized glove box environment and outside, the results appear to be affected by many different factors (i.e., drift, pressure, hand size, etc.). Significance: If this hardware proves to be reliable and repeatable in determining the open and closed hand states then this may provide critical insight into assisting in the characterization of the pressurized gloved environment and the effect on crew member exertion level. Ultimately, this tool will provide useful data for quantifying the repetitive nature of EVA training and tasks. Acknowledgments: The authors would like to acknowledge the NASA Mars Campaign Office for providing funding for this research. Lastly, thanks to all the engineers and technicians at NASA JSC who helped with this data collection. References: [1] Reiber, et al. (2022), NASA/TM-20220007605; [2] Scheuring, et al. (2009), Av., Sp., and Envir. Med. 80(2). [3] Scheuring, et al. (2007), NASA/TM–2007–214755.

Rachel L Thompson↗

Exploration Extravehicular Mobility Unit (xEMU) Chamber B Thermal Vacuum “Suit 2” Pressure Garment System Hardware and Test Design

NASA’s Exploration Extravehicular Mobility Unit (xEMU) is the government reference next-generation space suit design and is engineered to protect astronauts from extreme lunar environmental temperatures. To evaluate the xEMU hardware thermal requirements, the xEMU Testing Team invented, designed, and executed a dual-suit, uncrewed thermal vacuum (TVAC) test at Johnson Space Center’s (JSC) Chamber B. This paper details the test hardware design and test methodology for the “Suit 2” Pressure Garment System (PGS) test article. The uncrewed “Suit 2” PGS test article consisted of a full PGS assembly with simulated Portable Life Support System (PLSS) functionality provided by test equipment, including a ventilation loop and two distinct thermal control loops. This paper will discuss in depth the test hardware design, including internal suit thermal boundary simulation, sensor quantity and placement, test support equipment rigs for gas flow, water flow, and power. Custom hardware designed to add additional penetrations to the suit or provide additional interfaces for sensors will also be discussed. This paper will also address the assembly and integration sequence for the test article. In addition to test hardware design, this paper will provide insights into the test methodology for this test article, including a discussion of thermal steady-state testing, simultaneous dual suit thermal vacuum testing, and hazard mitigation and controls.

xEMU↗

Interoperability Review of Wireless Hardware in Emergency Air-To-Ground Mesh Networks

The air-to-ground network has the goal of advancing the capabilities and versatility of communications in wildfire and emergency scenarios. To ensure compatibility and keep costs low for emergency services interoperability between hardware is an important step in development of the mesh network. For the purposes of this evaluation interoperability of hardware is described as the ability for hardware from different vendors to be interchangeable within the network with minimal initial setup and no functional change from an operator’s viewpoint. This report will also focus on the features and limitations in addition to the interoperability of the major wireless hardware systems core to the function of the proposed air-to-ground mesh network. The hardware systems involved are ADS-B receivers, 3GPP Sidelink devices, mesh radios, and commercial ISM band radios. For early testing the mesh radios will be in the 900 MHz frequency range using the DoodleLabs RM-1700-22W Mesh Rider Radio as the lab reference. This report will consider and categorize desirability of features, the amount of setup required before deployment, the effect on performance characteristics from nominal and maximum load, and the ability to interface with other vender devices.

Mesh Radio↗

Virtualized hardware environments for supporting digital I and C verification - 324

The technology of virtualized hardware testing platforms within the nuclear context in order to provide a framework for evaluating virtualized hardware/software approaches is discussed. To understand the applicability of virtualized hardware approaches, we have developed a virtual hardware model of an actual smart sensor using the Imperas product OVPsim development environment, as is seen in . An evaluation of the modeling effort required to create the digital I and C smart sensor is provided, followed by an analysis and findings on the various tools in the OVPsim environment for supporting testing, evidence collecting, and analysis. The analyzed tools include traditional input/output testing, model-based testing, mutation testing, and fault injection techniques. Finally, the goal of this research effort is to analyze virtual hardware platforms and present findings to the nuclear community on the efficacy and viability of this technology as a complementary means to actual hardware-in-the-loop testing Factory Acceptance Testing for Nuclear Power Plant (NPP) digital I and C systems. (authors)

22 GENERAL STUDIES OF NUCLEAR REACTORS↗

Uncontrolled Learning: Codesign of Neuromorphic Hardware Topology for Neuromorphic Algorithms

Neuromorphic computing has the potential to revolutionize future technologies and our understanding of intelligence, yet it remains challenging to realize in practice. The learning-from-mistakes algorithm, inspired by the brain's simple learning rules of inhibition and pruning, is one of the few brain-like training methods. This algorithm is implemented in neuromorphic memristive hardware through a codesign process that evaluates essential hardware trade-offs. While the algorithm effectively trains small networks as binary classifiers and perceptrons, performance declines significantly with increasing network size unless the hardware is tailored to the algorithm. This work investigates the trade-offs between depth, controllability, and capacity—the number of learnable patterns—in neuromorphic hardware. This highlights the importance of topology and governing equations, providing theoretical tools to evaluate a device's computational capacity based on its measurements and circuit structure. The findings show that breaking neural network symmetry enhances both controllability and capacity. Additionally, by pruning the circuit, neuromorphic algorithms in all-memristive circuits can utilize stochastic resources to create local contrasts in network weights. Through combined experimental and simulation efforts, the parameters are identified that enable networks to exhibit emergent intelligence from simple rules, advancing the potential of neuromorphic computing.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

Development of a Hardware-in-The-Loop Testbed for a Decentralized, Data-Driven Electric Vehicle Charging Control Algorithm

This study presents the design of an electric vehicle (EV)-grid integration (EVGI) hardware test-bed to implement smart EV charging algorithms. Here, the proposed test-bed also allows to create different grid events via flexible integration of other power hardware (e.g., controllable loads and battery energy storage systems) and test their impacts on EV charging. The design uses a real-time digital simulator to realize a complex distribution grid model with primary and secondary networks. A grid simulator physically realizes the selected nodes of the simulated grid to power an actual EV, forming a hardware-in-the-loop (HIL) test setup. The EV-grid integration is demonstrated based on the custom hardware and software implementation of the J1772 charging protocol using dSPACE MicroLabBox, operating as a custom EV Supply Equipment (EVSE). The HIL test-bed features a novel testing platform for accurate implementation and analysis of scalable charging algorithms. To this end, a data-driven, decentralized, model-free charging controller based on the Additive Increase and Multiplicative Decrease (AIMD) algorithm is presented and validated on an EV using the HIL test-bed. We tested the proposed algorithm under various case studies, and presented a comparison study with an existing droop-based, decentralized charging solution. The results showed that the EV successfully performed charging commands generated by the EVSE and regulated its charging power to effectively reduce the system loading caused by high EV penetration.

33 ADVANCED PROPULSION SYSTEMS↗

Improving the Performance of Integrated Power-Hardware-in-the-Loop and Quasi-Static Time-Series Simulations

This paper introduces a novel multirate cosimulation architecture that overcomes previous challenges integrating faster real-time, microseconds-scale, power-hardware-in-the-loop (PHIL) with larger scale but slower, real-time, seconds-scale, quasi-static time-series (QSTS) simulation. Specifically, an intermediate reduced-equivalent electromagnetic transient (EMT) model duplicates the key power system topology to capture high-speed dynamics and converge hardware-power system interactions between QSTS updates. Exchanging multidimensional parameter vectors (loads, control status, etc.) between the QSTS and EMT models enables capturing the interactions of the rich, high-node-count (thousands of electrical nodes) QSTS model with the hardware. This architecture offers full spatial resolution from QSTS, including individual load dynamics, actual distribution management system controls, and nodal voltages. Simultaneously, the intermediate EMT model provides more detailed high-speed transients of key distributed energy resource hardware interactions. In addition, we use careful PHIL interface design and the exchange of complex power data, rather than current, to further improve performance. This cosimulation architecture is demonstrated by testing a simulated distribution system with an interconnected 500-kVA advanced photovoltaic (PV) inverter in PHIL. In conclusion, the architecture successfully captured PV local volt-volt ampere reactive (volt-VAR) control interactions with the larger network under time-varying electrical and weather conditions.

42 ENGINEERING↗

Evaluation of Hardware and Software Bill of Materials (HBOMs/SBOMs) Extraction Methods

Hardware and software bills of materials (HBOMs and SBOMs) provide important visibility into the components, dependencies, and supply chain relationships within programmable digital devices. This visibility is critical for advanced nuclear reactor applications, where use of common or shared hardware components, software libraries, suppliers, or manufacturing processes may create common cause failure (CCF) vulnerabilities despite apparent diversity. This paper evaluates current approaches for obtaining and analyzing HBOMs and SBOMs in support of CCF, diversity and defense-in-depth (D3) assessments, and begins to explore potential methods for artificial intelligence/machine learning-based analysis. The availability of BOM information from advanced reactor manufacturers and vendors, representative hardware and software categories found in advanced reactor systems continues to limit research [13]. This paper compares commonly used BOM formats, including CycloneDX, SPDX, and SWID. It also surveys publicly available tools for generating BOMs from source code, compiled binaries, and hardware-related information, noting limitations in language coverage, system age, and format interoperability. Finally, this paper evaluates methods for correlating BOM data with vulnerability and exploitability information, including VEX, CVE, and CWE resources. The findings indicate that publicly available nuclear-vendor BOMs are limited, making third-party extraction and research into novel analysis techniques necessary.

Cybersecurity↗

Nuclear Thermal Rocket Emulator for a Hardware-in-the-Loop Test Bed

To support NASA’s mission to use nuclear thermal rockets for future Mars missions, an instrumentation and control test bed has been built at Oak Ridge National Laboratory. The system is designed as a hardware-in-the-loop test bed for testing control elements and autonomous control algorithms for nuclear thermal propulsion rockets. The mock reactor system consists of a modular and scalable framework, using inexpensive components and open-source software. The hardware system consists of a two-phase flow loop and a mock reactor with six control drums. A single-board computer (NVIDIA Jetson) handles reactor core emulation and hosts a message queuing telemetry transport broker that allows user-deployed control algorithms to interact with the system hardware. The reactor emulator receives sensor data from the hardware and provides the simulated performance of the reactor under steady-state, transient, and fault conditions. The emulator uses a reactivity lookup table and the point kinetics equations to solve for the reactor dynamics in real time. Emulated reactor dynamics and sensor input inform the autonomous control algorithm’s decision-making in a closed-loop manner. The current system is capable of operating at 10 Hz, but faster cycle rates are an area of ongoing research. This test bed will enable NASA and other space vendors to rigorously test their autonomous control systems for NTP rockets under transient (reactor startup and shutdown), steady-state, and fault conditions to reduce development time and risk for autonomous control systems in future missions.

autonomous control↗

Speed challenge: a case for hardware implementation in soft-computing

For over a decade, JPL has been actively involved in soft computing research on theory, architecture, applications, and electronics hardware. The driving force in all our research activities, in addition to the potential enabling technology promise, has been creation of a niche that imparts orders of magnitude speed advantage by implementation in parallel processing hardware with algorithms made especially suitable for hardware implementation. We review our work on neural networks, fuzzy logic, and evolvable hardware with selected application examples requiring real time response capabilities.

neural networks fuzzy logic evolvable hardware sof↗

Evolvable, reconfigurable hardware for future space systems

This paper overviews Evolvable Hardware (EHW) technology, examining its potential for enhancing survivability and flexibility of future space systems. EHW refers to selfconfiguration of electronic hardware by evolutionary/genetic search mechanisms. Evolvable Hardware can maintain existing functionality in the presence of faults and degradations due to aging, temperature and radiation. It can also configure itself for new functionality when required for mission changes or encountered opportunities. The paper illustrates hardware evolution in silicon using a JPL-designed programmable device reconfigurable at transistor level as the platform and a genetic algorithm running on a DSP as the reconfiguration mechanism. Rapid reconfiguration allows convergence to circuit solutions in the order of seconds. The experiments demonstrate functional recovery from faults as well as from degradation at extreme temperatures indicating the possibility of expanding the operational range of extreme electronics through evolved circuit solutions.

Evolvable Hardware EHW↗

Transistor Level Circuit Experiments using Evolvable Hardware

The Jet Propulsion Laboratory (JPL) performs research in fault tolerant, long life, and space survivable electronics for the National Aeronautics and Space Administration (NASA). With that focus, JPL has been involved in Evolvable Hardware (EHW) technology research for the past several years. We have advanced the technology not only by simulation and evolution experiments, but also by designing, fabricating, and evolving a variety of transistor-based analog and digital circuits at the chip level. EHW refers to self-configuration of electronic hardware by evolutionary/genetic search mechanisms, thereby maintaining existing functionality in the presence of degradations due to aging, temperature, and radiation. In addition, EHW has the capability to reconfigure itself for new functionality when required for mission changes or encountered opportunities. Evolution experiments are performed using a genetic algorithm running on a DSP as the reconfiguration mechanism and controlling the evolvable hardware mounted on a self-contained circuit board. Rapid reconfiguration allows convergence to circuit solutions in the order of seconds. The paper illustrates hardware evolution results of electronic circuits and their ability to perform under 230 C temperature as well as radiations of up to 250 kRad.

self configuration↗

Development, Build and Certification of the Alternate Fecal Canister (AFC) Hardware for the NASA Exploration Toilet

On longer range exploration missions, the mass and volume of critical hardware and consumables that will be needed to support crew will pose a big stowage challenge. This includes the hardware needed for the collection and storage of human metabolic waste. The amount of stowage needed for this hardware both before (empty) and after (full) use will be a significant burden on the overall spacecraft habitable volume, layout, and design. To help with this challenge, the National Aeronautics and Space Administration (NASA) has developed a collapsible canister for the collection and containment of fecal deposits. The Alternate Fecal Canister (AFC) is an alternative to the exploration toilet hard-sided fecal canister. The AFC is collapsible in its empty state which is a volume benefit to smaller vehicles on longer missions. In addition, the use of lighter-weight materials provides a reduction in mass of the overall container. This paper will provide a summary of the AFC design including final flight design and build, acceptance and qualification testing completed, final certification and delivery and forward plans for a technology demonstration with the exploration toilet on the International Space Station (ISS). In addition, a summary of issues and final resolution encountered during flight build and testing will also be provided. As part of the acceptance and certification process for AFC, the hardware was also put into several rounds of odor testing with the support of the White Sands Test Facility (WSTF). The details, planning and anomalies identified during odor testing will also be summarized in this paper. Finally, a brief overview of potential future design upgrades including changes to address any crew feedback from the ISS demonstration will be discussed.

Fecal Canister↗

Development, Build and Certification of the Alternate Fecal Canister (AFC) Hardware for the NASA Exploration Toilet

On longer range exploration missions, the mass and volume of critical hardware and consumables that will be needed to support crew will pose a big stowage challenge. This includes the hardware needed for the collection and storage of human metabolic waste. The amount of stowage needed for this hardware both before (empty) and after (full) use will be a significant burden on the overall spacecraft habitable volume, layout, and design. To help with this challenge, the National Aeronautics and Space Administration (NASA) has developed a collapsible canister for the collection and containment of fecal deposits. The Alternate Fecal Canister (AFC) is an alternative to the exploration toilet hard-sided fecal canister. The AFC is collapsible in its empty state which is a volume benefit to smaller vehicles on longer missions. In addition, the use of lighter-weight materials provides a reduction in mass of the overall container. This paper will provide a summary of the AFC design including final flight design and build, acceptance and qualification testing completed, final certification and delivery and forward plans for a technology demonstration with the exploration toilet on the International Space Station (ISS). In addition, a summary of issues and final resolution encountered during flight build and testing will also be provided. As part of the acceptance and certification process for AFC, the hardware was also put into several rounds of odor testing with the support of the White Sands Test Facility (WSTF). The details, planning and anomalies identified during odor testing will also be summarized in this paper. Finally, a brief overview of potential future design upgrades including changes to address any crew feedback from the ISS demonstration will be discussed.

Fecal Canister↗

Development, Build and Certification of the Alternate Fecal Canister (AFC) Hardware for the NASA Exploration Toilet

On longer range exploration missions, the mass and volume of critical hardware and consumables that will be needed to support crew will pose a big stowage challenge. This includes the hardware needed for the collection and storage of human metabolic waste. The amount of stowage needed for this hardware both before (empty) and after (full) use will be a significant burden on the overall spacecraft habitable volume, layout, and design. To help with this challenge, the National Aeronautics and Space Administration (NASA) has developed a collapsible canister for the collection and containment of fecal deposits. The Alternate Fecal Canister (AFC) is an alternative to the exploration toilet hard-sided fecal canister. The AFC is collapsible in its empty state which is a volume benefit to smaller vehicles on longer missions. In addition, the use of lighter-weight materials provides a reduction in mass of the overall container. This paper will provide a summary of the AFC design including final flight design and build, acceptance and qualification testing completed, final certification and delivery and forward plans for a technology demonstration with the exploration toilet on the International Space Station (ISS). In addition, a summary of issues and final resolution encountered during flight build and testing will also be provided. As part of the acceptance and certification process for AFC, the hardware was also put into several rounds of odor testing with the support of the White Sands Test Facility (WSTF). The details, planning and anomalies identified during odor testing will also be summarized in this paper. Finally, a brief overview of potential future design upgrades including changes to address any crew feedback from the ISS demonstration will be discussed.

Fecal Canister↗

A Survey on the Design, Detection, and Prevention of Pre-Silicon Hardware Trojans

The complexity of the semiconductor design lifecycle and globalized manufacturing process creates concern over the threat of deliberate malicious alterations, or hardware Trojans, being inserted into microelectronic designs. This has resulted in a significant corpus of hardware Trojan research including Trojan design and benchmarking efforts and development of corresponding metrics and detection and prevention techniques, over the last two decades. In this survey, we first highlight efforts in Trojan design and benchmarking, followed by a cataloging of seminal and recent works in Trojan detection and prevention and their accompanied metrics. Given the volume of literature in this field, this survey considers only pre-silicon techniques. We make this distinction between pre- and post-silicon to properly scope and provide appropriate context into the capabilities of existing hardware Trojan literature. Each major section (design, prevention, and detection) is accompanied by insights, and common pitfalls, which we highlight can be addressed by future research.

42 ENGINEERING↗

Efficient Simulation of Open Quantum Systems on NISQ Trapped‐Ion Hardware

Abstract Simulating open quantum systems, which interact with external environments, presents significant challenges on noisy intermediate‐scale quantum (NISQ) devices due to limited qubit resources and noise. In this study, an efficient framework is proposed for simulating open quantum systems on NISQ hardware by leveraging a time‐perturbative Kraus operator representation of the system's dynamics. This approach avoids the computationally expensive Trotterization method and exploits the Lindblad master equation to represent time evolution in a compact form, particularly for systems satisfying specific commutation relations. The efficiency of this method is demonstrated by simulating quantum channels, such as the continuous‐time Pauli channel and damped harmonic oscillators, on NISQ trapped‐ion hardware, including IonQ Harmony and Quantinuum H1‐1. Additionally, hardware‐agnostic error mitigation techniques are introduced, including Pauli channel fitting and quantum depolarizing channel inversion, to enhance the fidelity of quantum simulations. These results show strong agreement between the simulations on real quantum hardware and exact solutions, highlighting the potential of Kraus‐based methods for scalable and accurate simulation of open quantum systems on NISQ devices. This framework opens pathways for simulating more complex systems under realistic conditions in the near term.

Burdine, Colin [Department of Electrical and Compu↗

On the emerging potential of quantum annealing hardware for combinatorial optimization

Abstract Over the past decade, the usefulness of quantum annealing hardware for combinatorial optimization has been the subject of much debate. Thus far, experimental benchmarking studies have indicated that quantum annealing hardware does not provide an irrefutable performance gain over state-of-the-art optimization methods. However, as this hardware continues to evolve, each new iteration brings improved performance and warrants further benchmarking. To that end, this work conducts an optimization performance assessment of D-Wave Systems’ Advantage Performance Update computer, which can natively solve sparse unconstrained quadratic optimization problems with over 5,000 binary decision variables and 40,000 quadratic terms. We demonstrate that classes of contrived problems exist where this quantum annealer can provide run time benefits over a collection of established classical solution methods that represent the current state-of-the-art for benchmarking quantum annealing hardware. Although this work does not present strong evidence of an irrefutable performance benefit for this emerging optimization technology, it does exhibit encouraging progress, signaling the potential impacts on practical optimization tasks in the future.

96 KNOWLEDGE MANAGEMENT AND PRESERVATION↗