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At least 163 records · Page 9

Generalized Quantum Convolution for Multidimensional Data

The convolution operation plays a vital role in a wide range of critical algorithms across various domains, such as digital image processing, convolutional neural networks, and quantum machine learning. In existing implementations, particularly in quantum neural networks, convolution operations are usually approximated by the application of filters with data strides that are equal to the filter window sizes. One challenge with these implementations is preserving the spatial and temporal localities of the input features, specifically for data with higher dimensions. In addition, the deep circuits required to perform quantum convolution with a unity stride, especially for multidimensional data, increase the risk of violating decoherence constraints. In this work, we propose depth-optimized circuits for performing generalized multidimensional quantum convolution operations with unity stride targeting applications that process data with high dimensions, such as hyperspectral imagery and remote sensing. We experimentally evaluate and demonstrate the applicability of the proposed techniques by using real-world, high-resolution, multidimensional image data on a state-of-the-art quantum simulator from IBM Quantum.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

A 32-Channel Cryo-CMOS ASIC for SNSPD Biasing and Readout with Picosecond

Superconducting nanowire single-photon detectors (SNSPD) are a promising technology for particle detection. Although SNSPDs have demonstrated picosecond timing accuracy, scaling up large arrays has proved challenging. In this work, we introduce a 32-channel cryo-CMOS application-specific integrated circuit (ASIC) that can be tightly integrated with SNSPD arrays. The ASIC is designed to operate at a temperature of 4K and can perform up to 32 simultaneous timing measurements with a root-mean-square (RMS) accuracy of 8.0ps. The ASIC includes on-chip circuitry for externally biasing superconducting devices, low-noise amplifiers for reading superconducting devices, high-resolution time-to-digital converters (TDC) for time-tagging events, and serializers for transmitting data to room-temperature electronics. The ASIC is manufactured in a 22nm FDSOI process and occupies an area of 4.0mm x 1.0mm. The performance of the ASIC was verified using custom cryogenic device models internally developed for the 22nm SOI process. Measurement results will be presented at the conference.

Fredenburg, Jeff↗

A 32-Channel Cryo-CMOS ASIC for SNSPD Biasing and Readout with Picosecond Timing

Superconducting nanowire single-photon detectors (SNSPD) are a promising technology for particle detection. Although SNSPDs have demonstrated picosecond timing accuracy, scaling up large arrays has proved challenging. In this work, we introduce a 32-channel cryo-CMOS application-specifc integrated circuit (ASIC) that can be tightly integrated with SNSPD arrays. The ASIC is designed to operate at a temperature of 4K and can perform up to 32 simultaneous timing measurements with a root-mean-square (RMS) accuracy of 8.0ps. The ASIC includes on-chip circuitry for externally biasing superconducting devices, low-noise amplifers for reading superconducting devices, high-resolution time-to-digital converters (TDC) for time-tagging events, and serializers for transmitting data to room-temperature electronics. The ASIC is manufactured in a 22nm FDSOI process and occupies an area of 4.0mm x 1.0mm. The performance of the ASIC was verifed using custom cryogenic device models internally developed for the 22nm SOI process. Measurement results will be presented at the conference.

Fredenburg, Jeff↗

ML–Enabled FPGA Framework for Fast Quantum State Discrimination in Mid-Circuit Measurement Regimes

Accurate and low-latency quantum state discrimination is essential for protocols involving mid-circuit measurement (MCM) and conditional feed-forward. In superconducting quantum systems, conventional readout pipelines transfer measurement data to host processors for post-processing, introducing millisecond-scale delays that far exceed qubit coherence times. To overcome this bottleneck, we present an in-situ machine learning (ML) inference engine implemented on an FPGA for real-time quantum state discrimination. Our design performs inference directly on digitized readout signals with 40 ns latency, supports both qubit and qutrit readout, and enables conditional operations without host-side intervention. This capability is critical for MCM and for feedback-driven protocols such as quantum error correction. We validate the system on superconducting transmon hardware, demonstrating robust discrimination fidelity across multiple qubit and qutrit channels. We further demonstrate conditional qutrit logic driven by FPGA-resident classification, highlighting the potential of low-latency ML-on-FPGA control for NISQ applications and scalable fault-tolerant quantum computing.

Vora, Neel [Lawrence Berkeley National Laboratory ↗

Data-Driven Cyber-Attack Detection for PV Farms via Time-Frequency Domain Features

The internetworking of grid-connected power electronics converters (PECs) in photovoltaic (PV) farms has inevitably expanded the cyber-attack surfaces. Here this paper presents a comprehensive study on cyber-attack detection and diagnosis for PEC-enabled PV farms via single waveform sensor to distinguish between normal conditions, open-circuit faults, short-circuit faults, and cyber-attacks. To our knowledge, this has not been attempted before. Firstly, we propose frequency-domain magnitude-based residuals to identify short-circuit faults and a time-domain mean current vector-based feature to distinguish open-circuit faults from other threats. These features can fully reflect the specific physical characteristics of PV farms during threat duration. Secondly, unlike micro phasor measurement units (µPMU) and raw electric waveform-based methods, the proposed innovative features can address novel cyber-attacks that are excluded from the training process. Thirdly, an online hardware-in-the-loop (HIL) testbed using the OPAL-RT real-time digital simulator has verified the effectiveness. The monitoring system runs in real-time while using HIL as an operational solar farm and a National Instruments (NI) data acquisition card as the electric waveform sensor at the point of coupling.

42 ENGINEERING↗

The SparkPix-S ASIC for the sparsified readout of 1 MHz frame-rate X-ray cameras at LCLS-II: pixel design and simulation results

Exploiting the “sparse” nature of the information in XPCS (X-ray Photon Correlation Spectroscopy) and XSVS (Speckle Visibility Spectroscopy) experiments, we present the SparkPix-S, a 3-sides buttable Application Specific Integrated Circuit (ASIC) based on a sparsified readout strategy for large-format hybrid detectors. The SparkPix-S architecture, based on the successful ePix family, will be composed as follows: a front-end 2-D matrix of 384×352 square pixels with 50 µm pitch is arranged to match the dimensions of a PIN Si-sensor matrix; charge readout, signal shaping and amplitude discrimination is performed at pixel-level, by means of a low-power (<18 µW) analog processor, which, in case of an event, negotiates access to an analog bus placed every other column; on the chip periphery (balcony), the information on each bus is digitized by an array of successive approximation analog-to-digital converters (SAR-ADCs) running at 10 Msps; on the digital back-end the global logic will generate the output data stream using low-voltage differential signalling (LVDS). A first prototype of the SparkPix-S, with a reduced matrix size of 96×96 pixels, is currently under production on a 130 nm CMOS technology. Simulated performance results show an equivalent noise charge <60 el. r.m.s. at 1 MHz repetition rate, with a maximum input energy of 60 keV and capability to discriminate charge signals with equivalent energy as low as 900 eV.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Testing of Instrumentation and Control Sensors and Cables for Small Modular Reactors

As advanced reactor concepts like small modular reactors (SMRs) progress towards design maturity and commercial deployment, it is important to assess their instrumentation and control (I&C) system sensors and cables to assure their safe, reliable, and efficient operation throughout their service lifetimes. The I&C system of any nuclear power plant (NPP) is the central nervous system of the plant and is made up of field devices such as sensors which are connected via cables to analog and/or digital systems. These systems are responsible for control and/or protection of the plant. The performance of I&C sensors and cables is dependent on several factors, including plant operating conditions. In particular, the plant operation can affect the static (accuracy) and dynamic (response) performance of the sensor, whereas the surrounding ambient environment can impact the remaining useful life of the cables, connectors, and other associated components within I&C sensor circuits.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

Zero and Finite Temperature Quantum Simulations Powered by Quantum Magic

We introduce a quantum information theory-inspired method to improve the characterization of many-body Hamiltonians on near-term quantum devices. We design a new class of similarity transformations that, when applied as a preprocessing step, can substantially simplify a Hamiltonian for subsequent analysis on quantum hardware. By design, these transformations can be identified and applied efficiently using purely classical resources. In practice, these transformations allow us to shorten requisite physical circuit-depths, overcoming constraints imposed by imperfect near-term hardware. Importantly, the quality of our transformations is t u n a b l e : we define a 'ladder' of transformations that yields increasingly simple Hamiltonians at the cost of more classical computation. Using quantum chemistry as a benchmark application, we demonstrate that our protocol leads to significant performance improvements for zero and finite temperature free energy calculations on both digital and analog quantum hardware. Specifically, our energy estimates not only outperform traditional Hartree-Fock solutions, but this performance gap also consistently widens as we tune up the quality of our transformations. In short, our quantum information-based approach opens promising new pathways to realizing useful and feasible quantum chemistry algorithms on near-term hardware.

Physics↗

Graphical User Interface for a Biasing Board for the PSEC6

The PSEC6 is an application-specific integrated circuit (ASIC) designed for a readout system for a large area picosecond photodetector (LAPPD). The PSEC6 is currently in fabrication and pending testing. The testing system for the PSEC5, the previous iteration of the ASIC, required expensive and non-portable equipment, because the ASIC needs twelve adjustable reference voltages. The new testing system consists of an low-cost, open-source, cross-platform graphical user interface (GUI), a digital system, and a biasing board. The digital system is the interface between the GUI and biasing board, and can be implemented on a microcontroller or field-programmable gate array (FPGA). The biasing board contains twelve digital-to-analog converters (DACs) that are configurable via the GUI, which gives users the ability to write voltage values to all or specific DACs. The GUI was developed in C on Linux using the widget library GTK4 and cross-compiled for Windows compatibility. I2C and SPI protocols were implemented on an Adafruit Feather ESP32-S3 microcontroller to write commands to the DACs and PSEC6. A hardware implementation of the I2C protocol is in development on an FPGA. Since LAPPDs will be used by the Accelerator Neutrino Neutron Interaction Experiment (ANNIE) at Fermilab, the PSEC6 testing system in this internship project can potentially benefit future neutrino research. The project is relevant to the Department of Energy’s microelectronics mission, because the PSEC6 is an ASIC that will handle fast time signals arriving from the detector for readout. It also provided experience with building a cross-platform user interface, practicing digital design and implementation in hardware description language (HDL), and using simulations to inform new design iterations.

Guerrero, Sasha Camila [North Central Coll.]↗

Graphical User Interface for a Biasing Board for the PSEC6

The PSEC6 is an application-specific integrated circuit (ASIC) designed for a readout system for a large area picosecond photodetector (LAPPD). The PSEC6 is currently in fabrication and pending testing. The testing system for the PSEC5, the previous iteration of the ASIC, required expensive and non-portable equipment, because the ASIC needs twelve adjustable reference voltages. The new testing system consists of an low-cost, open-source, cross-platform graphical user interface (GUI), a digital system, and a biasing board. The digital system is the interface between the GUI and biasing board, and can be implemented on a microcontroller or field-programmable gate array (FPGA). The biasing board contains twelve digital-to-analog converters (DACs) that are configurable via the GUI, which gives users the ability to write voltage values to all or specific DACs. The GUI was developed in C on Linux using the widget library GTK4 and cross-compiled for Windows compatibility. I2C and SPI protocols were implemented on an Adafruit Feather ESP32-S3 microcontroller to write commands to the DACs and PSEC6. A hardware implementation of the I2C protocol is in development on an FPGA. Since LAPPDs will be used by the Accelerator Neutrino Neutron Interaction Experiment (ANNIE) at Fermilab, the PSEC6 testing system in this internship project can potentially benefit future neutrino research. The project is relevant to the Department of Energy’s microelectronics mission, because the PSEC6 is an ASIC that will handle fast time signals arriving from the detector for readout. It also provided experience with building a cross-platform user interface, practicing digital design and implementation in hardware description language (HDL), and using simulations to inform new design iterations.

Guerrero, Sasha Camila [North Central Coll.]↗

Traveling Wave Relays for Distribution Feeder Protection with High Penetrations of Distributed Energy Resources

Increased penetration of power electronics interfaced Distributed Energy Resources (DER) like PV, electric vehicle and battery storage in the distribution system (both in numbers and sizes) may cause bi-directional power flows under normal operation. In addition, they contribute low fault current under short circuit conditions. These two changes can impact the proper operation of legacy protection systems. This can add additional challenges during weak grid and islanded operation. In this research, traveling wave (high frequency) signature based protection scheme is proposed for future distribution systems. Simulations are performed under different transient scenarios to provide insight into the high frequency signatures to show the traveling wave behavior. Finally, this paper discusses the importance of sensing and digital processing requirements for traveling-wave protection in distribution system.

41 EE - Solar Energy Technologies Office (EE-4S)↗

Traveling Wave Relays for Distribution Feeder Protection with High Penetrations of Distributed Energy Resources: Preprint

Increased penetration of power electronics interfaced Distributed Energy Resources (DER) like PV, electric vehicle and battery storage in the distribution system (both in numbers and sizes) may cause bi-directional power flows under normal operation. In addition, they contribute low fault current under short circuit conditions. These two changes can impact the proper operation of legacy protection systems. This can add additional challenges during weak grid and islanded operation. In this research, traveling wave (high frequency) signature based protection scheme is proposed for future distribution systems. Simulations are performed under different transient scenarios to provide insight into the high frequency signatures to show the traveling wave behavior. Finally, this paper discusses the importance of sensing and digital processing requirements for traveling-wave protection in distribution system.

41 EE - Solar Energy Technologies Office (EE-4S)↗

Traveling Wave Relays for Distribution Feeder Protection with High Penetrations of Distributed Energy Resources

Increased penetration of power electronics interfaced Distributed Energy Resources (DER) like PV, electric vehicle and battery storage in the distribution system (both in numbers and sizes) may cause bi-directional power flows under normal operation. In addition, they contribute low fault current under short circuit conditions. These two changes can impact the proper operation of legacy protection systems. This can add additional challenges during weak grid and islanded operation. In this research, traveling wave (high frequency) signature based protection scheme is proposed for future distribution systems. Simulations are performed under different transient scenarios to provide insight into the high frequency signatures to show the traveling wave behavior. Finally, this paper discusses the importance of sensing and digital processing requirements for traveling-wave protection in distribution system.

41 EE - Solar Energy Technologies Office (EE-4S)↗

DRIPS: Dynamic Rebalancing of Pipelined Streaming Applications on CGRAs

Coarse-grained reconfigurable arrays (CGRAs) provide higher flexibility than application-specific integrated circuits (ASICs) and higher efficiency than fine-grained reconfigurable devices such as Field Programmable Gate Arrays (FPGAs). However, CGRAs are generally designed to support offloading of a single kernel. While their design, based on communicating functional units, appears to naturally suit data streaming applications composed of multiple cooperating kernels, current approaches only statically partition the resources across application kernels. However, emerging streaming applications at the edge (scientific instruments, sensor networks, network processing) perform much more than digital signal processing and often are data and input dependent. This leads to extremely variable kernel execution times, severely impacting the throughput of the entire pipeline if resources are only statically allocated. Therefore, in this paper, we propose DRIPS — a coarse-grained, dynamically, and partially reconfigurable array for data-dependent streaming applications. We present a unified compiler framework to facilitate the mapping of a given streaming application onto the DRIPS CGRA architecture. The experimental results show that DRIPS achieves an average throughput improvement of 1.46$\times$ across a set of representative applications over a statically partitioned solution. The additional area overhead to enable dynamic rebalancing consumes 16.34% of the entire area for a 5x5 CGRA prototype.

Tan, Cheng↗

Ground state energy and magnetization curve of a frustrated magnetic system from real-time evolution on a digital quantum processor

Models of interacting many-body quantum systems that may realize new exotic phases of matter, notably quantum spin liquids, are challenging to study using even state-of-the-art classical methods such as tensor network simulations. Quantum computing provides a promising route for overcoming these difficulties to find ground states, dynamics, and more. In this paper, we argue that recently developed hybrid quantum-classical algorithms based on real-time evolution are promising methods for solving a particularly important model in the search for spin liquids, the antiferromagnetic Heisenberg model on the two-dimensional kagome lattice. We show how to construct efficient quantum circuits to implement time evolution for the model and to evaluate key observables on the quantum computer, and we argue that the method has favorable scaling with increasing system size. We then restrict to a 12-spin star plaquette from the kagome lattice and a related 8-spin system, and we give an empirical demonstration on these small systems that the hybrid algorithms can efficiently find the ground state energy and the magnetization curve. For these demonstrations, we use four levels of approximation: exact state vectors, exact state vectors with statistical noise from sampling, noisy classical emulators, and (for the 8-spin system only) real quantum hardware, specifically the Quantinuum H1-1 processor; for the noisy simulations and hardware demonstration, we also employ error mitigation strategies based on the symmetries of the Hamiltonian. Our results strongly suggest that these hybrid algorithms present a promising direction for studying quantum spin liquids and more generally for resolving important unsolved problems in condensed matter theory and beyond.

97 MATHEMATICS AND COMPUTING↗

Driven-dissipative quantum mechanics on a lattice: Simulating a fermionic reservoir on a quantum computer

The driven-dissipative many-body problem remains one of the most challenging unsolved problems in quantum mechanics. The advent of quantum computers may provide a unique platform for efficiently simulating such driven-dissipative systems. But, there are many choices for how one can engineer the reservoir. One can simply employ ancilla qubits to act as a reservoir and then digitally simulate them via algorithmic cooling. A more attractive approach, which allows one to simulate an infinite reservoir, is to integrate out the bath degrees of freedom and describe the driven-dissipative system via a master equation, that can also be simulated on a quantum computer. In this work, we consider the particular case of noninteracting electrons on a lattice driven by an electric field and coupled to a fermionic thermostat. Then, we provide two different quantum circuits: the first one reconstructs the full dynamics of the system using Trotter steps, while the second one dissipatively prepares the final nonequilibrium steady state in a single step. We run both circuits on the IBM quantum experience. For circuit (i), we achieved up to five Trotter steps. When partial resets become available on quantum computers, we expect that the maximum simulation time can be significantly increased. Lastly, the methods developed here suggest generalizations that can be applied to simulating interacting driven-dissipative systems.

75 CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND↗

Medium Voltage Energy Hub Based on Multilevel Cascaded H Bridge-Dual Active Bridge Back-to-Back Converter for Power Distribution Feeders Interconnection and Multiple Simultaneous Grid Services

This paper presents a medium voltage energy hub based on a modular design of a multilevel cascaded H bridge (CHB)-dual active bridge (DAB) converter. The energy hub composed of the two CHB-DAB modules with a back-to-back topology can be utilized as a grid interconnection component between distribution feeders. The energy hub can provide multiple simultaneous grid services such as voltage regulation, power factor correction, as well as active power flow control between the connected feeders, contributing to grid flexibility, efficiency, reliability, and resilience. Circuit structure and control schemes for the energy hub including both local controllers for each converter and outer loop controllers are proposed to enable simultaneous grid services with coordination to prevent the overloading of the hub. To validate the performance of the hub, the hub system is interconnected between two IEEE 4-bus feeders and provides voltage regulation for both feeders, while controlling active power flow between them. The system and the feeders are implemented in Real-Time Digital Simulator (RTDS) for real-time simulation verification.

Choi, Jongchan↗

Unification of finite symmetries in the simulation of many-body systems on quantum computers

Symmetry is fundamental in the description and simulation of quantum systems. Leveraging symmetries in classical simulations of many-body quantum systems can result in significant overhead due to the exponentially growing size of some symmetry groups as the number of particles increases. Quantum computers hold the promise of achieving exponential speedup in simulating quantum many-body systems; however, a general method for utilizing symmetries in quantum simulations has not yet been established. In this work, we present a unified framework for incorporating symmetry group transforms on quantum computers to simulate many-body systems. The core of our approach lies in the development of efficient quantum circuits for symmetry-adapted projection onto irreducible representations of a group or pairs of commuting groups. We provide resource estimations for common groups, including the cyclic and permutation groups. Our algorithms demonstrate the capability to prepare coherent superpositions of symmetry-adapted states and to perform quantum evolution across a wide range of models in condensed-matter physics and ab initio electronic structure in quantum chemistry. Specifically, we execute a symmetry-adapted quantum subroutine for small molecules in first-quantization on noisy hardware and demonstrate the emulation of symmetry-adapted quantum phase estimation for preparing coherent superpositions of quantum states in various irreducible representations of a symmetry group. In addition, we present a discussion of open problems regarding treating symmetries in digital quantum simulations of many-body systems, paving the way for future systematic investigations into leveraging symmetries quantumly for practical quantum advantage. The broad applicability and rigorous resource estimation for symmetry transformations make our framework appealing for achieving provable quantum advantage on fault-tolerant quantum computers, especially for symmetry-related properties.

quantum algorithms↗