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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 163 records · Page 9
All sourcesNASA NTRSDOE OSTI
NASA NTRS2002

Air Traffic Control Response to Delays: A System Study of Newark International Airport

Airport delays are a significant problem in the United States air transportation system. Between 1999 and 2000 the number of flights delayed increased by 20 percent despite only a 0.4% increase in total operations. Newark International Airport (EWR), one of New York City's primary airports, is one of the airports in the United States most impacted by delays. Newark had the highest percentage of operations delayed in 1999, and was second only to LaGuardia Airport in 2000. Nearly 85% of delays at Newark are caused by adverse weather impacting an airport that may be characterized as having limited capacity and a very full schedule. Although Newark is heavily impacted by weather, delays have not increased significantly since 1998. This indicates that the airlines, air traffic control (ATC), and the Port Authority of New York and New Jersey have successfully adapted. On June 29, 2000, a research team from MIT visited Newark airport to assess the effectiveness of any adaptations made, and to collect data on airline and ATC departure operations, and of the national and local weather affecting the airport. Airline and ATC personnel were also interviewed. Results of this study indicate that airspace capacity limitations downstream of the airport are a primary flow constraint at the airport, and that these constraints are the source of most surface delays. A number of tactical ATC responses to delays were examined, including the application of restrictions, re-routing with the help of the National Playbook, and the use of decision-aiding tools such as the Dynamic Spacing Program (DSP) and the Integrated Terminal Weather System (ITWS). Improved interfacility communications and further utilization of runway 11-29 were identified as other tactical responses to delays, whilst the formation of the Air Traffic Control System Command Center and the New York Airspace redesign were identified as thekey strategic ATC responses to delays. Particularly the New York airspace redesign has great potential to reduce delays at the airport. Because delays at Newark are caused by downstream flow constraints, the responses at the airport can be applied to other airports as delays from downstream constraints increase. Such an increase in delays system wide from downstream constraints is inevitable as the system becomes more congested.

Evans, Antony D.↗
NASA NTRS2003

Data Access Tools And Services At The Goddard Distributed Active Archive Center (GDAAC)

As one of the largest providers of Earth Science data from the Earth Observing System, GDAAC provides the latest data from the Moderate Resolution Imaging Spectroradiometer (MODIS), Atmospheric Infrared Sounder (AIRS), Solar Radiation and Climate Experiment (SORCE) data products via GDAAC's data pool (50TB of disk cache). In order to make this huge volume of data more accessible to the public and science communities, the GDAAC offers multiple data access tools and services: Open Source Project for Network Data Access Protocol (OPeNDAP), Grid Analysis and Display System (GrADS/DODS) (GDS), Live Access Server (LAS), OpenGlS Web Map Server (WMS) and Near Archive Data Mining (NADM). The objective is to assist users in retrieving electronically a smaller, usable portion of data for further analysis. The OPeNDAP server, formerly known as the Distributed Oceanographic Data System (DODS), allows the user to retrieve data without worrying about the data format. OPeNDAP is capable of server-side subsetting of HDF, HDF-EOS, netCDF, JGOFS, ASCII, DSP, FITS and binary data formats. The GrADS/DODS server is capable of serving the same data formats as OPeNDAP. GDS has an additional feature of server-side analysis. Users can analyze the data on the server there by decreasing the computational load on their client's system. The LAS is a flexible server that allows user to graphically visualize data on the fly, to request different file formats and to compare variables from distributed locations. Users of LAS have options to use other available graphics viewers such as IDL, Matlab or GrADS. WMS is based on the OPeNDAP for serving geospatial information. WMS supports OpenGlS protocol to provide data in GIs-friendly formats for analysis and visualization. NADM is another access to the GDAAC's data pool. NADM gives users the capability to use a browser to upload their C, FORTRAN or IDL algorithms, test the algorithms, and mine data in the data pool. With NADM, the GDAAC provides an environment physically close to the data source. NADM will benefit users with mining or offer data reduction algorithms by reducing large volumes of data before transmission over the network to the user.

Pham, Long↗
NASA NTRS1989

VLSI processors for signal detection in SETI

The objective of the Search for Extraterrestrial Intelligence (SETI) is to locate an artificially created signal coming from a distant star. This is done in two steps: (1) spectral analysis of an incoming radio frequency band, and (2) pattern detection for narrow-band signals. Both steps are computationally expensive and require the development of specially designed computer architectures. To reduce the size and cost of the SETI signal detection machine, two custom VLSI chips are under development. The first chip, the SETI DSP Engine, is used in the spectrum analyzer and is specially designed to compute Discrete Fourier Transforms (DFTs). It is a high-speed arithmetic processor that has two adders, one multiplier-accumulator, and three four-port memories. The second chip is a new type of Content-Addressable Memory. It is the heart of an associative processor that is used for pattern detection. Both chips incorporate many innovative circuits and architectural features.

NASA Program Exobiology↗
NASA NTRS2004

Multi-level Simulation of a Real Time Vibration Monitoring System Component

This paper describes the development of a custom built Digital Signal Processing (DSP) printed circuit board designed to implement the Advanced Real Time Vibration Monitoring Subsystem proposed by MSFC Transportation Directorate in 2000 for the Space Shuttle Main Engine Advanced Health Management System (AHMS). This Real Time Vibration Monitoring System (RTVMS) is being developed for ground use as part of the AHMS Health Management Computer-Integrated Rack Assembly (HMC-IRA). The HMC-IRA RTVMS design contains five DSPs which are highly interconnected through individual communication ports, shared memory, and a unique communication router that allows all the DSPs to receive digitized data from two multi-channel analog boards simultaneously. This paper will briefly cover the overall board design but will focus primarily on the state-of-the-art simulation environment within which this board was developed. This 16-layer board with over 1800 components and an additional mezzanine card has been an extremely challenging design. Utilization of a Mentor Graphics simulation environment provided the unique board and system level simulation capability to ascertain any timing or functional concerns before production. By combining VHDL, Synopsys Software and Hardware Models, and the Mentor Design Capture Environment, multiple simulations were developed to verify the RTVMS design. This multi-level simulation allowed the designers to achieve complete operability without error the first time the RTVMS printed circuit board was powered. The HMCIRA design has completed all engineering unit testing and the deliverable unit is currently under development.

Roberston, Bryan↗
NASA NTRS2004

Experimental Test-Bed for Intelligent Passive Array Research

This document describes the test-bed designed for the investigation of passive direction finding, recognition, and classification of speech and sound sources using sensor arrays. The test-bed forms the experimental basis of the Intelligent Small-Scale Spatial Direction Finder (ISS-SDF) project, aimed at furthering digital signal processing and intelligent sensor capabilities of sensor array technology in applications such as rocket engine diagnostics, sensor health prognostics, and structural anomaly detection. This form of intelligent sensor technology has potential for significant impact on NASA exploration, earth science and propulsion test capabilities. The test-bed consists of microphone arrays, power and signal distribution modules, web-based data acquisition, wireless Ethernet, modeling, simulation and visualization software tools. The Acoustic Sensor Array Modeler I (ASAM I) is used for studying steering capabilities of acoustic arrays and testing DSP techniques. Spatial sound distribution visualization is modeled using the Acoustic Sphere Analysis and Visualization (ASAV-I) tool.

Solano, Wanda M.↗
NASA NTRS2005

Real-time Enhanced Vision System

Flying in poor visibility conditions, such as rain, snow, fog or haze, is inherently dangerous. However these conditions can occur at nearly any location, so inevitably pilots must successfully navigate through them. At NASA Langley Research Center (LaRC), under support of the Aviation Safety and Security Program Office and the Systems Engineering Directorate, we are developing an Enhanced Vision System (EVS) that combines image enhancement and synthetic vision elements to assist pilots flying through adverse weather conditions. This system uses a combination of forward-looking infrared and visible sensors for data acquisition. A core function of the system is to enhance and fuse the sensor data in order to increase the information content and quality of the captured imagery. These operations must be performed in real-time for the pilot to use while flying. For image enhancement, we are using the LaRC patented Retinex algorithm since it performs exceptionally well for improving low-contrast range imagery typically seen during poor visibility conditions. In general, real-time operation of the Retinex requires specialized hardware. To date, we have successfully implemented a single-sensor real-time version of the Retinex on several different Digital Signal Processor (DSP) platforms. In this paper we give an overview of the EVS and its performance requirements for real-time enhancement and fusion and we discuss our current real-time Retinex implementations on DSPs.

Hines, Glenn D.↗
NASA NTRS1999

Bandwidth Efficient Wireless Digital Modem Developed

NASA Lewis Research Center has developed a digital approach for broadcasting highfidelity audio (nearly compact disk (CD) quality sound) in the commercial frequencymodulated (FM) broadcast band. This digital approach provides a means of achieving high data transmission rates with low hardware complexity--including low mass, size, and power consumption. Lewis has completed the design and prototype development of a bandwidth-efficient digital modem (modulator and demodulator) that uses a spectrally efficient modulation scheme: 16-ary rectangular quadrature amplitude modulation, or 16- ary QAM. The digital implementation is based strictly on inexpensive, commercial off-theshelf digital signal processing (DSP) hardware to perform up and down conversions and pulse shaping. The digital modem transmits data at rates up to 76 kilobits per second (kbps), which is almost 3 times faster than standard 28.8-kbps telephone modems. In addition, the modem offers improved power and spectral performance, flexible operation, and low-cost implementation.

Kifle, Muli↗
NASA NTRS2005

A VHDL Core for Intrinsic Evolution of Discrete Time Filters with Signal Feedback

The design of an Evolvable Machine VHDL Core is presented, representing a discrete-time processing structure capable of supporting control system applications. This VHDL Core is implemented in an FPGA and is interfaced with an evolutionary algorithm implemented in firmware on a Digital Signal Processor (DSP) to create an evolvable system platform. The salient features of this architecture are presented. The capability to implement IIR filter structures is presented along with the results of the intrinsic evolution of a filter. The robustness of the evolved filter design is tested and its unique characteristics are described.

Gwaltney, David A.↗
NASA NTRS2005

Rotary Drum Separator and Pump for the Sabatier Carbon Dioxide Reduction System

A trade study conducted in 2001 selected a rotary disk separator as the best candidate to meet the requirements for an International Space Station (ISS) Carbon Dioxide Reduction Assembly (CRA). The selected technology must provide micro-gravity gasfliquid separation and pump the liquid from 10 psia at the gasfliquid interface to 18 psia at the wastewater bus storage tank. The rotary disk concept, which has pedigree in other systems currently being built for installation on the ISS, failed to achieve the required pumping head within the allotted power. The separator discussed in this paper is a new design that was tested to determine compliance with performance requirements in the CRA. The drum separator and pump @SP) design is similar to the Oxygen Generator Assembly (OGA) Rotary Separator Accumulator (RSA) in that it has a rotating assembly inside a stationary housing driven by a integral internal motor. The innovation of the DSP is the drum shaped rotating assembly that acts as the accumulator and also pumps the liquid at much less power than its predecessors. In the CRA application, the separator will rotate at slow speed while accumulating water. Once full, the separator will increase speed to generate sufficient head to pump the water to the wastewater bus. A proof-of- concept (POC) separator has been designed, fabricated and tested to assess the separation efficiency and pumping head of the design. This proof-of-concept item was flown aboard the KC135 to evaluate the effectiveness of the separator in a microgravity environment. This separator design has exceeded all of the performance requirements. The next step in the separator development is to integrate it into the Sabatier Carbon Dioxide Reduction System. This will be done with the Sabatier Engineering Development Unit at the Johnson Space Center.

Holder, Don↗
NASA NTRS2005

Development of a Low-Cost UAV Doppler Radar Data System

A viewgraph presentation on the design of a low cost unmanned aerial vehicle (UAV) doppler radar data system is presented. The topics include: 1) Science and Mission Background; 2) Radar Requirements and Specs; 3) Radar Realization: RF System; 4) Processing of RF Signal; 5) Data System Design Process; 6) Can We Remove the DSP? 7) Determining Approximate Speed Requirements; 8) Radar Realization: Data System; 9) Data System Operation; and 10) Results.

Knuble, Joseph↗
NASA NTRS2005

Multi-level Simulation of a Real Time Vibration Monitoring System Component

This paper describes the development of a custom built Digital Signal Processing (DSP) printed circuit board designed to implement the Advanced Real Time Vibration Monitoring Subsystem proposed by Marshall Space Flight Center (MSFC) Transportation Directorate in 2000 for the Space Shuttle Main Engine Advanced Health Management System (AHMS). This Real Time Vibration Monitoring System (RTVMS) is being developed for ground use as part of the AHMS Health Management Computer-Integrated Rack Assembly (HMC-IRA). The HMC-IRA RTVMS design contains five DSPs which are highly interconnected through individual communication ports, shared memory, and a unique communication router that allows all the DSPs to receive digitized data fiom two multi-channel analog boards simultaneously. This paper will briefly cover the overall board design but will focus primarily on the state-of-the-art simulation environment within which this board was developed. This 16-layer board with over 1800 components and an additional mezzanine card has been an extremely challenging design. Utilization of a Mentor Graphics simulation environment provided the unique board and system level simulation capability to ascertain any timing or functional concerns before production. By combining VHDL, Synopsys Software and Hardware Models, and the Mentor Design Capture Environment, multiple simulations were developed to verify the RTVMS design. This multi-level simulation allowed the designers to achieve complete operability without error the first time the RTVMS printed circuit board was powered. The HMC-IRA design has completed all engineering and deliverable unit testing. P

Robertson, Bryan A.↗
NASA NTRS2006

Real-time Enhancement, Registration, and Fusion for a Multi-Sensor Enhanced Vision System

Over the last few years NASA Langley Research Center (LaRC) has been developing an Enhanced Vision System (EVS) to aid pilots while flying in poor visibility conditions. The EVS captures imagery using two infrared video cameras. The cameras are placed in an enclosure that is mounted and flown forward-looking underneath the NASA LaRC ARIES 757 aircraft. The data streams from the cameras are processed in real-time and displayed on monitors on-board the aircraft. With proper processing the camera system can provide better-than- human-observed imagery particularly during poor visibility conditions. However, to obtain this goal requires several different stages of processing including enhancement, registration, and fusion, and specialized processing hardware for real-time performance. We are using a real-time implementation of the Retinex algorithm for image enhancement, affine transformations for registration, and weighted sums to perform fusion. All of the algorithms are executed on a single TI DM642 digital signal processor (DSP) clocked at 720 MHz. The image processing components were added to the EVS system, tested, and demonstrated during flight tests in August and September of 2005. In this paper we briefly discuss the EVS image processing hardware and algorithms. We then discuss implementation issues and show examples of the results obtained during flight tests. Keywords: enhanced vision system, image enhancement, retinex, digital signal processing, sensor fusion

Hines, Glenn D.↗
NASA NTRS2006

Distributed Computing Architecture for Image-Based Wavefront Sensing and 2 D FFTs

Image-based wavefront sensing (WFS) provides significant advantages over interferometric-based wavefi-ont sensors such as optical design simplicity and stability. However, the image-based approach is computational intensive, and therefore, specialized high-performance computing architectures are required in applications utilizing the image-based approach. The development and testing of these high-performance computing architectures are essential to such missions as James Webb Space Telescope (JWST), Terrestial Planet Finder-Coronagraph (TPF-C and CorSpec), and Spherical Primary Optical Telescope (SPOT). The development of these specialized computing architectures require numerous two-dimensional Fourier Transforms, which necessitate an all-to-all communication when applied on a distributed computational architecture. Several solutions for distributed computing are presented with an emphasis on a 64 Node cluster of DSPs, multiple DSP FPGAs, and an application of low-diameter graph theory. Timing results and performance analysis will be presented. The solutions offered could be applied to other all-to-all communication and scientifically computationally complex problems.

Smith, Jeffrey S.↗
NASA NTRS2002

Rapid evolution of analog circuits configured on a field programmable transistor array

The purpose of this paper is to illustrate evolution of analog circuits on a stand-alone board-level evolvable system (SABLES). SABLES is part of an effort to achieve integrated evolvable systems. SABLES provides autonomous, fast (tens to hundreds of seconds), on-chip circuit evolution involving about 100,000 circuit evaluations. Its main components are a JPL Field Programmable Transistor Array (FPTA) chip used as transistor-level reconfigurable hardware, and a TI DSP that implements the evolutionary algorithm controlling the FPTA reconfiguration. The paper details an example of evolution on SABLES and points out to certain transient and memory effects that affect the stability of solutions obtained reusing the same piece of hardware for rapid testing of individuals during evolution.

SABLES analog circuits field programmable transist↗
NASA NTRS2002

Evolvable, reconfigurable hardware for future space systems

This paper overviews Evolvable Hardware (EHW) technology, examining its potential for enhancing survivability and flexibility of future space systems. EHW refers to selfconfiguration of electronic hardware by evolutionary/genetic search mechanisms. Evolvable Hardware can maintain existing functionality in the presence of faults and degradations due to aging, temperature and radiation. It can also configure itself for new functionality when required for mission changes or encountered opportunities. The paper illustrates hardware evolution in silicon using a JPL-designed programmable device reconfigurable at transistor level as the platform and a genetic algorithm running on a DSP as the reconfiguration mechanism. Rapid reconfiguration allows convergence to circuit solutions in the order of seconds. The experiments demonstrate functional recovery from faults as well as from degradation at extreme temperatures indicating the possibility of expanding the operational range of extreme electronics through evolved circuit solutions.

Evolvable Hardware EHW↗
NASA NTRS2002

Spacewire on Earth orbiting scatterometers

The need for a high speed, reliable and easy to implement communication link has led to the development of a space flight oriented version of IEEE 1355 called SpaceWire. SpaceWire is based on high-speed (200 Mbps) serial point-to-point links using Low Voltage Differential Signaling (LVDS). SpaceWIre has provisions for routing messages between a large network of processors, using wormhole routing for low overhead and latency. {additionally, there are available space qualified hybrids, which provide the Link layer to the user's bus}. A test bed of multiple digital signal processor breadboards, demonstrating the ability to meet signal processing requirements for an orbiting scatterometer has been implemented using three Astrium MCM-DSPs, each breadboard consists of a Multi Chip Module (MCM) that combines a space qualified Digital Signal Processor and peripherals, including IEEE-1355 links. With the addition of appropriate physical layer interfaces and software on the DSP, the SpaceWire link is used to communicate between processors on the test bed, e.g. sending timing references, commands, status, and science data among the processors. Results are presented on development issues surrounding the use of SpaceWire in this environment, from physical layer implementation (cables, connectors, LVDS drivers) to diagnostic tools, driver firmware, and development methodology. The tools, methods, and hardware, software challenges and preliminary performance are investigated and discussed.

serial↗
NASA NTRS2005

Re-configurable electronics behavoir under extreme thermal environment

This paper focuses on analog/digital electronics at low-temperatures. The experiments cover separate tests of the whole Evolvable Hardware system: the Evolutionary Processor (the DSP in the SABLE system), Xilinx Virtes II Pro FPGA evaluation board, and the Reconfigurable analog array components tested at low and high temperatures.

Field Programmable Transistor Arrays (FPTA)↗