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DOE OSTI2025

Artificial Intelligence and Digital Engineering as Enablers for System Engineering in the Energy Sector

Systems engineering is of utmost importance for the success of high-cost, high-complexity megaprojects, which are common in the energy sector. However, the traditional document-centric systems engineering approach tends to be labor-intensive and time-consuming, which has inhibited its full adoption despite proven metrics on its return on investment. However, with the modern approach of digital engineering and technological advancements in artificial intelligence (AI) technologies, the barriers to systems engineering adoption can finally be broken. This paper goes through the systems engineering V-model for lifecycle management and assesses the current state of implementation of digital engineering (especially, mod-el-based systems engineering, digital twins, and digital threads) and AI for each step. It was observed that a combination of digital engineering and AI is being used across different industries to accelerate and optimize systems engineering processes such as concept development, requirements management, architecture definition, system development, verification and validation, operations, and maintenance. Specifically in the energy sector, AI-augmented digital engineering has shown initial potential in accelerated development and deployment, performance optimization, anomaly detection, predictive maintenance, and configuration management. However, challenges remain in integrating DE and AI into an end-to-end system lifecycle management ecosystem safely and reliably. Addressing these challenges and continuously developing impactful tools will enable fast, efficient, and high-frequency deployment of power generation capabilities to keep up with the world’s energy demands and build energy security.

42 - ENGINEERING↗

DOE OSTI2025

Artificial Intelligence and Digital Engineering as Enablers for Systems Engineering in the Energy Sector

42 - ENGINEERING↗

DOE OSTI2021

Multi‐fidelity digital twin structural model for a sub‐scale downwind wind turbine rotor blade

Abstract This paper presents the development of a multi‐fidelity digital twin structural model (virtual model) of an as‐built wind turbine blade. The goal is to develop and demonstrate an approach to produce an accurate and detailed model of the as‐built blade for use in verifying the performance of the operating two‐bladed, downwind rotor. The digital twin model development methodology, presented herein, involves a novel calibration process to integrate a wide range of information including design specifications, manufacturing information, and structural testing data (modal and static) to produce a multi‐fidelity digital twin structural model: a detailed high‐fidelity model (i.e., 3D finite element analysis [FEA]) and consistent beam‐type models for aeroelastic simulation. A key element is that the multi‐fidelity structural digital twin method follows the rotor from the stages of design, to manufacturing, then to the ground testing and field operation. The result of this comprehensive approach is an accurate multi‐fidelity digital twin structural model for the geometric, structural, and structural dynamic properties of the as‐built blade within a 1% match in mass properties, 3.2% in blade frequencies, and 6% in deflection. The different stages of processing this information within the methodology are discussed. The rotor examined is the SUMR‐Demonstrator (SUMR‐D), which was installed on the Controls Advanced Research Testbed (CART‐2) wind turbine at the National Wind Technology Center. The digital twin model developed here was utilized to design controllers to safely operate SUMR‐D in field tests, which are providing additional data for further evaluation and development of the multi‐fidelity digital twin structural model.

Chetan, Mayank↗

DOE OSTI2021

OPERATING EXPERIENCE AND ITS RELATIONSHIP TO EMBEDDED DIGITAL DEVICES IN SAFETY SYSTEMS

Interest in embedded digital devices (EDDs) for monitoring and providing control of components is increasing and the added functionality digital brings such as diagnostics, displays, control functions is welcomed in both the nuclear and other industries. As a result, pure analog-based components continue to disappear from the industrial I&C marketplace. Equipment with EDDs, also known by related terms such as smart devices, intelligent devices, and digital devices of limited functionality, can include sensors, breakers, priority logic modules, time delay relays, pumps, valve actuators, motor control centers, and uninterruptible power supplies. Not only is equipment consisting of analog and older digital technology being replaced with commercial grade products containing EDDs, but EDDs can also be retrofitted to work with existing components. EDDs may be installed physically within a component, such as in a relay. There are also external devices that some would not consider an EDD, but that operate in almost all technical ways identically to one internal to a component such as in a valve controller. In fact, the digital portions may be located hundreds of feet from the actual component.Due to the potential of being used in an identical manner and without alteration from their application in other industries, operating experience (OpE) for EDDs may be much more applicable than in the case of other more system level devices. Clear separation and independence of functionality provided with EDDs may also allow greater applicability of existing OpE from industry for changes that can be shown not to affect its safety function. However, OpE also demonstrates issues with different conditions between other industries and nuclear power plants, such as issues with undeclared changes or undeclared digital devices and the new failure modes they may introduce, issues with the reporting of OpE in industry, and a lack of transparency into OpE for EDDs.Understanding and addressing these issues will be key in the future use of EDDs in nuclear power plants, but failure rate data is difficult to obtain for EDDs, and lessons learned from the use of EDDs are difficult to collect and identify.Key words: embedded digital device, smart device, operating experience, failure modes

Muhlheim, Michael↗

DOE OSTI2024

Entanglement-based quantum digital signatures over a deployed campus network

The quantum digital signature protocol offers a replacement for most aspects of public-key digital signatures ubiquitous in today’s digital world. A major advantage of a quantum-digital-signatures protocol is that it can have information-theoretic security, whereas public-key cryptography cannot. Here we demonstrate and characterize hardware to implement entanglement-based quantum digital signatures over our campus network. Over 25 hours, we collect measurements on our campus network, where we measure sufficiently low quantum bit error rates (<5% in most cases) which in principle enable quantum digital signatures at over 50 km as shown through rigorous simulation accompanied by a noise model developed specifically for our implementation. These results show quantum digital signatures can be successfully employed over deployed fiber. Moreover, our reported method provides great flexibility in the number of users, but with reduced entanglement rate per user. Finally, while the current implementation of our entanglement-based approach has a low signature rate, feasible upgrades would significantly increase the signature rate.

97 MATHEMATICS AND COMPUTING↗

DOE OSTI2021

All-Digital Plug and Play Passive RFID Sensors for Energy Efficient Building Control

This is the final report for the project “All-Digital Plug and Play Passive RFID Sensors for Energy Efficient Building Control”, funded by DOE, and performed by Clemson University, Phase IV Engineering and Harvard University from October 1, 2016 to December 31, 2020. The main objective of this project is to develop, demonstrate and pre-commercialize a novel, plug & play, battery-free, wireless sensor technology to enable low-cost (<$10 per node) indoor and outdoor temperature and humidity measurement for energy efficient building controls and operations. The proposed technology is based on the novel concept of all-digital sensing and its seamless integration with the passive RFID technology. This project focuses on the design, fabrication, material optimization, interrogation electronics, validation, and demonstration of the novel sensor nodes for building applications. The specific objectives of this research program include: (1) Design, fabricate and optimize a compact, robust, and high-resolution digitizer, which could convert rotation angle into digital numbers. (2) Develop the multi-physics-based modeling and simulation of the temperature/humidity transducer to derive a rational design of the architecture, dimension, structure, materials (i.e., mechanical, electrical, thermal and hygroscopic) properties and functions of the sensor node. (3) Design, fabricate and optimize the bi-material based humidity sensitive coil which could linearly transduce the environmental relative humidity variations to rotation angles. (4) Design, fabricate and optimize an UHF RFID platform which could support long-range passive wireless communications of 8-bit digital numbers. (5) Design, fabricate and optimize the miniaturized all-digital sensor using MEMS technology. (6) Validate the integrated all-digital sensing system in a real building environment to test the system’s performance.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗

NASA NTRS1986

Input-output characterization of an ultrasonic testing system by digital signal analysis

Ultrasonic test system input-output characteristics were investigated by directly coupling the transmitting and receiving transducers face to face without a test specimen. Some of the fundamentals of digital signal processing were summarized. Input and output signals were digitized by using a digital oscilloscope, and the digitized data were processed in a microcomputer by using digital signal-processing techniques. The continuous-time test system was modeled as a discrete-time, linear, shift-invariant system. In estimating the unit-sample response and frequency response of the discrete-time system, it was necessary to use digital filtering to remove low-amplitude noise, which interfered with deconvolution calculations. A digital bandpass filter constructed with the assistance of a Blackman window and a rectangular time window were used. Approximations of the impulse response and the frequency response of the continuous-time test system were obtained by linearly interpolating the defining points of the unit-sample response and the frequency response of the discrete-time system. The test system behaved as a linear-phase bandpass filter in the frequency range 0.6 to 2.3 MHz. These frequencies were selected in accordance with the criterion that they were 6 dB below the maximum peak of the amplitude of the frequency response. The output of the system to various inputs was predicted and the results were compared with the corresponding measurements on the system.

Williams, J. H., Jr.↗

NASA NTRS1992

Test and control computer user's guide for a digital beam former test system

A Digital Beam Former Test System was developed to determine the effects of noise, interferers and distortions, and digital implementations of beam forming as applied to the Tracking and Data Relay Satellite 2 (TDRS 2) architectures. The investigation of digital beam forming with application to TDRS 2 architectures, as described in TDRS 2 advanced concept design studies, was conducted by the NASA/Lewis Research Center for NASA/Goddard Space Flight Center. A Test and Control Computer (TCC) was used as the main controlling element of the digital Beam Former Test System. The Test and Control Computer User's Guide for a Digital Beam Former Test System provides an organized description of the Digital Beam Former Test System commands. It is written for users who wish to conduct tests of the Digital Beam forming Test processor using the TCC. The document describes the function, use, and syntax of the TCC commands available to the user while summarizing and demonstrating the use of the commands wtihin DOS batch files.

Alexovich, Robert E.↗

NASA NTRS1993

Digital mammography, cancer screening: Factors important for image compression

The use of digital mammography for breast cancer screening poses several novel problems such as development of digital sensors, computer assisted diagnosis (CAD) methods for image noise suppression, enhancement, and pattern recognition, compression algorithms for image storage, transmission, and remote diagnosis. X-ray digital mammography using novel direct digital detection schemes or film digitizers results in large data sets and, therefore, image compression methods will play a significant role in the image processing and analysis by CAD techniques. In view of the extensive compression required, the relative merit of 'virtually lossless' versus lossy methods should be determined. A brief overview is presented here of the developments of digital sensors, CAD, and compression methods currently proposed and tested for mammography. The objective of the NCI/NASA Working Group on Digital Mammography is to stimulate the interest of the image processing and compression scientific community for this medical application and identify possible dual use technologies within the NASA centers.

Clarke, Laurence P.↗

NASA NTRS1993

Issues for bringing digital libraries into public use

In much the same way that the field of artificial intelligence produced a cult which fervently believed that computers would soon think like human beings, the existence of electronic books has resurrected the paperless society as a utopian vision to some, an apocalyptic horror to others. In this essay we have attempted to provide realistic notions of what digital libraries are likely to become if they are a popular success. E-books are capable of subsuming most of the media we use today and have the potential for added functionality by being interactive. The environmental impact of having millions more computers will be offset to some degree, perhaps even exceeded, by the fact that televisions, stereos, VCR's, CD players, newspapers, magazines, and books will become part of the computer system or be made redundant. On the whole, large-scale use of digital libraries is likely to be a winning proposition. Whether or not this comes to pass depends on the directions taken by today's researchers and software developers. By involving the public, the effort being put into digital libraries can be leveraged into something which is big enough to make a real change for the better. If digital libraries remain the exclusive property of government, universities, and large research firms, then large parts of the world will remain without digital libraries for years to come, just as they have remained without digital phone service for far too long. If software companies try to scuttle the project by patenting crucial algorithms and using proprietary data formats, all of us will suffer. Let us reverse the errors of the past and create a truly open digital library system.

Flater, David W.↗

NASA NTRS1998

High Rate Digital Demodulator ASIC

The architecture of High Rate (600 Mega-bits per second) Digital Demodulator (HRDD) ASIC capable of demodulating BPSK and QPSK modulated data is presented in this paper. The advantages of all-digital processing include increased flexibility and reliability with reduced reproduction costs. Conventional serial digital processing would require high processing rates necessitating a hardware implementation in other than CMOS technology such as Gallium Arsenide (GaAs) which has high cost and power requirements. It is more desirable to use CMOS technology with its lower power requirements and higher gate density. However, digital demodulation of high data rates in CMOS requires parallel algorithms to process the sampled data at a rate lower than the data rate. The parallel processing algorithms described here were developed jointly by NASA's Goddard Space Flight Center (GSFC) and the Jet Propulsion Laboratory (JPL). The resulting all-digital receiver has the capability to demodulate BPSK, QPSK, OQPSK, and DQPSK at data rates in excess of 300 Mega-bits per second (Mbps) per channel. This paper will provide an overview of the parallel architecture and features of the HRDR ASIC. In addition, this paper will provide an over-view of the implementation of the hardware architectures used to create flexibility over conventional high rate analog or hybrid receivers. This flexibility includes a wide range of data rates, modulation schemes, and operating environments. In conclusion it will be shown how this high rate digital demodulator can be used with an off-the-shelf A/D and a flexible analog front end, both of which are numerically computer controlled, to produce a very flexible, low cost high rate digital receiver.

Ghuman, Parminder↗

NASA NTRS2002

Implementation of Adaptive Digital Controllers on Programmable Logic Devices

Much has been made of the capabilities of FPGA's (Field Programmable Gate Arrays) in the hardware implementation of fast digital signal processing. Such capability also makes an FPGA a suitable platform for the digital implementation of closed loop controllers. Other researchers have implemented a variety of closed-loop digital controllers on FPGA's. Some of these controllers include the widely used proportional-integral-derivative (PID) controller, state space controllers, neural network and fuzzy logic based controllers. There are myriad advantages to utilizing an FPGA for discrete-time control functions which include the capability for reconfiguration when SRAM-based FPGA's are employed, fast parallel implementation of multiple control loops and implementations that can meet space level radiation tolerance requirements in a compact form-factor. Generally, a software implementation on a DSP (Digital Signal Processor) or microcontroller is used to implement digital controllers. At Marshall Space Flight Center, the Control Electronics Group has been studying adaptive discrete-time control of motor driven actuator systems using digital signal processor (DSP) devices. While small form factor, commercial DSP devices are now available with event capture, data conversion, pulse width modulated (PWM) outputs and communication peripherals, these devices are not currently available in designs and packages which meet space level radiation requirements. In general, very few DSP devices are produced that are designed to meet any level of radiation tolerance or hardness. The goal of this effort is to create a fully digital, flight ready controller design that utilizes an FPGA for implementation of signal conditioning for control feedback signals, generation of commands to the controlled system, and hardware insertion of adaptive control algorithm approaches. An alternative is required for compact implementation of such functionality to withstand the harsh environment encountered on spacecraft. Radiation tolerant FPGA's are a feasible option for reaching this goal.

Gwaltney, David A.↗

NASA NTRS2004

Performance Effects of Display Incogruity in a Digital and Analog Clock Reading Task

In an era of increasing automation, it is important to design displays and input devices that minimize human error. In this context, information concerning the human response to the detection of incongruous information is important. Such incongruous information can be operationalized as unexpected (perhaps erroneous) information on which a decision by the human or operation by an automated system is based. In the aviation environment, decision making when faced with inadequate, incomplete, or incongruous information may occur in a failure scenario. An additional challenge facing the human operator in automated environments is maintaining alertness or vigilance. The vigilance issue is of particular concern as a factor that may interact with performance when faced with inadequate, incomplete, or incongruous information. From the literature on eye-scan behavior we know that the time spent looking at a particular display or indicator is a function of the type of information one is trying to discern from the display. For example, quick glances are all it takes for confirming that an indicator is in a normal position or range, whereas a continuous look of several seconds may be required for confirmation that a complex control input is having the desired effect. Important to consider is that while an extended look takes place, visual input from other sources may be missed. Much like an extended look, the interpretation of incongruous information may require extra time. The present experiment was designed to explore the performance consequences of a decision making task when incongruous information was presented. For this experiment a display incongruity was created on a subset of trials of a clock reading laboratory task. Display incongruity was made possible through presentation of 'impossible' times (e.g. 1:65 or 11:90). Subjects made 'same' 'different' decisions and keyboard responses to pairings of Analog-Analog (AA), Digital-Digital (DD), and Analog- Digital (AD), display combinations. For trials during which display incongruities were not presented, based on prior research comparing digital and analog clock displays, it would be expected that the Digital-Digital condition would result in the shortest response times and the Analog-Analog and Analog-Digital conditions would have longer response times. The performance consequence expected on trials with incongruous times would be very long response times.

J. Raymond Comstock, Jr.↗

NASA NTRS2008

Customizable Digital Receivers for Radar

Compact, highly customizable digital receivers are being developed for the system described in 'Radar Interferometer for Topographic Mapping of Glaciers and Ice Sheets' (NPO-43962), NASA Tech Briefs, Vol. 31, No. 7 (August 2007), page 72. The receivers are required to operate in unison, sampling radar returns received by the antenna elements in a digital beam-forming (DBF) mode. The design of these receivers could also be adapted to commercial radar systems. At the time of reporting the information for this article, there were no commercially available digital receivers capable of satisfying all of the operational requirements and compact enough to be mounted directly on the antenna elements. A provided figure depicts the overall system of which the digital receivers are parts. Each digital receiver includes an analog-to-digital converter (ADC), a demultiplexer (DMUX), and a field-programmable gate array (FPGA). The ADC effects 10-bit band-pass sampling of input signals having frequencies up to 3.5 GHz. The input samples are demultiplexed at a user-selectable rate of 1:2 or 1:4, then buffered in part of the FPGA that functions as a first-in/first-out (FIFO) memory. Another part of the FPGA serves as a controller for the ADC, DMUX, and FIFO memory and as an interface between (1) the rest of the receiver and (2) a front-panel data port (FPDP) bus, which is an industry-standard parallel data bus that has a high data-rate capability and multichannel configuration suitable for DBF. Still other parts of the FPGA in each receiver perform signal-processing functions. The digital receivers can be configured to operate in a stand-alone mode, or in a multichannel mode as needed for DBF. The customizability of the receiver makes it applicable to a broad range of system architectures. The capability for operation of receivers in either a stand-alone or a DBF mode enables the use of the receivers in an unprecedentedly wide variety of radar systems.

Moller, Delwyn↗

NASA NTRS2011

Architecture for a 1-GHz Digital RADAR

An architecture for a Direct RF-digitization Type Digital Mode RADAR was developed at GSFC in 2008. Two variations of a basic architecture were developed for use on RADAR imaging missions using aircraft and spacecraft. Both systems can operate with a pulse repetition rate up to 10 MHz with 8 received RF samples per pulse repetition interval, or at up to 19 kHz with 4K received RF samples per pulse repetition interval. The first design describes a computer architecture for a Continuous Mode RADAR transceiver with a real-time signal processing and display architecture. The architecture can operate at a high pulse repetition rate without interruption for an infinite amount of time. The second design describes a smaller and less costly burst mode RADAR that can transceive high pulse repetition rate RF signals without interruption for up to 37 seconds. The burst-mode RADAR was designed to operate on an off-line signal processing paradigm. The temporal distribution of RF samples acquired and reported to the RADAR processor remains uniform and free of distortion in both proposed architectures. The majority of the RADAR's electronics is implemented in digital CMOS (complementary metal oxide semiconductor), and analog circuits are restricted to signal amplification operations and analog to digital conversion. An implementation of the proposed systems will create a 1-GHz, Direct RF-digitization Type, L-Band Digital RADAR--the highest band achievable for Nyquist Rate, Direct RF-digitization Systems that do not implement an electronic IF downsample stage (after the receiver signal amplification stage), using commercially available off-the-shelf integrated circuits.

Mallik, Udayan↗

NASA NTRS2013

Advances in Digital Calibration Techniques Enabling Real-Time Beamforming SweepSAR Architectures

Real-time digital beamforming, combined with lightweight, large aperture reflectors, enable SweepSAR architectures, which promise significant increases in instrument capability for solid earth and biomass remote sensing. These new instrument concepts require new methods for calibrating the multiple channels, which are combined on-board, in real-time. The benefit of this effort is that it enables a new class of lightweight radar architecture, Digital Beamforming with SweepSAR, providing significantly larger swath coverage than conventional SAR architectures for reduced mass and cost. This paper will review the on-going development of the digital calibration architecture for digital beamforming radar instrument, such as the proposed Earth Radar Mission's DESDynI (Deformation, Ecosystem Structure, and Dynamics of Ice) instrument. This proposed instrument's baseline design employs SweepSAR digital beamforming and requires digital calibration. We will review the overall concepts and status of the system architecture, algorithm development, and the digital calibration testbed currently being developed. We will present results from a preliminary hardware demonstration. We will also discuss the challenges and opportunities specific to this novel architecture.

TR (Transmit/Receive)↗

NASA NTRS2015

Low-to-Medium Power Single Chip Digital Controlled DC-DC Regulator for Point-of-Load Applications

A DC-DC converter for generating a DC output voltage includes: a digitally controlled pulse width modulator (DPWM) for controlling a switching power stage to supply a varying voltage to an inductor; and a digital voltage feedback circuit for controlling the DPWM in accordance with a feedback voltage corresponding to the DC output voltage, the digital voltage feedback circuit including: a first voltage controlled oscillator for converting the feedback voltage into a first frequency signal and to supply the first frequency signal to a first frequency discriminator; a second voltage controlled oscillator for converting a reference voltage into a second frequency signal and to supply the second frequency signal to a second frequency discriminator; a digital comparator for comparing digital outputs of the first and second frequency discriminators and for outputting a digital feedback signal; and a controller for controlling the DPWM in accordance with the digital feedback signal.

Adell, Philippe C.↗

NASA NTRSDate not supplied

A Natural Language Understanding Approach for Digitizing Aircraft Ground Taxi Instructions

Recent Advancements in spoken language processing technologies have enabled the development of reliable automation tools to assist air traffic control (ATC) operations. These advancements present a unique opportunity to strategically implement digital taxi instructions for aircraft movement on the ground. Digital taxi instructions issue taxiing procedures to pilots as textual or graphical instructions. There are several benefits of digital instructions, including a reduction in radio congestion, elimination of communication errors, and improved aircraft monitoring capabilities. Natural language understanding (NLU) models can extract digital taxi instructions from verbal instructions issued by air traffic controllers. This capability enables the implementation of a digital taxi communication framework with minimal changes to the existing air traffic controller operational environment. We explore a novel application for NLU: automatically generating digital taxi instructions from air traffic controller speech. We describe the development of an annotation scheme to represent (aircraft) ground traffic communications in the US National Airspace System (NAS).Our annotation scheme uses intent classification and slot filling to extract taxi instructions, enabling NLU models to leverage syntactic information. Several neural network models were trained to categorize the controller’s intent and label information relevant to his or her intent.Our research demonstrates that it is feasible to use NLU to automatically generate digitaltaxi instructions, suggesting that it is a powerful tool for the implementation of digital taxi communications.

Hillel Steinmetz↗