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At least 1,603 records · Page 89

System and Method of Locating Lightning Strikes

A system and method of determining locations of lightning strikes has been described. The system includes multiple receivers located around an area of interest, such as a space center or airport. Each receiver monitors both sound and electric fields. The detection of an electric field pulse and a sound wave are used to calculate an area around each receiver in which the lighting is detected. A processor is coupled to the receivers to accurately determine the location of the lighting strike. The processor can manipulate the receiver data to compensate for environmental variables such as wind, temperature, and humidity. Further, each receiver processor can discriminate between distant and local lightning strikes.

Medelius, Pedro J.↗

Progress Toward Generation of a Navier-Stokes Database for a Harrier in Ground Effect

The Harrier YAV-8B aircraft is capable of vertical and short-field take-off and landing (V/STOL) by directing its four exhaust nozzles toward the ground, or conventional flight by rotating its nozzles into a horizontal position. The British Royal Air Force and the United States Marine Corps have used this aircraft for more than 30 years to provide a quick reaction time for troop support, and reduce the need for long runways. The success of this powered-lift (PL) vehicle has also prompted the more recent design of the Joint Strike Fighter (JSF). However there are significant safety issues that must be addressed when operating a PL vehicle in close proximity to the ground. Hot Gas Ingestion (HGI) by the inlets can result in a rapid loss of powered lift; and high-speed jet flows along the ground plane can induce low pressures underneath the vehicle, causing a 'suck-down' effect. Under these conditions, departure from controlled flight may occur. Moreover, unsteady ground vortices and jet fountains can affect the aircraft,s controllability and its proximity to ground troops. The viscous, time-dependent flow fields of PL vehicles are difficult to accurately and efficiently predict using Computational Fluid Dynamics (CFD). A number of researchers have used the time-dependent Reynolds-averaged Navier-Stokes (RANS) equations to compute flows for single and multiple jets in a cross-flow. A few have added some geometric complexity to the problem by computing flows for jet-augmented delta wings near a ground plane. Smith et.al. computed for the first time a single RANS solution about a simplified Harrier. This geometry included a fuselage, wing, leading edge root extension (LERX), inlets, and exhaust nozzles. All of these investigations cite two practical problems with computing these flows: 1) the need for improved solution accuracy; and, 2) the need for faster solution methods. We view the need for faster solution methods as key to improving the solution accuracy and making this class of computation more routine. One can hardly refine grids, explore the use of advanced turbulence models, and generate databases when it takes weeks of dedicated computer time for a single solution. Chaderjian, Ahmad, Pandya, and Murman have focused on reducing the time-to-solution for this very difficult and complex problem through process automation and exploitation of parallel computing. They began with the Harrier geometry reported, and added a deflected wing flap and empennage for greater realism. To date more than 80 solutions have been carried out. This paper will describe this process and progress made in reducing the time required to generate a simple longitudinal force and moment database for a Harrier in ground effect. It shows a typical snap-shot from an unsteady streakline animation, where fluid particles are colored by temperature. The ground vortex and a jet-fountain vortex are highlighted. It also shows a similar streakline image, where HGI occurs due to the vehicle in close proximity to the ground. It is show the mean lift coefficient as a function of angle of attack and height. The angle of attack range was 4 deg less than or = alpha less than or = 10 deg with an increment of 1 degree, and the height range was 10 ft less than or = h less than or = 30ft with an increment of 5 feet. This 35 solution database was extended to over 2500 cases using a monotone cubic-spline interpolation procedure. The suck-down effect (reduction of lift near the ground) is highlighted in the figure. The "cushion effect," the conventional reduction of lift as the vehicle moves out of ground effect, is also indicated. All 35 RANS solutions were obtained using 952 Silicon Graphics Origin 2000 and 3000 processors in dedicated mode for one week. Typically, 112 processors were assigned to each case. Some other cases used fewer processors to utilize all available CPUS. The final paper will report on the automation of the solution process, including: grid generation, job monitoring, solution completion criteria, and post processing. Moreover, improvements in parallel efficiency for a dual time-step algorithm for the RANS equations will also be presented. Results will be discussed in detail using unsteady streakline flow visualization to correlate unsteady flow structures with dominant aerodynamic frequencies. The stability derivatives, CL, and CL, will also be presented.

Chaderjian, Neal M.↗

Scalability of a Low-Cost Multi-Teraflop Linux Cluster for High-End Classical Atomistic and Quantum Mechanical Simulations

Scalability of a low-cost, Intel Xeon-based, multi-Teraflop Linux cluster is tested for two high-end scientific applications: Classical atomistic simulation based on the molecular dynamics method and quantum mechanical calculation based on the density functional theory. These scalable parallel applications use space-time multiresolution algorithms and feature computational-space decomposition, wavelet-based adaptive load balancing, and spacefilling-curve-based data compression for scalable I/O. Comparative performance tests are performed on a 1,024-processor Linux cluster and a conventional higher-end parallel supercomputer, 1,184-processor IBM SP4. The results show that the performance of the Linux cluster is comparable to that of the SP4. We also study various effects, such as the sharing of memory and L2 cache among processors, on the performance.

Kikuchi, Hideaki↗

Comparison of Origin 2000 and Origin 3000 Using NAS Parallel Benchmarks

This report describes results of benchmark tests on the Origin 3000 system currently being installed at the NASA Ames National Advanced Supercomputing facility. This machine will ultimately contain 1024 R14K processors. The first part of the system, installed in November, 2000 and named mendel, is an Origin 3000 with 128 R12K processors. For comparison purposes, the tests were also run on lomax, an Origin 2000 with R12K processors. The BT, LU, and SP application benchmarks in the NAS Parallel Benchmark Suite and the kernel benchmark FT were chosen to determine system performance and measure the impact of changes on the machine as it evolves. Having been written to measure performance on Computational Fluid Dynamics applications, these benchmarks are assumed appropriate to represent the NAS workload. Since the NAS runs both message passing (MPI) and shared-memory, compiler directive type codes, both MPI and OpenMP versions of the benchmarks were used. The MPI versions used were the latest official release of the NAS Parallel Benchmarks, version 2.3. The OpenMP versiqns used were PBN3b2, a beta version that is in the process of being released. NPB 2.3 and PBN 3b2 are technically different benchmarks, and NPB results are not directly comparable to PBN results.

Turney, Raymond D.↗

Navier-Stokes Computations on Commodity Computers

In this paper we discuss and demonstrate the feasibility of solving high-fidelity, nonlinear computational fluid dynamics (CFD) problems of practical interest on commodity machines, namely Pentium Pro PC's. Such calculations have now become possible due to the progress in computational power and memory of the off-the-shelf commodity computers, along with the growth in bandwidth and communication speeds of networks. A widely used CFD code known as TLNS3D, which was developed originally on large shared memory computers was selected for this effort. This code has recently been ported to massively parallel processor (MPP) type machines, where natural partitioning along grid blocks is adopted in which one or more blocks are distributed to each of the available processors. In this paper, a similar approach is adapted to port this code to a cluster of Pentium Pro computers. The message passing among the processors is accomplished through the use of standard message passing interface (MPI) libraries. Scaling studies indicate fairly high level of parallelism on such clusters of commodity machines, thus making solutions to Navier-Stokes equations for practical problems more affordable.

Vatsa, Veer N.↗

High Level Design Proof of a Reliable Computing Platform

An architecture for fault-tolerant computing is formalized and shown to satisfy a key correctness property. The reliable computing platform uses replicated processors and majority voting to achieve fault tolerance. Under the assumption of a majority of processors working in each frame, we show that the replicated system computes the same results as a single processor system not subject to failures. Sufficient conditions are obtained to establish that the replicated system recovers from transient faults within a bounded amount of time. Three different voting schemes are examined and proved to satisfy the bounded recovery time conditions.

DiVito, Ben L.↗

Real Time Calibration Method for Signal Conditioning Amplifiers

A signal conditioning amplifier receives an input signal from an input such as a transducer. The signal is amplified and processed through an analog to digital converter and sent to a processor. The processor estimates the input signal provided by the transducer to the amplifier via a multiplexer. The estimated input signal is provided as a calibration voltage to the amplifier immediately following the receipt of the amplified input signal. The calibration voltage is amplified by the amplifier and provided to the processor as an amplified calibration voltage. The amplified calibration voltage is compared to the amplified input signal, and if a significant error exists, the gain and/or offset of the amplifier may be adjusted as necessary.

Pedro J Medelius↗

An Application-Based Performance Characterization of the Columbia Supercluster

Columbia is a 10,240-processor supercluster consisting of 20 Altix nodes with 512 processors each, and currently ranked as the second-fastest computer in the world. In this paper, we present the performance characteristics of Columbia obtained on up to four computing nodes interconnected via the InfiniBand and/or NUMAlink4 communication fabrics. We evaluate floating-point performance, memory bandwidth, message passing communication speeds, and compilers using a subset of the HPC Challenge benchmarks, and some of the NAS Parallel Benchmarks including the multi-zone versions. We present detailed performance results for three scientific applications of interest to NASA, one from molecular dynamics, and two from computational fluid dynamics. Our results show that both the NUMAlink4 and the InfiniBand hold promise for application scaling to a large number of processors.

Biswas, Rupak↗

Single-Event Upset and Scaling Trends in New Generation of the Commercial SOI PowerPC Microprocessors

SEU from heavy-ions is measured for SOI PowerPC microprocessors. Results for 0.13 micron PowerPC with 1.1V core voltages increases over 1.3V versions. This suggests that improvement in SEU for scaled devices may be reversed. In recent years there has been interest in the possible use of unhardened commercial microprocessors in space because of their superior performance compared to hardened processors. However, unhardened devices are susceptible to upset from radiation space. More information is needed on how they respond to radiation before they can be used in space. Only a limited number of advanced microprocessors have been subjected to radiation tests, which are designed with lower clock frequencies and higher internal core voltage voltages than recent devices [1-6]. However the trend for commercial Silicon-on-insulator (SOI) microprocessors is to reduce feature size and internal core voltage and increase the clock frequency. Commercial microprocessors with the PowerPC architecture are now available that use partially depleted SOI processes with feature size of 90 nm and internal core voltage as low as 1.0 V and clock frequency in the GHz range. Previously, we reported SEU measurements for SOI commercial PowerPCs with feature size of 0.18 and 0.13 m [7, 8]. The results showed an order of magnitude reduction in saturated cross section compared to CMOS bulk counterparts. This paper examines SEUs in advanced commercial SOI microprocessors, focusing on SEU sensitivity of D-Cache and hangs with feature size and internal core voltage. Results are presented for the Motorola SOI processor with feature sizes of 0.13 microns and internal core voltages of 1.3 and 1.1 V. These results are compared with results for the Motorola SOI processors with feature size of 0.18 microns and internal core voltage of 1.6 and 1.3 V.

Irom, Farokh↗

Radiation Hardened Electronics for Extreme Environments

The Radiation Hardened Electronics for Space Environments (RHESE) project consists of a series of tasks designed to develop and mature a broad spectrum of radiation hardened and low temperature electronics technologies. Three approaches are being taken to address radiation hardening: improved material hardness, design techniques to improve radiation tolerance, and software methods to improve radiation tolerance. Within these approaches various technology products are being addressed including Field Programmable Gate Arrays (FPGA), Field Programmable Analog Arrays (FPAA), MEMS Serial Processors, Reconfigurable Processors, and Parallel Processors. In addition to radiation hardening, low temperature extremes are addressed with a focus on material and design approaches.

Keys, Andrew S.↗

Use of Field Programmable Gate Array Technology in Future Space Avionics

Fulfilling NASA's new vision for space exploration requires the development of sustainable, flexible and fault tolerant spacecraft control systems. The traditional development paradigm consists of the purchase or fabrication of hardware boards with fixed processor and/or Digital Signal Processing (DSP) components interconnected via a standardized bus system. This is followed by the purchase and/or development of software. This paradigm has several disadvantages for the development of systems to support NASA's new vision. Building a system to be fault tolerant increases the complexity and decreases the performance of included software. Standard bus design and conventional implementation produces natural bottlenecks. Configuring hardware components in systems containing common processors and DSPs is difficult initially and expensive or impossible to change later. The existence of Hardware Description Languages (HDLs), the recent increase in performance, density and radiation tolerance of Field Programmable Gate Arrays (FPGAs), and Intellectual Property (IP) Cores provides the technology for reprogrammable Systems on a Chip (SOC). This technology supports a paradigm better suited for NASA's vision. Hardware and software production are melded for more effective development; they can both evolve together over time. Designers incorporating this technology into future avionics can benefit from its flexibility. Systems can be designed with improved fault isolation and tolerance using hardware instead of software. Also, these designs can be protected from obsolescence problems where maintenance is compromised via component and vendor availability.To investigate the flexibility of this technology, the core of the Central Processing Unit and Input/Output Processor of the Space Shuttle AP101S Computer were prototyped in Verilog HDL and synthesized into an Altera Stratix FPGA.

Ferguson, Roscoe C.↗

Clean Water for Remote Locations

Marshall Space Flight Center engineers are working on creating the Regenerative Environmental Control and Life Support System, a complex system of devices intended to sustain the astronauts living on the ISS and, in the future, sustain those who are blasting off to the Moon or Mars. The devices make use of the available resources, by turning wastewater from respiration, sweat, and urine into drinkable water. One of the devices that Marshall has been working on is the Water Recovery System (WRS). Marshall has teamed with long-time NASA contractor, Hamilton Sundstrand Space Systems International, Inc., of Windsor Locks, Connecticut. Hamilton Sundstrand, the original designer of the life support devices for the space suits, developed the Water Processor Assembly (WPA). It, along with the Urine Processor Assembly (UPA) developed by Marshall, combines to make up the total system, which is about the size of two refrigerators, and will support up to a six-member crew. The system is currently undergoing final testing and verification. "The Water Processor Assembly can produce up to about 28 gallons of potable recycled water each day," said Bob Bagdigian, Marshall Regenerative Environmental Control and Life Support System project manager. After the new systems are installed, annual delivered water to the ISS should decrease by approximately 15,960 pounds, or about 1,600 gallons.

Source record↗

Method and device for maximizing memory system bandwidth by accessing data in a dynamically determined order

A data processing system is disclosed which comprises a data processor and memory control device for controlling the access of information from the memory. The memory control device includes temporary storage and decision ability for determining what order to execute the memory accesses. The compiler detects the requirements of the data processor and selects the data to stream to the memory control device which determines a memory access order. The order in which to access said information is selected based on the location of information stored in the memory. The information is repeatedly accessed from memory and stored in the temporary storage until all streamed information is accessed. The information is stored until required by the data processor. The selection of the order in which to access information maximizes bandwidth and decreases the retrieval time.

Wulf, William A.↗

Configuration control of seven degree of freedom arms

A seven-degree-of-freedom robot arm with a six-degree-of-freedom end effector is controlled by a processor employing a 6-by-7 Jacobian matrix for defining location and orientation of the end effector in terms of the rotation angles of the joints, a 1 (or more)-by-7 Jacobian matrix for defining 1 (or more) user-specified kinematic functions constraining location or movement of selected portions of the arm in terms of the joint angles, the processor combining the two Jacobian matrices to produce an augmented 7 (or more)-by-7 Jacobian matrix, the processor effecting control by computing in accordance with forward kinematics from the augmented 7-by-7 Jacobian matrix and from the seven joint angles of the arm a set of seven desired joint angles for transmittal to the joint servo loops of the arms. One of the kinematic functions constrains the orientation of the elbow plane of the arm. Another one of the kinematic functions minimizing a sum of gravitational torques on the joints. Still another one of the kinematic functions constrains the location of the arm to perform collision avoidance. Generically, one of the kinematic functions minimizes a sum of selected mechanical parameters of at least some of the joints associated with weighting coefficients which may be changed during arm movement. The mechanical parameters may be velocity errors or position errors or gravity torques associated with individual joints.

Seraji, Homayoun↗

Plural-wavelength flame detector that discriminates between direct and reflected radiation

A flame detector employs a plurality of wavelength selective radiation detectors and a digital signal processor programmed to analyze each of the detector signals, and determine whether radiation is received directly from a small flame source that warrants generation of an alarm. The processor's algorithm employs a normalized cross-correlation analysis of the detector signals to discriminate between radiation received directly from a flame and radiation received from a reflection of a flame to insure that reflections will not trigger an alarm. In addition, the algorithm employs a Fast Fourier Transform (FFT) frequency spectrum analysis of one of the detector signals to discriminate between flames of different sizes. In a specific application, the detector incorporates two infrared (IR) detectors and one ultraviolet (UV) detector for discriminating between a directly sensed small hydrogen flame, and reflections from a large hydrogen flame. The signals generated by each of the detectors are sampled and digitized for analysis by the digital signal processor, preferably 250 times a second. A sliding time window of approximately 30 seconds of detector data is created using FIFO memories.

Hall, Gregory H.↗

Fluid leakage detector for vacuum applications

A leak detection system for use with a fluid conducting system in a vacuum environment, such as space, is described. The system preferably includes a mesh-like member substantially disposed about the fluid conducting system, and at least one sensor disposed within the mesh-like member. The sensor is capable of detecting a decrease in temperature of the mesh-like member when a leak condition causes the fluid of the fluid conducting system to freeze when exposed to the vacuum environment. Additionally, a signal processor in preferably in communication with the sensor. The sensor transmits an electrical signal to the signal processor such that the signal processor is capable of indicating the location of the fluid leak in the fluid conducting system.

Farkas, Tibor↗

Method and structure for minimizing error sources in image and position sensing detectors

A method and structure for minimizing one or more non-uniformities in image and position sensing detectors are provided. The structure is directed to a focal plane processor for removing non-uniformities which distort the computation of a desired property of an object of interest in an image field. The focal plane processor is capable of selectively disconnecting one or more rows and/or columns from further processing in the imaging array for those rows and/or columns which contribute to the presence of at least one non-uniformity in a video image generated by the focal plane processor. In one embodiment, the disconnection means is embodied as pre-processing circuitry which includes row and column shift registers which provide control signals to area-of-interest (AOI) switches. In another embodiment, the pixels which comprise the focal plane array are constructed in a manner which facilitates their individual isolation.

Strohbehn, Kim↗

Fiber optic sensors for gas turbine control

An apparatus for detecting flashback occurrences in a premixed combustor system having at least one fuel nozzle includes at least one photodetector and at least one fiber optic element coupled between the at least one photodetector and a test region of the combustor system wherein a respective flame of the fuel nozzle is not present under normal operating conditions. A signal processor monitors a signal of the photodetector. The fiber optic element can include at least one optical fiber positioned within a protective tube. The fiber optic element can include two fiber optic elements coupled to the test region. The optical fiber and the protective tube can have lengths sufficient to situate the photodetector outside of an engine compartment. A plurality of fuel nozzles and a plurality of fiber optic elements can be used with the fiber optic elements being coupled to respective fuel nozzles and either to the photodetector or, wherein a plurality of photodetectors are used, to respective ones of the plurality of photodetectors. The signal processor can include a digital signal processor.

Shu, Emily Yixie↗