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At least 1,441 records · Page 80

Synchrophasor Data Anomaly Detection on Grid Edge by 5G Communication and Adjacent Compute

The fifth-generation mobile communication (5G) technology offers the opportunities to enhance the grid real-time monitoring. The 5G-enabled phasor measurement units (PMUs) features flexible positioning and cost-effective long-term maintenance, without constraints of fixing wire. This paper is the first to demonstrate the applicability of 5G in PMU communication, and the experiment was carried out at Verizon non-standalone testbed at Pacific Northwest National Laboratory (PNNL) Advanced Wireless Communication lab. The performance of 5G-enabled PMU communication setup is reviewed and discussed in this paper, and the paper presents a real-time dynamic linear model (DML) based synchrophasor data anomaly detection application. Last but not least, the practicability of implementing 5G for wide-area protection strategies is explored and discussed by analyzing the experimental results.

5G, Synchrophasor data, machine learning, anomaly ↗

A New Configuration of Paralleled Modular ANPC Multilevel Converter Controlled by an Improved Modulation Method for 1 MHz, 1 MW EV Charger

In this work, a new configuration of the modular multilevel converter (MLC) based on the parallel connection of three-level active-neutral-point-clamped (3L-ANPC) cells as well as its improved modulation method is proposed for 1 MHz, 1 MW electric vehicle (EV) megacharger. In the proposed paralleled modular ANPC-MLC, only six high-frequency silicon carbide (SiC) power switches operating at 333 kHz are required to generate 1 MHz switching frequency spectrum. Moreover, the operating voltage of all power devices is halved, the magnitude of the first switching frequency harmonic cluster is decreased by the factor of five, and the load current is equally distributed between the 3L-ANPC legs by employing the proposed improved modulation method. Hence, the modularity, efficiency, and power density of the proposed converter are notably increased, whereas the value of passive components and the overall switching loss are remarkably decreased. In addition, an optimized design of the one 3L-ANPC cell of the proposed paralleled modular ANPC-MLC for 1 MHz, 1MW EV megacharger using Ansys SIwave, Icepak, and Q3D finite element method platforms is presented and analyzed in detail. The provided experimental results of the down-scaled setup verify the feasibility and viability of the proposed configuration as well as its improved switching pattern.

42 ENGINEERING↗

Performance Testing and Assessment of Protection Scheme Using Real-Time Hardware-in-the-Loop and IEC 61850 Standard

The main challenge of the microgrid is to design a suitable protection scheme due to the complexity of the architecture of the microgrid. The importance of the proposed protection technique is threefold. First, it presents a co-simulation platform to integrate between a simulated model on power system computer aided design (PSCAD)/real time digital simulator computer aided design (RSCAD) software’s and physical devices schweitzer engineering laboratories (SEL) 421-7 relays to protect the microgrid that includes different resources connected based on inverter interface. Second, it presents a comprehensive hardware/software setup to test the protective relays in a closed loop system and shows how to configure the protective relay’s International Electrotechnical Commission 61850 communications. Third, IEEE 1588 standard is used to provide sub nanoseconds latency between the simulated model that emulated on real time digital simulator (RTDS) and the external devices. Also, the measurement signals are synchronized between RTDS and the external devices using giga-transceiver synchronization card (GTSYNC) interface card and SEL-2488 satellite-synchronized network clock. The results showed that the co-simulation infrastructure introduces a highly dependable design, analysis, and testing environment for cyber and physical data flow in the system. Besides that, the voltages at ac/dc sides and frequency at fault condition were maintained due to the energy storage device contributions at different modes of operation.

42 ENGINEERING↗

Port Impedance Measurement and Current Injection Response Analysis for PLCs

Programmable Logic Controllers (PLCs) are used to control devices throughout the power system since they have fast control capabilities and can utilize multiple types of communication interfaces. Therefore, studying and mitigating their vulnerabilities to electromagnetic pulse is important for the reliability of PLC operations. Here, in this paper, an effective impedance measurement scheme is proposed and demonstrated for three PLCs to estimate their susceptibility to an electromagnetic pulse. The equivalent non-uniform transmission line model is established to eliminate the impact of the fixture in the de-embedding process. Then different parameters of the impedance measurement setup are explored. Based on the measured impedance, the equivalent circuit is established to calculate the response of the device when subjected to the electromagnetic pulse. The voltage and current responses of different interfaces are compared utilizing the developed pulsed Current Injection (CI) method. Finally, the impedance measurement scheme is verified through testing using three measuring instruments. And the CI simulation experiments reveal the characteristics and susceptibilities of different PLCs interfaces, indicating that some protection measures are required for the reliable operation of the PLC.

42 ENGINEERING↗

Real-Time Hardware-in-The-Loop Implementation of Protection and Self-Healing of Microgrids

The design of a reliable protection scheme for microgrids often requires communication between protective devices and microgrid controllers. The authors have developed such a communication assisted scalable protection scheme with a self healing feature to protect a microgrid with 100% Inverter Based Resources (IBRs). The communication assisted scheme must be validated in real time with cyber physical co-simulation for successful demonstration. In this regard, the paper presents a co-simulation platform between a simulated power system model using RTDS and physical protective devices. The primary protection of the scheme is programmed in SEL 421-7 relay and backup protection is programmed in MATLAB on a generic computer acting as a microgrid controller. The IEC 61850 models are used to communicate between SEL-421-7 relay and RTDS, whereas TCP/IP communication connects the microgrid controller to RTDS. The paper’s focus is to demonstrate the co- simulation platform with communication links established using both protocols and validate the proposed scheme in real-time on the IEEE 123 node distribution feeder. The paper explains the configuration of the IEC 61850 and TCP/IP communications as the interface requires proper hardware and software setup. Furthermore, the real time performance indicates the Hardware In the Loop (HIL) framework as a competent testing environment for the developed protection scheme for microgrids.

42 ENGINEERING↗

Thermal Management System for an Electric Machine With Additively Manufactured Hollow Conductors With Integrated Heat Pipes

Here, this paper discusses steps taken to develop a novel thermal management system for an aircraft propulsion electric machine containing additively manufactured coils integrated with heat pipes aimed at boosting its specific power. Experimental setups are used to size and characterize heat pipes for the application and 3D thermal finite element analysis is used to determine optimum heat transfer coefficient of the convective boundaries. For some of the convective boundaries, fin-based surface area enhancement is required to reach a target combined overall heat transfer coefficient and surface area performance (UA). This enhancement is worked out using a combination of the Engineering Equation Solver tool and 3D thermal FEA. The thermal management system's UA, and by extension its specific power, sensitivity to coolant temperature is explored. Temperature distribution plots of optimized machine components are also presented and discussed. Lastly, additional heat pipe testing is carried out to study its maximum heat transfer capability's sensitivity to condenser coolant temperature and configuration.

32 ENERGY CONSERVATION, CONSUMPTION, AND UTILIZATI↗

Development of a Hardware-in-The-Loop Testbed for a Decentralized, Data-Driven Electric Vehicle Charging Control Algorithm

This study presents the design of an electric vehicle (EV)-grid integration (EVGI) hardware test-bed to implement smart EV charging algorithms. Here, the proposed test-bed also allows to create different grid events via flexible integration of other power hardware (e.g., controllable loads and battery energy storage systems) and test their impacts on EV charging. The design uses a real-time digital simulator to realize a complex distribution grid model with primary and secondary networks. A grid simulator physically realizes the selected nodes of the simulated grid to power an actual EV, forming a hardware-in-the-loop (HIL) test setup. The EV-grid integration is demonstrated based on the custom hardware and software implementation of the J1772 charging protocol using dSPACE MicroLabBox, operating as a custom EV Supply Equipment (EVSE). The HIL test-bed features a novel testing platform for accurate implementation and analysis of scalable charging algorithms. To this end, a data-driven, decentralized, model-free charging controller based on the Additive Increase and Multiplicative Decrease (AIMD) algorithm is presented and validated on an EV using the HIL test-bed. We tested the proposed algorithm under various case studies, and presented a comparison study with an existing droop-based, decentralized charging solution. The results showed that the EV successfully performed charging commands generated by the EVSE and regulated its charging power to effectively reduce the system loading caused by high EV penetration.

33 ADVANCED PROPULSION SYSTEMS↗

Development and Evaluation of a Cost-Effective Behind-the-Meter Synchronized Measurement Unit for Enhanced Grid Integration

This paper presents the development of the Inverter Based Resource Monitor (IBRM), an innovative behind-the-meter synchronized measurement unit (SMU) tailored for integration with inverter-based resources (IBRs). The IBRM distinguishes itself as a highly accurate and cost-effective SMU, offering facile deployment and connectivity to IBRs. It is equipped to conduct real-time voltage and current waveform analyses, serving as a phasor measurement unit (PMU) with exceptionally rapid synchrophasor transmission capabilities. The device incorporates a cutting-edge dual-core architecture designed to minimize sampling delays inherent to its microprocessor, thereby enhancing the precision of synchronized waveform measurements. Moreover, the IBRM is adept at recording high-fidelity waveform data, capturing nuances such as waveform distortions, high-order harmonics, and wide-band oscillations prevalent in power grids with substantial IBR presence. A prototype of the IBRM has been constructed and subjected to rigorous testing to assess its functional capabilities and measurement precision, utilizing both idealized signal generators and a real-world off-grid inverter setup as benchmarks.

Wu, Ori [ORNL] (ORCID:0000000326723410)↗

Real-time Electromagnetic Transient Simulation of Multi-Terminal HVDC-AC Grids based on GPU

High-fidelity electromagnetic transient (EMT) simulation plays a critical role in understanding the dynamic behavior and fast transients involved in operation, control, and protection of Multi-Terminal dc (MTdc) grids. Here, this paper proposes a cost-effective high-performance real-time EMT simulation platform for large-scale cross-continental MTdc grids based on graphics processing unit (GPU). The proposed simulation platform: i) assembles detailed EMT models of all components within an MTdc-ac grid into a single platform. This setup provides a complete simulation solution to capture fast transient signals required for high-bandwidth controller design and protection studies without any compromise; ii) implements the first GPU-based simulation architecture and corresponding algorithms for MTdc-ac grids with real-time performance at scales of 1s; iii) is highly-efficient and balances the high utilization of GPU resources and low latency required for the simulation; and iv) outperforms the existing central processing unit (CPU)- or digital signal processor (DSP)/field-programmable gate array (FPGA)-based simulators in terms of its higher scalability on large-scale MTdc-ac grids and superior price-performance ratio on the hardware. Accuracy and performance of the proposed platform are evaluated with respect to the reference results from PSCAD/EMTDC environment.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Buyers Collusion in Incentivized Forwarding Networks: A Multi-Agent Reinforcement Learning Study

We present the issue of monetarily incentivized forwarding in a multi-hop mesh network architecture from an economic perspective. It is anticipated that credit-incentivized forwarding and relaying will be a simple method of exchanging transmission power and spectrum for connectivity. However, gateways and forwarding nodes, like any other free market, may create an oligopolistic market for the users they serve. In this study, a coalition scheme between buyers aims to address price control by gateways or nodes closer to gateways. In a Stackelberg competition game, buyer agents (users) and sellers (gateways) make decisions using reinforcement learning (RL), with decentralized Deep Q-Networks to buy and sell forwarding resources. We allow communication links between the buyers with a limited messaging space, without defining a collusion mechanism. The idea is to demonstrate that through messaging, and RL tacit collusion can emerge between agents in a decentralized setup. The multi-agent reinforcement learning (MARL) system is presented and analyzed from a machine-learning perspective. Moreover, MARL dynamics are discussed via mean field analysis to better understand divergence causes and make implementation recommendations for such systems. Finally, the simulation results show the results of coordination among the users.

42 ENGINEERING↗

Cooling and Timing Tests of the ATLAS Fast TracKer VME Boards

The Fast TracKer (FTK) is an ATLAS trigger upgrade built for full-event, low-latency, high-rate tracking. The FTK core, made of 9U VME boards, performs the most demanding computational task. The associative memory board (AMB) serial link processor and the auxiliary card (AUX), plugged on the front and back sides of the same VME slot, constitute the processing unit (PU), which finds tracks using hits from eight layers of the inner detector. The PU works in pipeline with the second stage board (SSB), which finds 12-layer tracks by adding extra hits to the identified tracks. In the designed configuration, 16 PUs and four SSBs are installed in a VME crate. The high power consumption of the AMB, AUX, and SSB (respectively, of about 250, 70, and 160 W per board) required the development of a custom cooling system. Even though the expected power consumption for each VME crate of the FTK system is high compared with a common VME setup, the 8 FTK core crates will use ≈60 kW, which is just a fraction of the power and the space needed for a CPU farm performing the same task. We report on the integration of 32 PUs and eight SSBs inside the FTK system, on the infrastructures needed to run and cool them, and on the tests performed to verify the system processing rate and the temperature stability at a safe value.

72 PHYSICS OF ELEMENTARY PARTICLES AND FIELDS↗

A Custom Low-Noise Silicon Photodiode Detector Designed for Use With X-Ray Capillary Optics

We present the first results of a custom low-noise silicon photodiode detector designed for use with X-ray capillary optics. This system is intended to perform as a smaller, lighter, and low-powered alternative to currently existing X-ray telescope technologies. The detector has an active area with a diameter of 100 μm, and its small size leads to a low capacitance of well under 1 pF and a leakage current of 1 pA or less at the depletion voltage. We tested the detector with both a discrete preamp and an ultralow-noise front-end application-specific integrated circuit (ASIC). The front-end ASIC, developed at Brookhaven National Laboratory, was designed for low-capacitance detectors but had not been previously tested with a detector. Here, we discuss the detector design, the experimental setup, and the resulting detector performance. Using radioactive laboratory sources, we measure a full-width at half-maximum (FWHM) of 211 ± 8 eV at 5.9 keV with the ASIC and are able to set the threshold as low as 0.6 keV.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

X-Ray and Particle Detection With the Si(Li) Tracker Module of the GAPS Experiment

Here, this work describes the architecture and the experimental results from the characterization of the lithium-drifted silicon (Si(Li)) detector module, which constitutes the building block of the tracker in the general antiparticle spectrometer (GAPS) experiment to search for dark matter. The instrument is designed for the identification of low-energy cosmic anti-nuclei (antiprotons, antideuterons, and antihelium) to be performed during an Antarctic long-duration balloon flight scheduled for late 2025. The GAPS Si(Li) tracker, that is the core of the instrument, is the assembly of 252 modules, each comprised of four Si(Li) detectors and a full custom-integrated circuit designed for detector readout and produced in a commercial 180-nm planar CMOS technology. A general overview of the detector module architecture and its components is provided, together with a description of the test setup and the experimental results obtained from the characterization of the low-noise analog readout channel. In order to verify the effective operation of the entire module, results concerning the detection of X-rays from a 241Am source and cosmic muons are also provided.

Manghisoni, Massimo [Università di Bergamo (Italy)↗

Improved Double Pulse Test for Accurate Dynamic Characterization of Medium Voltage SiC Devices

This article presents an improved double pulse test (DPT) for accurate dynamic characterization of the medium voltage (MV) silicon carbide device. The difference between low voltage (LV) and MV DPT setup grounding is first introduced, which results in different measurement considerations. Then, parasitic capacitances in the DPT and their impact on the DPT are discussed considering different grounding points and device connections. Approaches are proposed to minimize the impact of parasitic capacitances on DPT results. In addition, the impact of switching V-I timing alignment on the testing results is discussed, compared to that in the LV DPT; a V-I alignment approach is introduced for the MV DPT. A 10 kV/20 A SiC mosfet -based DPT is taken as an example of the improved DPT, and test results show that it can minimize the impact from parasitic and improve the accuracy of the device switching loss estimation.

42 ENGINEERING↗

Output Capacitance Loss of GaN HEMTs in Steady-State Switching

The output capacitance (C OSS ) loss, a loss produced when the device’s output capacitor is charged and discharged, has become a concern for GaN high electron mobility transistors (HEMTs) in high-frequency applications. This work presents a new, easy-to-implement method for the C OSS loss characterization based on the unclamped inductive switching (UIS) setup. As compared to prior approaches, this method involves the device’s ON-state conduction and could measure the C OSS loss in a single pulse and the steady-state switching. The C OSS loss of three types of mainstream commercial GaN HEMTs is characterized, which exhibit some common dependencies including a non-monotonic relation with the dv/dt (or resonance frequency), a linear relation with the ON-state current, a power-law relation with the peak blocking voltage, and little temperature dependence. In addition, their C OSS losses all show minimal distinctions in a single pulse and the steady-state switching, despite the increased on-resistance in the steady-state switching. Furthermore, this suggests that the traps accounting for the C OSS loss possess different de-trapping time constants as compared to the traps governing the dynamic on-resistance. Finally, a unified model is established to describe the C OSS loss of all three types of GaN HEMTs. These results provide important references for the high-frequency application of GaN HEMTs and new insights into the physical origin of their C OSS loss.1

42 ENGINEERING↗

Large-Signal Stability of Phase-Balanced Equilibria in Single-Phase Grid-Forming Inverter Systems

This article explores the setup where large numbers of single-phase grid-forming inverters with droop control across distribution networks self-organize into a stable and balanced system with 120° phase offsets across aggregates in the absence of balanced three-phase generating resources or external communication. A suite of circuit- and system-theoretic notions are leveraged to derive a dynamical model for phase-angle differences across aggregates of inverters connected in the three phases. Focusing on this model, large-signal stability is established and the region of attraction of the phase-balanced equilibria is determined with the aid of a Lyapunov function. Experimental validation for a bench-top prototype network is included to support the analytical developments. Altogether, the effort supports the vision of facilitating balanced operation of distribution networks with grid-forming inverters during service disruptions at the bulk transmission network.

Droop control↗