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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 1,441 records · Page 80

High-resolution CCD imagers using area-array CCD's for sensing spectral components of an optical line image

CCD imagers with a novel replicated-line-imager architecture are abutted to form an extended line sensor. The sensor is preceded by optics having a slit aperture and having an optical beam splitter or astigmatic lens for projecting multiple line images through an optical color-discriminating stripe filter to the CCD imagers. A very high resolution camera suitable for use in a satellite, for example, is thus provided. The replicated-line architecture of the imager comprises an area-array CCD, successive rows of which are illuminated by replications of the same line segment, as transmitted by respective color filter stripes. The charge packets formed by accumulation of photoresponsive charge in the area-array CCD are read out row by row. Each successive row of charge packets is then converted from parallel to serial format in a CCD line register and its amplitude sensed to generate a line of output signal.

Elabd, Hammam↗

Power-processing unit

Power-processing unit uses AC buses (30, 32) to supply all current dependent needs such as connections (54, 56) to an ion thruster through an inductor (88) and the primary of a transformer (90), to assure limited currents to such loads. Where temperature control is also required, such as to the main discharge vaporizer heater connection (36, 38), switches (100, 102) are serially connected with inductor (96) and the primary of transformer (98). Temperature sensor (104) controls the switches (100, 102) for temperature regulation.

Wessel, Frank J.↗

CCD imager with photodetector bias introduced via the CCD register

An infrared charge-coupled-device (IR-CCD) imager uses an array of Schottky-barrier diodes (SBD's) as photosensing elements and uses a charge-coupled-device (CCD) for arranging charge samples supplied in parallel from the array of SBD's into a succession of serially supplied output signal samples. Its sensitivity to infrared (IR) is improved by placing bias charges on the Schottky barrier diodes. Bias charges are transported to the Schottky barrier diodes by a CCD also used for charge sample read-out.

Kosonocky, Walter F.↗

Method and apparatus for transmitting data

A method and apparatus for transmitting a byte-organized serial data stream from a transmitting station to a receiving station that may employ byte boundaries different than the transmitting station. The technique includes sending N different data streams from the remote terminal, where N is the number of different framing alignments that may be imposed on the unframed data stream by the network. The different data streams are chosen so that one will be framed by the network as the intended data stream regardless of which framing alignment is actually imposed.

Schroeder, George L.↗

Tri-state logic circuit

A line driver including a pair of complementary transistors having their conduction paths serially connected between an operating and a reference potential and their bases connected through a first switch to a signal input terminal. A second switch is connected between the common base connection and the common connection of the conduction paths. With the second switch open and the first closed, an output voltage, responsive to the input signal, corresponding to first or second binary values is obtained. When the second switch is closed and the first opened, the transistor pair is turned off, disconnecting the line driver from its load, thereby providing tri-state logic operation.

Pryor, Richard Lee↗

Implementation of a Coded Modulation for Deep Space Optical Communications

We present an efficient implementation of a coded modulation for the deep space optical channel. NASA designed this so called serially concatenated pulse position modulation (SCPPM) code to provide an optical link that can operate within one dB signal energy of the Shannon capacity during a nominal mission condition from Mars. Here, we describe some of the challenges in realizing the SCPPM decoder on a field-programmable gate array (FPGA). Through various architectural optimizations, we achieve a 6 Mbps decoder on a single FPGA. Moreover, we demonstrate that it is possible to communicate reliably on an efficient bits-per-photon count in an end-to-end SCPPM coded system.

turbo codes↗

Accumulate Repeat Accumulate Coded Modulation

In this paper we propose an innovative coded modulation scheme called 'Accumulate Repeat Accumulate Coded Modulation' (ARA coded modulation). This class of codes can be viewed as serial turbo-like codes, or as a subclass of Low Density Parity Check (LDPC) codes that are combined with high level modulation. Thus at the decoder belief propagation can be used for iterative decoding of ARA coded modulation on a graph, provided a demapper transforms the received in-phase and quadrature samples to reliability of the bits.

coded modulation↗

Implementation of a Coded Modulation for Deep Space Optical Communications

We present a field programmable gate array code (FPGA) implementation of a turbo-like decoder for a serially concatenated pulse-position modulation (SCPPM) code. NASA a developed this coded modulation scheme for deep space communications from Mars. Under a nominal mission condition, the decoder complexity by iteratively decoding the modulation and SCPPM coded system can operate within a one dB signal energy gap from capacity. The structure of SCPPM makes direct application of the conventional turbo decoding algorithm very inefficient. Here, we describe techniques to increase the throughput and performance of a hardware SCPPM decoder. using our optimizations, we demonstrate a 6 mega-bits per second (Mbps) decoder realization on a single FPGA. Extension toa higher data rate decoder using multiple FPGAs is readily achievable. Similar codes designed for the optical channel can benefit from our optimization techniques.

modulation↗

The 2004 NASA Aerospace Battery Workshop

Topics covered include: Super NiCd(TradeMark) Energy Storage for Gravity Probe-B Relativity Mission; Hubble Space Telescope 2004 Battery Update; The Development of Hermetically Sealed Aerospace Nickel-Metal Hydride Cell; Serial Charging Test on High Capacity Li-Ion Cells for the Orbiter Advanced Hydraulic Power System; Cell Equalization of Lithium-Ion Cells; The Long-Term Performance of Small-Cell Batteries Without Cell-Balancing Electronics; Identification and Treatment of Lithium Battery Cell Imbalance under Flight Conditions; Battery Control Boards for Li-Ion Batteries on Mars Exploration Rovers; Cell Over Voltage Protection and Balancing Circuit of the Lithium-Ion Battery; Lithium-Ion Battery Electronics for Aerospace Applications; Lithium-Ion Cell Charge Control Unit; Lithium Ion Battery Cell Bypass Circuit Test Results at the U.S. Naval Research Laboratory; High Capacity Battery Cell By-Pass Switches: High Current Pulse Testing of Lithium-Ion; Battery By-Pass Switches to Verify Their Ability to Withstand Short-Circuits; Incorporation of Physics-Based, Spatially-Resolved Battery Models into System Simulations; A Monte Carlo Model for Li-Ion Battery Life Projections; Thermal Behavior of Large Lithium-Ion Cells; Thermal Imaging of Aerospace Battery Cells; High Rate Designed 50 Ah Li-Ion Cell for LEO Applications; Evaluation of Corrosion Behavior in Aerospace Lithium-Ion Cells; Performance of AEA 80 Ah Battery Under GEO Profile; LEO Li-Ion Battery Testing; A Review of the Feasibility Investigation of Commercial Laminated Lithium-Ion Polymer Cells for Space Applications; Lithium-Ion Verification Test Program; Panasonic Small Cell Testing for AHPS; Lithium-Ion Small Cell Battery Shorting Study; Low-Earth-Orbit and Geosynchronous-Earth-Orbit Testing of 80 Ah Batteries under Real-Time Profiles; Update on Development of Lithium-Ion Cells for Space Applications at JAXA; Foreign Comparative Technology: Launch Vehicle Battery Cell Testing; 20V, 40 Ah Lithium Ion Polymer Battery for the Spacesuit; Low Temperature Life-Cycle Testing of a Lithium-Ion Battery for Low-Earth-Orbiting Spacecraft; and Evaluation of the Effects of DoD and Charge Rate on a LEO Optimized 50 Ah Li-Ion Aerospace Cell.

Source record↗

Milcom 04 Paper ID# 1158: A New Class of Turbo-like Codes with Efficient and Practical High-speed Decoders

Turbo codes not only achieve near Shannon-capacity performance, but also have decoders with modest complexity, which is crucial for implementation. So far efficient architectures for decoding of turbo codes have been proposed that is suitable for serial processing. In this paper a novel architecture for very high-speed turbo decoder is presented. The performance of this decoder is illustrated and the tradeoff between speed and efficiency is discussed. It is shown that some decoders can run faster by some order of magnitude while maintaining almost the same processing load.

interleaver design↗

An Overview of Starfish: A Table-Centric Tool for Interactive Synthesis

Engineering is an interactive process that requires intelligent interaction at many levels. My thesis [1] advances an engineering discipline for high-level synthesis and architectural decomposition that integrates perspicuous representation, designer interaction, and mathematical rigor. Starfish, the software prototype for the design method, implements a table-centric transformation system for reorganizing control-dominated system expressions into high-level architectures. Based on the digital design derivation (DDD) system a designer-guided synthesis technique that applies correctness preserving transformations to synchronous data flow specifications expressed as co- recursive stream equations Starfish enhances user interaction and extends the reachable design space by incorporating four innovations: behavior tables, serialization tables, data refinement, and operator retiming. Behavior tables express systems of co-recursive stream equations as a table of guarded signal updates. Developers and users of the DDD system used manually constructed behavior tables to help them decide which transformations to apply and how to specify them. These design exercises produced several formally constructed hardware implementations: the FM9001 microprocessor, an SECD machine for evaluating LISP, and the SchemEngine, garbage collected machine for interpreting a byte-code representation of compiled Scheme programs. Bose and Tuna, two of DDD s developers, have subsequently commercialized the design derivation methodology at Derivation Systems, Inc. (DSI). DSI has formally derived and validated PCI bus interfaces and a Java byte-code processor; they further executed a contract to prototype SPIDER-NASA's ultra-reliable communications bus. To date, most derivations from DDD and DRS have targeted hardware due to its synchronous design paradigm. However, Starfish expressions are independent of the synchronization mechanism; there is no commitment to hardware or globally broadcast clocks. Though software back-ends for design derivation are limited to the DDD stream-interpreter, targeting synchronous or real-time software is not substantively different from targeting hardware.

Tsow, Alex↗

Factors which Limit the Value of Additional Redundancy in Human Rated Launch Vehicle Systems

The National Aeronautics and Space Administration (NASA) has embarked on an ambitious program to return humans to the moon and beyond. As NASA moves forward in the development and design of new launch vehicles for future space exploration, it must fully consider the implications that rule-based requirements of redundancy or fault tolerance have on system reliability/risk. These considerations include common cause failure, increased system complexity, combined serial and parallel configurations, and the impact of design features implemented to control premature activation. These factors and others must be considered in trade studies to support design decisions that balance safety, reliability, performance and system complexity to achieve a relatively simple, operable system that provides the safest and most reliable system within the specified performance requirements. This paper describes conditions under which additional functional redundancy can impede improved system reliability. Examples from current NASA programs including the Ares I Upper Stage will be shown.

Anderson, Joel M.↗

Technology Developments in Radiation-Hardened Electronics for Space Environments

The Radiation Hardened Electronics for Space Environments (RHESE) project consists of a series of tasks designed to develop and mature a broad spectrum of radiation hardened and low temperature electronics technologies. Three approaches are being taken to address radiation hardening: improved material hardness, design techniques to improve radiation tolerance, and software methods to improve radiation tolerance. Within these approaches various technology products are being addressed including Field Programmable Gate Arrays (FPGA), Field Programmable Analog Arrays (FPAA), MEMS, Serial Processors, Reconfigurable Processors, and Parallel Processors. In addition to radiation hardening, low temperature extremes are addressed with a focus on material and design approaches. System level applications for the RHESE technology products are discussed.

Keys, Andrew S.↗

Integration and Testing Challenges of Small, Multiple Satellite Missions: Experiences From The Space Technology 5 Project

This brief presentation describes the mechanical and electrical integration activities and environmental testing challenges of the Space Technology 5 (ST5) Project. Lessons learned during this process are highlighted, including performing mechanical activities serially to gain efficiency through repetition and performing electrical activities based on the level of subsystem expertise available.

Sauerwein, Timothy A.↗

System-Level Integration of Mass Memory

A report discusses integrating multiple memory modules on the high-speed serial interconnect (IEEE 1393) that is used by a spacecraft?s inter-module communications in order to ease data congestion and provide for a scalable, strong, flexible system that can meet new system-level mass memory requirements.

Cox, Brian↗

Network-Attached Solid-State Recorder Architecture

A document discusses placing memory modules on the high-speed serial interconnect, which is used by a spacecraft s computer elements for inter-processor communications, to allow all multiple computer system architectures to access the spacecraft data storage at the same time. Each memory board is identical electrically and receives its bus ID upon connection to the system. The computer elements are configured in a similar fashion. The architecture allows for multiple memory boards to be accessed simultaneously by different computer elements, and results in a scalable, strong, fault-tolerant system. The IEEE-1393 ring bus can be routed so that multiple card failures can occur and the mass memory storage will still function.

Cox, Brian↗

Cammp Team

The International Space Station (ISS) Configuration Analysis Modeling and Mass Properties (CAMMP) Team is presenting a demo of certain CAMMP capabilities at a Booz Allen Hamilton conference in San Antonio. The team will be showing pictures of low fidelity, simplified ISS models, but no dimensions or technical data. The presentation will include a brief description of the contract and task, description and picture of the Topology, description of Generic Ground Rules and Constraints (GGR&C), description of Stage Analysis with constraints applied, and wrap up with description of other tasks such as Special Studies, Cable Routing, etc. The models include conceptual Crew Exploration Vehicle (CEV) and Lunar Lander images and animations created for promotional purposes, which are based entirely on public domain conceptual images from public NASA web sites and publicly available magazine articles and are not based on any actual designs, measurements, or 3D models. Conceptual Mars rover and lander are completely conceptual and are not based on any NASA designs or data. The demonstration includes High Fidelity Computer Aided Design (CAD) models of ISS provided by the ISS 3D CAD Team which will be used in a visual display to demonstrate the capabilities of the Teamcenter Visualization software. The demonstration will include 3D views of the CAD models including random measurements that will be taken to demonstrate the measurement tool. A 3D PDF file will be demonstrated of the Blue Book fidelity assembly complete model with no vehicles attached. The 3D zoom and rotation will be displayed as well as random measurements from the measurement tool. The External Configuration Analysis and Tracking Tool (ExCATT) Microsoft Access Database will be demonstrated to show its capabilities to organize and track hardware on ISS. The data included will be part numbers, serial numbers, historical, current, and future locations, of external hardware components on station. It includes dates of all external ISS events and flights and the associated hardware changes for each event. The hardware location information does not always reveal the exact location of the hardware, only the general location. In some cases the location is a module or carrier, in other cases it is a WIF socket, handrail, or attach point. Only small portions of the data will be displayed for demonstration purposes.

Evertt, Shonn F.↗

Ensemble: an Architecture for Mission-Operations Software

Ensemble is the name of an open architecture for, and a methodology for the development of, spacecraft mission operations software. Ensemble is also potentially applicable to the development of non-spacecraft mission-operations- type software. Ensemble capitalizes on the strengths of the open-source Eclipse software and its architecture to address several issues that have arisen repeatedly in the development of mission-operations software: Heretofore, mission-operations application programs have been developed in disparate programming environments and integrated during the final stages of development of missions. The programs have been poorly integrated, and it has been costly to develop, test, and deploy them. Users of each program have been forced to interact with several different graphical user interfaces (GUIs). Also, the strategy typically used in integrating the programs has yielded serial chains of operational software tools of such a nature that during use of a given tool, it has not been possible to gain access to the capabilities afforded by other tools. In contrast, the Ensemble approach offers a low-risk path towards tighter integration of mission-operations software tools.

Norris, Jeffrey↗