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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 1,441 records · Page 80
All sourcesNASA NTRSDOE OSTI
NASA NTRS1983

A sun acquisition sensor for spacecraft guidance and control

The combination of a strap-down analog sun acquisition sensor (AS) and an on-board digital programmable signal processor results in a versatile guidance and control system. The combination can orient the rotation axis of a spin-stabilized spacecraft to the sun no matter what the initial attitude of the spacecraft. During the sun orientation process, spacecraft spin rate can be sensed and supplied as an input to the control algorithm. If needed, the AS-signal processor combination can be used to perform a rhumb-line turn maneuver. In case of unexpected spacecraft operating conditions, or unplanned pointing directions, the signal processor program can be updated via earth-based transmission of another program to cover the new situation. Using only three radiation-hard cadmium-sulfide detectors, containing no moving parts, needing only a few microwatts of power, included in a volume of 550 cubic cm (a redundant pair), and weighing only 540 grams, the AS is a small, simple, sturdy sensing device.

Birnbaum, M. M.↗
NASA NTRS1984

Optical systolic solutions of linear algebraic equations

The philosophy and data encoding possible in systolic array optical processor (SAOP) were reviewed. The multitude of linear algebraic operations achievable on this architecture is examined. These operations include such linear algebraic algorithms as: matrix-decomposition, direct and indirect solutions, implicit and explicit methods for partial differential equations, eigenvalue and eigenvector calculations, and singular value decomposition. This architecture can be utilized to realize general techniques for solving matrix linear and nonlinear algebraic equations, least mean square error solutions, FIR filters, and nested-loop algorithms for control engineering applications. The data flow and pipelining of operations, design of parallel algorithms and flexible architectures, application of these architectures to computationally intensive physical problems, error source modeling of optical processors, and matching of the computational needs of practical engineering problems to the capabilities of optical processors are emphasized.

Neuman, C. P.↗
NASA NTRS1984

Systolic triple-matrix product calculations

In order to handle arbitrary-sized matrices with fixed-sized optical matrix processors, it is necessary to expand or contract the problem to fit the processor. This preprocessing is examined. It is applied to the type of triple-matrix product calculation needed for Kalman filtering. Emphasis will be placed on systolic-type processors.

Caulfield, H. J.↗
NASA NTRS1983

Implicit, nonswitching, vector-oriented algorithm for steady transonic flow

A rapid computation of a sequence of transonic flow solutions has to be performed in many areas of aerodynamic technology. The employment of low-cost vector array processors makes the conduction of such calculations economically feasible. However, for a full utilization of the new hardware, the developed algorithms must take advantage of the special characteristics of the vector array processor. The present investigation has the objective to develop an efficient algorithm for solving transonic flow problems governed by mixed partial differential equations on an array processor.

Lottati, I.↗
NASA NTRS1983

Synthetic aperture radar imaging using acousto-optics and charge-coupled devices

The operating principles of an acoustooptic/CCD real-time SAR processor are described, and experimental results are presented. Particular consideration is given to time-and-space integrating processing, the range processor, and the azimuth processor. The interferometric detection scheme is examined in detail.

Psaltis, D.↗
NASA NTRS1982

Output statistics of laser anemometers in sparsely seeded flows

It is noted that until very recently, research on this topic concentrated on the particle arrival statistics and the influence of the optical parameters on them. Little attention has been paid to the influence of subsequent processing on the measurement statistics. There is also controversy over whether the effects of the particle statistics can be measured. It is shown here that some of the confusion derives from a lack of understanding of the experimental parameters that are to be controlled or known. A rigorous framework is presented for examining the measurement statistics of such systems. To provide examples, two problems are then addressed. The first has to do with a sample and hold processor, the second with what is called a saturable processor. The sample and hold processor converts the output to a continuous signal by holding the last reading until a new one is obtained. The saturable system is one where the maximum processable rate is arrived at by the dead time of some unit in the system. At high particle rates, the processed rate is determined through the dead time.

Edwards, R. V.↗
NASA NTRS1984

Optical Kalman filtering for missile guidance

Optical systolic array processors constitute a powerful and general-purpose set of optical architectures with high computational rates. In this paper, Kalman filtering, a novel application for these architectures, is investigated. All required operations are detailed; their realization by optical and special-purpose analog electronics are specified; and the processing time of the system is quantified. The specific Kalman filter application chosen is for an air-to-air missile guidance controller. The architecture realized in this paper meets the design goal of a fully adaptive Kalman filter which processes a measurement every 1 msec. The vital issue of flow and pipelining of data and operations in a systolic array processor is addressed. The approach is sufficiently general and can be realized on an optical or digital systolic array processor.

Casasent, D.↗
NASA NTRS1984

The FLEX/32 multicomputing environment

The FLEX/32 Multicomputer is a generic environment for cooperating multiple processors. The FLEX/32 supports a number of different processors, making it heterogeneous in terms of the instruction sets it supports, and homogeneous in its ability to provide consistent storage and input/output facilities to its differing processors. These facilities are accessed through standard 32-bit VMEbus connections. The FLEX/32 supports the full UNIX System V Operating System and languages associated with it, plus the extended ConCurrent C and Concurrent FORTRAN 77 languages that allow programming of concurrent software at a high level. Direct programming support at all levels is provided by the environment hardware for concurrent software execution and optimization, including hardware support for shared resource access arbitration, conditional critical region arbitration, and interprocessor messages.

Matelan, N.↗
NASA NTRS1985

SPAR improved structural-fluid dynamic analysis capability

The results of a study whose objective was to improve the operation of the SPAR computer code by improving efficiency, user features, and documentation is presented. Additional capability was added to the SPAR arithmetic utility system, including trigonometric functions, numerical integration, interpolation, and matrix combinations. Improvements were made in the EIG processor. A processor was created to compute and store principal stresses in table-format data sets. An additional capability was developed and incorporated into the plot processor which permits plotting directly from table-format data sets. Documentation of all these features is provided in the form of updates to the SPAR users manual.

Pearson, M. L.↗
NASA NTRS1984

Landsat image registration - A study of system parameters

Some applications of Landsat data, particularily agricultural and forestry applications, require the ability to geometrically superimpose or register data acquired at different times and possibly by different satellites. An experimental investigation relating to a registration processor used by the Johnson Space Center for this purpose is the subject of this paper. Correlation of small subareas of images is at the heart of this registration processor and the manner in which various system parameters affect the correlation process is the prime area of investigation. Parameters investigated include preprocessing methods, methods for detecting sucessful correlations, fitting a surface to the correlation patch, fraction of pixels designated as edge pixels in edge detection adn local versus global generation of edge images. A suboptimum search procedure is used to find a good parameter set for this registration processor.

Wacker, A. G.↗
NASA NTRS1985

Moving target, distributed, real-time simulation using Ada

Research on a precompiler solution is described for the moving target compiler problem encountered when trying to run parallel simulation algorithms on several microcomputers. The precompiler is under development at NASA-Lewis for simulating jet engines. Since the behavior of any component of a jet engine, e.g., the fan inlet, rear duct, forward sensor, etc., depends on the previous behaviors and not the current behaviors of other components, the behaviors can be modeled on different processors provided the outputs of the processors reach other processors in appropriate time intervals. The simulator works in compute and transfer modes. The Ada procedure sets for the behaviors of different components are divided up and routed by the precompiler, which essentially receives a multitasking program. The subroutines are synchronized after each computation cycle.

Collins, W. R.↗
NASA NTRS1985

The science of computing - Parallel computation

Although parallel computation architectures have been known for computers since the 1920s, it was only in the 1970s that microelectronic components technologies advanced to the point where it became feasible to incorporate multiple processors in one machine. Concommitantly, the development of algorithms for parallel processing also lagged due to hardware limitations. The speed of computing with solid-state chips is limited by gate switching delays. The physical limit implies that a 1 Gflop operational speed is the maximum for sequential processors. A computer recently introduced features a 'hypercube' architecture with 128 processors connected in networks at 5, 6 or 7 points per grid, depending on the design choice. Its computing speed rivals that of supercomputers, but at a fraction of the cost. The added speed with less hardware is due to parallel processing, which utilizes algorithms representing different parts of an equation that can be broken into simpler statements and processed simultaneously. Present, highly developed computer languages like FORTRAN, PASCAL, COBOL, etc., rely on sequential instructions. Thus, increased emphasis will now be directed at parallel processing algorithms to exploit the new architectures.

Denning, P. J.↗
NASA NTRS1986

Frame-Synchronization-Assisting Module

Auxiliary data processor does computations related to synchronization of frames of telemetry data, relieving main processor of task. Called frame-synchronization-assisting module (FSAM), sorts through large amounts of data to determine whether valid and how configured. Module connected to main processor of computer through direct-memory-access (interface) module. Examines data in computer memory to find frame-synchronizing codes.

Desilveira, C.↗
NASA NTRS1986

Language and Program for Documenting Software Design

Software Design and Documentation Language (SDDL) provides effective communication medium to support design and documentation of complex software applications. SDDL supports communication among all members of software design team and provides for production of informative documentation on design effort. Use of SDDL-generated document to analyze design makes it possible to eliminate many errors not detected until coding and testing attempted. SDDL processor program translates designer's creative thinking into effective document for communication. Processor performs as many automatic functions as possible, freeing designer's energy for creative effort. SDDL processor program written in PASCAL.

Kleine, H.↗
NASA NTRS1984

Design of infrasound-detection system via adaptive LMSTDE algorithm

A proposed solution to an aviation safety problem is based on passive detection of turbulent weather phenomena through their infrasonic emission. This thesis describes a system design that is adequate for detection and bearing evaluation of infrasounds. An array of four sensors, with the appropriate hardware, is used for the detection part. Bearing evaluation is based on estimates of time delays between sensor outputs. The generalized cross correlation (GCC), as the conventional time-delay estimation (TDE) method, is first reviewed. An adaptive TDE approach, using the least mean square (LMS) algorithm, is then discussed. A comparison between the two techniques is made and the advantages of the adaptive approach are listed. The behavior of the GCC, as a Roth processor, is examined for the anticipated signals. It is shown that the Roth processor has the desired effect of sharpening the peak of the correlation function. It is also shown that the LMSTDE technique is an equivalent implementation of the Roth processor in the time domain. A LMSTDE lead-lag model, with a variable stability coefficient and a convergence criterion, is designed.

Khalaf, C. S.↗
NASA NTRS1986

Report on the feasibility of hypercube concurrent processing systems in computational fluid dynamics

The feasibility of using hypercube-connected concurrent processor systems for problems in computational fluid dynamics is studied. Both explicit and implicit numerical methods are considered and several alternative implementations of these methods are evaluated on concurrent processor systems. A Lax-Wendroff explicit method was designed and implemented for the Navier-Stokes equations. The code runs on the Intel iPSC concurrent processor system. Tests of this code show that it is reasonably efficient. The Beam and Warming implicit factored method was designed and implemented for Berger's equation. Preliminary tests show that the efficiency of code is poor.

Bruno, J.↗
NASA NTRS1986

Is random access memory random?

Most software is contructed on the assumption that the programs and data are stored in random access memory (RAM). Physical limitations on the relative speeds of processor and memory elements lead to a variety of memory organizations that match processor addressing rate with memory service rate. These include interleaved and cached memory. A very high fraction of a processor's address requests can be satified from the cache without reference to the main memory. The cache requests information from main memory in blocks that can be transferred at the full memory speed. Programmers who organize algorithms for locality can realize the highest performance from these computers.

Denning, P. J.↗