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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 1,441 records · Page 80

Verification of Triple Modular Redundancy (TMR) Insertion for Reliable and Trusted Systems

We propose a method for TMR insertion verification that satisfies the process for reliable and trusted systems. If a system is expected to be protected using TMR, improper insertion can jeopardize the reliability and security of the system. Due to the complexity of the verification process, there are currently no available techniques that can provide complete and reliable confirmation of TMR insertion. This manuscript addresses the challenge of confirming that TMR has been inserted without corruption of functionality and with correct application of the expected TMR topology. The proposed verification method combines the usage of existing formal analysis tools with a novel search-detect-and-verify tool. Field programmable gate array (FPGA),Triple Modular Redundancy (TMR),Verification, Trust, Reliability,

Trust↗

New Developments in FPGA Devices: SEUs and Fail-Safe Strategies from the NASA Goddard Perspective

It has been shown that, when exposed to radiation environments, each Field Programmable Gate Array (FPGA) device has unique error signatures. Subsequently, fail-safe and mitigation strategies will differ per FPGA type. In this session several design approaches for safe systems will be presented. It will also explore the benefits and limitations of several mitigation techniques. The intention of the presentation is to provide information regarding FPGA types, their susceptibilities, and proven fail-safe strategies; so that users can select appropriate mitigation and perform the required trade for system insertion. The presentation will describe three types of FPGA devices and their susceptibilities in radiation environments.

Field Programmable Gate Array (FPGA)↗

New Developments in FPGA: SEUs and Fail-Safe Strategies from the NASA Goddard Perspective

It has been shown that, when exposed to radiation environments, each Field Programmable Gate Array (FPGA) device has unique error signatures. Subsequently, fail-safe and mitigation strategies will differ per FPGA type. In this session several design approaches for safe systems will be presented. It will also explore the benefits and limitations of several mitigation techniques. The intention of the presentation is to provide information regarding FPGA types, their susceptibilities, and proven fail-safe strategies; so that users can select appropriate mitigation and perform the required trade for system insertion. The presentation will describe three types of FPGA devices and their susceptibilities in radiation environments.

Error Correction and Detection (EDAC)↗

Challenges Regarding IP Core Functional Reliability

For many years, intellectual property (IP) cores have been incorporated into field programmable gate array (FPGA) and application specific integrated circuit (ASIC) design flows. However, the usage of large complex IP cores were limited within products that required a high level of reliability. This is no longer the case. IP core insertion has become mainstream including their use in highly reliable products. Due to limited visibility and control, challenges exist when using IP cores and subsequently compromise product reliability. We discuss challenges and suggest potential solutions to critical application IP insertion.

IP cores↗

Analyzing System on A Chip Single Event Upset Responses using Single Event Upset Data, Classical Reliability Models, and Space Environment Data

We are investigating the application of classical reliability performance metrics combined with standard single event upset (SEU) analysis data. We expect to relate SEU behavior to system performance requirements. Our proposed methodology will provide better prediction of SEU responses in harsh radiation environments with confidence metrics. single event upset (SEU), single event effect (SEE), field programmable gate array devises (FPGAs)

single event effect (SEE)↗

Hardware and Software Engineering

The Launch Control System (LCS) is a part of the system used to launch the Space Launch System (SLS). It monitors and control of both vehicle and ground systems for SLS. My internship this spring was focused both on the hardware and software aspects of the command and control system. During my internship I worked in two groups, the Record and Playback Subsystem (RPS) and Kennedy Ground Control Subsystems (KGCS). During my time on RPS, I worked on automating the updating of displays and engineering reports. While on KGCS I worked on creating a power distribution diagram of the Control System Development Lab (CDL) and a new trainer for new interns or employees to gain an understanding of Programmable Logic Controllers (PLCs).

Hardware↗

Miniaturized Electronic System for the Planetary Integrated Camera Spectrometer

This paper discusses the design and implementation of a miniaturized electronic system for the Planetary Integrated Camera-Spectrometer (PICS). The PICS electronics demonstrates the application of Field Programmable Gate Arrays (FPGAs) and of analog hybrid technology to space flight multispectral systems. A discussion of the electronic system design illustrates how a multisensor instrument consisting of an UV CCD, two visible CCDs, and a near-IR focal plane assembly can be processed through a common set of electronics. Following the system design discussion, the actual electronic design will be presented. Each miniaturized module will be discussed as to functionality and performance. The test setup for bench checkout of a cooled CCD and an IR FPA, including results with breadboard electronics and with the hybrids are also described.

CCD↗

Alternative Setup for Long-Duration Low-Duty-Cycle 600°C Ambient Testing of SiC Integrated Circuits

A scalable, compact oven testbed system for simultaneously evaluating a multitude of high temperature integrated circuits (ICs) for prolonged operating times of up to 600 °C has been prototyped. The new testbed system enables long-duration high temperature testing in sufficient statistical quantities consistent with standard aerospace electronics engineering standards. This setup is comprised of multiple compact ovens housing chips or packages mounted to ceramic circuit boards. Each oven is a compact 15.2 cm length by 15.2 cm width by 12.7 cm depth with a maximum 400 Watts of heating power. The custom-made silicon oxide ceramic heating block inside each oven is based on a 3D printed design adapted for the easy insertion of the IC device under test (DUT). This innovative design provides the quick insertion of ICs with or without a ceramic package into a 600 °C environment by utilizing a movable 11.43 cm long ceramic substrate with electrical traces extending from the oven hot zone to external standard plastic-based board connectors. Another key oven design feature is the minimization of the DUT exposure to electromagnetic interference (EMI) by utilizing a filtered DC power source to reduce heating element noise. Additionally, the ovens can be configured in a parallel arrangement allowing global data monitoring over a single industrial RS422 serial port. This feature is important for scaling up to test multiple ICs semi-simultaneously. A USB serial port is provided to independently control the operating parameters of each oven such as the oven target temperature and oven ramp rate. The oven temperature can reach up to 600 °C with a confirmed +/- 4 °C maximum deviation across the test zone region. The ramp rate can be programmed from 1 °C/minute up to 10 °C/minute. Furthermore, a programmable switchboard is used to interface with the DUT. This switchboard comprises a National Instruments Peripheral Component Interconnect eXtension for Instrumentation (NI PXI) system and a breakout board to send and receive power, analog or digital test signals. By using this unique oven testbed system, a variety of ICs can now be tested in parallel using the same test components configured for a diverse set of requirements.

DC Powered Oven↗

Kinetically Tunable, Active Auxetic, and Variable Recruitment Active Textiles from Hierarchical Assemblies

Multifunctional textiles with programmable, multi-axial, distributed, and scalable actuation are highly desirable and presently unrealized. 1D torque-unbalanced active yarns within 2D textile structures are exploited to produce soft and scalable active textiles that exhibit tunable displacements, forces, stiffnesses, and kinematic deformations. Through a textile hierarchy spanning active material composition, yarn construction, textile geometry, and system architecture, these active textiles accomplish kinetic tunability, variable recruitment behaviors, and auxetic effects without mechanical contact, called active auxetic effects. New modes of pre-programmed multi-axial performance are enabled by geometrically manipulating—specifically pre-stressing and constraining—active filaments in torsion and leveraging their structural elastic instability within a textile geometry. The new kinematic motion afforded by torque-unbalanced active yarns enhances the performance of active textiles, which accomplish tensile strokes over 40%, generated blocked forces up to 308 N m−1, and specific work over 0.4. kJ kg−1. Advances in active textiles are demonstrated through multifunctional 3D applications, including a variable constriction pump that exhibits sequential actuation, a wearable that conforms multi-axially around the body, and a soft exoskeleton that performs assistive motions and on-body anchoring simultaneously. By harnessing the capabilities of active materials within a textile hierarchy, advances in the potentiality of multifunctional textiles are presented.

Active auxetic effects↗

Monitoring the Flow of the Greenland Ice Sheet: the PROMICE Ice Velocity Product and Recent Updates

We present the Programme for Monitoring of the Greenland Ice Sheet (PROMICE) ice velocity product, which is a time series of ice velocity mosaics derived using offset tracking on Sentinel-1 SAR data. The time series starting in January 2016 is continuously updated with a new mosaic every 12 days and is posted at 500 m grid resolution. Within PROMICE, the ice velocity product is used directly as input to estimate the solid ice discharge from the Greenland Ice Sheet as well as to study ice dynamic processes on seasonal and multi-annual time scales. Recently, we have made changes to the processing chain due to spurious cases of slow down detected in a few glaciers in Southeast Greenland. In this contribution, we discuss how this was resolved as well as other recent improvements to the product.

Greenland ice sheet↗

Verifying PLC Programs via Monitors: Extending the Integration of FRET and PLCverif

Verification of Programmable Logic Controller (PLC) programs requires reasoning about propositions qualified in terms of time. CERN’s PLCverif, an open-source tool for the analysis of safety-critical PLC systems, uses Linear Temporal Logic (LTL) for the specification of properties. Until now, PLCverif depended on third-party tools that accept LTL specifications to perform verification. However, our experience with industrial PLC programs shows that, to overcome analysis limitations, a wide range of techniques are needed to successfully verify complex properties. In this paper, we extend PLCverif to enable PLC program verification of pure-past LTL (PLTL) safety properties with assertion-based verification tools. To this end, we take an algorithm from the runtime-monitoring domain, apply it to bounded model checking of PLC programs, and implement it in PLCverif. We extend the integration of NASA’s Formal Requirements Elicitation Tool (FRET) into PLCverif to use PLTL properties generated with FRET. In addition, we leverage the program structure induced by the PLC scan-cycle for a state-space reduction. Finally, we expose the algorithm to a real-world case study of critical systems at CERN.

Formal verification↗

Design, Implementation, and Evaluation of a Hybrid DS/FFH Spread-Spectrum Radio Transceiver

In recent years there has been great interest in using hybrid spread-spectrum (HSS) techniques for commercial applications, particularly in the Smart Grid, in addition to their inherent uses in military communications. This is because HSS can accommodate high data rates with high link integrity, even in the presence of significant multipath effects and interfering signals. A highly useful form of this transmission technique for many types of command, control, and sensing applications is the specific code-related combination of standard direct-sequence modulation with "fast" frequency-hopping, denoted hybrid DS/FFH, wherein multiple frequency hops occur within a single data-bit time. In this paper, we present the efforts carried out at Oak Ridge National Laboratory toward exploring the design, implementation, and evaluation of a hybrid DS/FFH spread-spectrum radio transceiver using a single Field Programmable Gate Array (FPGA). The FPGA allows the various subsystems to quickly communicate with each other and thereby maintain tight synchronization. We also investigate various hopping sequences against robustness to interference and jamming. Experimental results are presented that show the receiver sensitivity, radio data-rate/bit-error evaluations, and jamming and interference rejection capabilities of the implemented hybrid DS/FFH spread-spectrum system under widely varying design parameters.

data rate↗

Design and Development of a Residential Gas-Fired Heat Pump

Heating, ventilating, and air-conditioning equipment consumes 43% of the total primary energy consumption in U.S. households. Presently, conventional gas furnaces have maximum heating efficiencies of 98%. Electric air conditioners used in association with the furnace for cooling have a minimum seasonal energy efficiency ratio (SEER) of 14.0. A residential gas-fired heat pump (RGHP) was developed and tested under standard rating conditions, resulting in a significant increase in heating efficiency of over 40% versus conventional natural gas furnaces. The associated efficiency of the RGHP in cooling mode is comparable in efficiency to an electric air conditioner (14.0 SEER) when compared on a primary energy basis. The RGHP is similar in nature to a conventional heat pump but with two main differences. First, the primary energy savings are higher, based on a site versus source comparison, as the result of using natural gas to supply shaft power to the compressor rather than an electric motor. Second, waste heat is recovered from the engine to supplement space heating and reduce the energy input. It can also be used to provide supplemental water heating. The system utilizes a programmable logic controller that allows variable-speed operation to achieve improved control to meet building loads. RGHPs significantly reduce peak electric use during periods of high demand, especially peak summer loads, as well as peak winter loads in regions with widespread use of electric heating. This contributes to leveling year-round gas loads, with the potential to increase annual gas demand in some regions. The widespread adoption of RGHPs will contribute to significant reductions in primary energy consumption and carbon emissions through improved efficiencies.

energy efficiency↗

Primary Pump Motor Area - Transfer Fan Replacement PLC Design

My poster is about a project that I have worked on in my time at ATR as an intern. The Heating and Ventilation Control Panel (HVB-1) controls thirty-five heating and ventilation fans within the Advanced Test Reactor. This control panel needs replacement, as many of the components inside the existing panel are becoming old and degrading. In preparation for this replacement effort, concepts and component identification for the new control panel needed to be developed. Instead of replacing the new panel with replacement mechanical components, a Programmable Logic Controller (PLC) is proposed as a solution. Although multiple fans are associated with this panel, my poster focuses on the replacement design for the Primary Pump Motor Area Transfer Fan. This will provide an example of how the entire cabinet may be upgraded.

21 SPECIFIC NUCLEAR REACTORS AND ASSOCIATED PLANTS↗

Atomic-Scale Manipulation and In Situ Characterization with Scanning Tunneling Microscopy

Scanning tunneling microscope (STM) has presented a revolutionary methodology to nanoscience and nanotechnology. It enables imaging of the topography of surfaces, mapping the distribution of electronic density of states, and manipulating individual atoms and molecules, all at atomic resolutions. In particular, atom manipulation capability has evolved from fabricating individual nanostructures toward the scalable production of the atomic-sized devices bottom-up. The combination of precision synthesis and in situ characterization has enabled direct visualization of many quantum phenomena and fast proof-of-principle testing of quantum device functions with immediate feedback to guide improved synthesis. Several representative examples are reviewed to demonstrate the recent development of atomic-scale manipulation, focusing on progress that addresses quantum properties by design in several technologically relevant materials systems. Integration of several atomically precisely controlled probes in a multiprobe STM system vastly extends the capability of in situ characterization to a new dimension where the charge and spin transport behaviors can be examined from mesoscopic to atomic length scale. The automation of atomic-scale manipulation and the integration with well-established lithographic processes further push this bottom-up approach to a new level that combines reproducible fabrication, extraordinary programmability, and the ability to produce large-scale arrays of quantum structures.

47 OTHER INSTRUMENTATION↗