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tool set enables model checking of finite state machines designs. This is acheived by translating state-chart specifications into the input language of the Spin model checker. An abstract syntax of hierarchical sequential automata (HSA) is provided as an intermediate format tool set.
As part of the Artemis program to return humans to the lunar surface, the National Aeronautics and Space Administration is planning to use the Orion Multi- Purpose Crew Vehicle to transport crew to a small orbital platform called Gate- way in cislunar space. To facilitate this activity, Orion is required to perform Rendezvous, Proximity Operations, and Docking (RPOD) with both the Gate- way and the launch vehicle upper stage. The Orion spacecraft uses sequencing in the form of Phases, Segments, Activities, and Modes (PSAM) to configure Guidance, Navigation, & Control (GN&C) software during each portion of the mission. Significant updates to Orion PSAM definitions are required for RPOD. This paper describes the process of defining these new sequencing elements, implementing them in prototype flight software, and testing them in an integrated simulation environment. First, requirements are specified to determine the nominal and off-nominal sequencing behavior necessary to complete the mission. These requirements also specify which software functions should be fully autonomous and which functions require manual interactions from crew or ground operators. Next, the RPOD concept of operations is defined with detailed events listed in a mission timeline. Third, a state machine diagram is developed to show all PSAM states, including all possible transitions between them. After this, the PSAM states and transitions are entered into a sequencing software emulator and parameter values and modes are defined for GN&C software elements. Finally, the PSAM architecture is tested within an integrated simulation environment by connecting it with prototypes of relevant GN&C flight software elements and with detailed vehicle models. After the sequencing design has been finalized and tested, it is implemented in flight software.
The following strategy is suggested for specification and proof: (1) Defer the construction of a formal program specification with respect to I/O assertions unit the correctness of the program with respect to an abstract mathematical model of program intent is demonstrated. (2) Prove that an abstract machine (using infinite precision arithmetic) would compute that object exactly. (3) Prove that the computational sequences of arithmetic operations that occur in the abstract machine must be precisely the same at every step as those occurring on an actual machine (with finite precision arithmetic), executing the same program. (4) Use a Verification Conditions VC-generator that knows about the semantics of arithmetic operations to annotate the program with assertions that bound (or in some circumstances estimate) the difference between the actual machine state variables and the corresponding ones of the abstract machine. Construct the formal program specification by combining the verification conditions into theorems about computational error that can be proved with mechanical assistance.
To implement fault tolerant autonomy in future space systems, it will be necessary to integrate planning, adaptive control, and state estimation subsystems. However, integrating these subsystems is difficult, time-consuming, and error-prone. This paper describes Intelliface/ADAPT, a software testbed that helps researchers develop and test alternative strategies for integrating planning, execution, and diagnosis subsystems more quickly and easily. The testbed's architecture, graphical data displays, and implementations of the integrated subsystems support easy plug and play of alternate components to support research and development in fault-tolerant control of autonomous vehicles and operations support systems. Intelliface/ADAPT controls NASA's Advanced Diagnostics and Prognostics Testbed (ADAPT), which comprises batteries, electrical loads (fans, pumps, and lights), relays, circuit breakers, invertors, and sensors. During plan execution, an experimentor can inject faults into the ADAPT testbed by tripping circuit breakers, changing fan speed settings, and closing valves to restrict fluid flow. The diagnostic subsystem, based on NASA's Hybrid Diagnosis Engine (HyDE), detects and isolates these faults to determine the new state of the plant, ADAPT. Intelliface/ADAPT then updates its model of the ADAPT system's resources and determines whether the current plan can be executed using the reduced resources. If not, the planning subsystem generates a new plan that reschedules tasks, reconfigures ADAPT, and reassigns the use of ADAPT resources as needed to work around the fault. The resource model, planning domain model, and planning goals are expressed using NASA's Action Notation Modeling Language (ANML). Parts of the ANML model are generated automatically, and other parts are constructed by hand using the Planning Model Integrated Development Environment, a visual Eclipse-based IDE that accelerates ANML model development. Because native ANML planners are currently under development and not yet sufficiently capable, the ANML model is translated into the New Domain Definition Language (NDDL) and sent to NASA's EUROPA planning system for plan generation. The adaptive controller executes the new plan, using augmented, hierarchical finite state machines to select and sequence actions based on the state of the ADAPT system. Real-time sensor data, commands, and plans are displayed in information-dense arrays of timelines and graphs that zoom and scroll in unison. A dynamic schematic display uses color to show the real-time fault state and utilization of the system components and resources. An execution manager coordinates the activities of the other subsystems. The subsystems are integrated using the Internet Communications Engine (ICE). an object-oriented toolkit for building distributed applications.
A tutorial on the development of a formal specification and its verification using the Prototype Verification System (PVS) is presented. The tutorial presents the formal specification and verification techniques by way of specific example - an airline reservation system. The airline reservation system is modeled as a simple state machine with two basic operations. These operations are shown to preserve a state invariant using the theorem proving capabilities of PVS. The technique of validating a specification via 'putative theorem proving' is also discussed and illustrated in detail. This paper is intended for the novice and assumes only some of the basic concepts of logic. A complete description of user inputs and the PVS output is provided and thus it can be effectively used while one is sitting at a computer terminal.
This report summarizes the use of SX series devices and their JTAG 1149.1 circuitry. 'JTAG' circuitry was originally designed to standardize testing of boards via a simple control port interface electrically without having to use devices such as a bed of nails tester. JTAG is also used for other functions such as executing built-in-test sequences, identifying devices, or, through custom instructions, other functions designed in by the chip designer. The JTAG circuitry is designed for test only; it has no functional use in the integrated circuit during normal operations. The JTAG circuitry and the mode of the device is controlled by a circuit block known as the 'TAP controller,' which is a sixteen-state state machine along with various registers. The controller is normally in an operational state known as TEST-LOGIC-RESET. In this state, the device is held in a fully functional, operating mode. However, a Single Event Upset (SEU) may remove the TAP controller from this state, causing a loss of control of the integrated circuit, unless certain precautions are taken, such as grounding the optional JTAG TRST signal.
This report summarizes the use of SX series devices and their JTAG 1149.1 circuitry. 'JTAG' circuitry was originally designed to standardize testing of boards via a simple control port interface electrically without having to use devices such as a bed of nails tester. JTAG is also used for other functions such as executing built-in-test sequences, identifying devices, or, through custom instructions, other functions designed in by the chip designer. The JTAG circuitry is designed for test only; it has no functional use in the integrated circuit during normal operations. The JTAG circuitry and the mode of the device is controlled by a circuit block known as the 'TAP controller,' which is a sixteen-state state machine along with various registers. The controller is normally in an operational state known as TEST-LOGIC-RESET. In this state, the device is held in a fully functional, operational mode. However, a Single Event Upset (SEU) may remove the TAP controller from this state, causing a loss of control of the integrated circuit, unless certain precautions are taken, such as grounding the optional JTAG TRST signal.
The Behavior, Constraint, and Scenario (BeCoS) tool has been developed to allow engineers to specify system and component behaviors. The tool is a web application that is developed in JavaScript and uses the React framework for the user interface and Redux for maintaining application state. The foundation of the tool is its underlying ontology, which expands upon a previously-defined behavior ontology with a scenario ontology. The behavior ontology includes elements like behaving elements, state variables, parameters, and constraints, while the scenario ontology includes core constructs like activities, temporal constraints, and timepoints. BeCoS allows users to easily create behaving elements and to specify their state variables, parameters, state machines, and constraints. BeCoS also allows users to develop temporal constraint networks that specify constraints on component states over time. BeCoS is a prototype tool that has been deployed and tested by systems engineers on the Europa Clipper project, which generated several use cases and helped steer its current developmental effort. By enabling systems engineers to specify behavior in a semantically-rigorous manner, BeCoS is an enabling technology for analyses that previously could not be performed, and when exporting its model to other tools, allows for consistent behavior models to be used.
The Behavior, Constraint, and Scenario (BeCoS) tool has been developed to allow engineers to specify system and component behaviors. The tool is a web application that is developed in JavaScript and uses the React framework for the user interface and Redux for maintaining application state. The foundation of the tool is its underlying ontology, which expands upon a previously-defined behavior ontology with a scenario ontology. The behavior ontology includes elements like behaving elements, state variables, parameters, and constraints, while the scenario ontology includes core constructs like activities, temporal constraints, and timepoints. BeCoS allows users to easily create behaving elements and to specify their state variables, parameters, state machines, and constraints. BeCoS also allows users to develop temporal constraint networks that specify constraints on component states over time. BeCoS is a prototype tool that has been deployed and tested by systems engineers on the Europa Clipper project, which generated several use cases and helped steer its current developmental effort. By enabling systems engineers to specify behavior in a semantically-rigorous manner, BeCoS is an enabling technology for analyses that previously could not be performed, and when exporting its model to other tools, allows for consistent behavior models to be used.
The Spiking/Processing Array (spARR) is a novel photonic focal plane that uses pixels which generate electronic spikes autonomously and without a clock. These spikes feed into a network of digital asynchronous processing elements or DAPES. By building a useful assemblage of DAPES, and connecting them together in the correct way, sophisticated signal processing can be accomplished within the focal plane. Autonomous self-resetting pixels (AsP) enable SPARR to generate electronic response with very small signals--as little as a single photon in the case of Geiger mode avalanche photodiodes to as few as several hundred photons for in-cmos photodetectors. These spiking pixels enable fast detector response, but do not draw as much continuous power as synchronous clocked designs. The spikes emitted by the pixels all have the same magnitude, the information from the scene is effectively encoded into the rate of spikes and the time at which the spike is emitted. The spiking pixels, having converted incident light into electronic spikes, supply the spikes to a network of digital asynchronous processors. These are small state machines which respond to the spikes arriving at their input ports by either remaining unchanged or updating their internal state and possibly emitting a spike on one or more output ports. We show a design that accomplishes the sophisticated signal processing of a Haar spatial wavelet transform with spatial-spectral whitening. We furthermore show how this design results in a data streams which support imaging and transient optical source detection. Two simulators support this analysis: SPICE and sparrow. The CMOS SPICE simulator Cadence provides accurate CMOs design with accounting for effects of circuit parasitics throughout layout, accurate timing, and accurate energy consumption estimates. To more rapidly assess larger networks with more pixels, sparrow is a custom discrete event simulator that supports the non-homogeneous Poisson processes that lie behind photoelectric interaction. Sparrow is a photon-exact simulator that nevertheless performs SPARR system simulator for large-scale systems.
This letter proposes a digital high-speed three-level space vector pulse width modulator (3L-SVPWM). A conventional 3L-SVPWM is typically computation-based, involving a sequential execution of sub-tasks on a digital signal processor (DSP) based controller. The resulting high computation time of 5.4 μs limits the implementation of additional control blocks for switching frequencies greater than 100 kHz. This is overcome by transforming sub-tasks into digital blocks with 1-0 decisions and simpler arithmetic operations. The sub-task blocks are executed concurrently on a programmable logic device (PLD). Hence, a fast 3L-SVPWM execution in 140 ns is achieved. The proposed digital 3L-SVPWM enables high switching frequency operation of wide bandgap (WBG) device-based 3 L inverters to generate high fundamental frequency waveforms. A finite state machine is an integral part of the proposed implementation with the ability to generate any vector sequence, maximizing the usage of redundant vector states in 3L-SVPWM. Here, the proposed digital 3L-SVPWM operation is demonstrated with a GaN-based 3 L active neutral point clamped (3L-ANPC) inverter. Experimental results are presented at 250 kHz switching frequency to generate vector sequences for center-aligned SVPWM (CA-SVPWM) and common mode voltage reduced SVPWM (CMVR-SVPWM). The results also showcase a high fundamental frequency generation capability of 10 kHz.
matsim-agents is a multi-agent AI framework for atomistic materials simulation and discovery. It orchestrates large language models (LLMs), machine-learned interatomic potentials (MLIPs), and DFT codes into a single agentic loop running on laptops and DOE leadership-class supercomputers. MULTI-AGENT ORCHESTRATION A LangGraph state machine with three nodes: a Planner that converts a natural-language research objective into structured tasks; an Executor that dispatches atomistic tools and loops until the queue is empty; and an Analyst that summarizes results into a human-readable report. State is checkpointed after every step and human-in-the-loop gates can be inserted at any edge. HYPOTHESIS-DRIVEN DISCOVERY CHAT An interactive REPL (matsim-agents chat) that couples LLM dialogue with atomistic simulation. Chemical formulas are automatically detected in conversation turns and trigger a full crystal-phase exploration: structure generation → relaxation → stability scoring → result injection back into the conversation, creating a closed hypothesis-refinement loop. CRYSTAL PHASE ENUMERATION Given a composition, the phase explorer enumerates prototypes by stoichiometry: elemental (fcc/bcc/hcp/sc/diamond), binary 1:1 (rocksalt/CsCl/zincblende/ wurtzite/fluorite/rutile), ternary 1:1:3 (cubic perovskite), ternary 1:2:4 (perovskite + spinel), quaternary 1:1:2:6 (Fm-3m double perovskite). 2-D prototypes (graphene, h-BN, MoS2 2H/1T) and multilayer stacking are also supported via --include-2d and --num-layers. SUPERCELL GENERATION AND SITE DECORATION Auto-tiling to a minimum atom count (--min-atoms), explicit NxNxN tiling (--supercell), symmetry-distinct site decorations (--n-orderings), and isotropic lattice-scale sweeps (--lattice-scales) for volume bracketing. MLFF RELAXATION AND STABILITY SCORING HydraGNN (multi-headed GNN) drives structure relaxation via ASE with FIRE, BFGS, or BFGSLineSearch. Stability output: delta-E/atom ranking across phases and a max-residual-force dynamical-stability proxy. Other MLIPs (MACE, NequIP, Orb) can be plugged in through the same interface. DFT BACKENDS Quantum ESPRESSO pw.x and VASP 6.6 are first-class labellers. Both have validated GPU builds and SLURM/PBS launchers for three DOE platforms: Frontier (AMD MI250X, ROCm), Aurora (Intel PVC, oneAPI), Perlmutter (NVIDIA A100, CUDA). QE produces ~100 binaries (pw.x, ph.x, epw.x, ...). VASP supports scf, relax, vc-relax, and vc-relax-shape run types. ACTIVE-LEARNING LOOP matsim-agents al run CONFIG.yaml drives an iterative HydraGNN-DFT loop: MD generates candidates → ensemble/MC-dropout uncertainty selects the most informative → DFT labels them in parallel inside one allocation → dataset grows → HydraGNN retrains → repeat. DFT backend is a single YAML toggle (dft.backend: vasp | qe). LLM-generated seed structures are supported (no curated POSCAR library needed). Config uses ${VAR}, ${VAR:-default}, ${VAR:?msg} shell-style substitution for cross-user/cross-site portability. LLM BACKENDS Ollama (local, default), vLLM (HPC multi-GPU serving), OpenAI, Anthropic, HuggingFace Transformers+Accelerate. Selected at runtime via flag or env var with no code changes. HPC PORTABILITY Same Python entry points run on Frontier (ROCm 7.2), Aurora (oneAPI), and Perlmutter (CUDA 12). DFT and ML stacks are never co-loaded in the same shell; they couple through the scheduler and filesystem. Advanced multi-node launchers (serve, discovery-chat, single-relaxation, active-learning, QE warm-start) are provided for all three platforms. CODABENCH COMPETITION BUNDLE A self-contained benchmark: 159 atomistic test structures across 11 material classes, 5 tasks (formation energy, forces, ML relaxation, AI-DFT relaxation, phase stability ranking), public/private leaderboard split (30/70), and four ready-to-run baselines: MACE-MP-0, HydraGNN, UMA, AllScAIP.
Steam turbines for an Advanced Ultra Super Critical (AUSC) fossil fired power plant will operate at temperatures well above those of current commercial steam cycles with inlet temperatures more than 760 C , which is beyond the capabilities of alloy steels presently used for steam turbine applications and requires advanced materials. Large components such as steam turbine rotors may be made of nickel based super alloys such as Haynes 282 (H282). However, monolithic forgings of superalloys in the sizes required for large steam turbines rotors can be prohibitively expensive besides many technical challenges. To minimize cost and alleviate the related technical challenges, superalloy use needs to be limited to locations on the steam turbine rotor where strength and temperature requirements cannot be met by conventional steels. This is possible if nickel-based superalloys can be successfully welded to steels and the related technical challenges - machining parts made of dissimilar welded materials, non-destructive examination of such welds for flaw detection; and, material properties of such hybrid components – are sufficiently addressed. In this technology development project, we successfully welded H282 to plates up to ~ 75 mm (~ 3 inches) to a 3.5NiCrMoV steel of similar thickness. Advanced ultrasonic inspection technique called Phased Array Ultrasonic Testing (PAUT) was employed to examine the dissimilar H282-Steel welds, into which flat bottomed side drilled holes (SDH) of various diameters were introduced, to determine the minimum detectable feature sizes; it was shown that with PAUT SDH of dia. down to 0.5 mm could be detected in the base alloys and SDH with dia. down to 2.4 mm could be detected in the weld metal under multiple orientations successfully. An autonomous machining process monitoring system was developed and demonstrated whereby the forces acting on the cutting tool could be actively monitored as the cutting tool transitioned from H282 to Steel across the weld using which the machining parameters can be potentially altered without interruption to extend tool life. This project successfully achieved its objectives of - i. Developing a welding methodology and viable welding geometries, to successfully join H282 to steel 3.5CrMoNiV steel to enable manufacture of modular steam turbine rotors for AUSC applications (conditions of at least 760 °Celsius and 3,100 psia (pounds per square inch absolute pressure) and evaluate the material properties of the welded specimen. ii. Employ the advanced ultrasonic inspection technique to the dissimilar weld metal joint and determine the minimum detectable feature sizes. iii. Develop effective machining techniques to machine such hybrid structures with online tool force monitoring and effect machine state metrics for optimal results.
Job scheduling and machine layout are interrelated in improving energy consumption (EC) and productivity measures such as tardiness and represent two important decisions that must be made by manufacturers. This interdependency can be explained by transportation time, which connects scheduling and layout. Scheduling and layout, however, have not been thoroughly studied in conjunction using an integrated model in the context of sustainable manufacturing. Hence, we propose an energy-aware optimization model in which scheduling is integrated with layout in a single-level framework. More specifically, a single objective function is defined to minimize the facility energy cost and the job tardiness penalty, which control EC and tardiness respectively in a flexible job shop system. In order to model machine EC more accurately, we also consider three different machine states: a processing state and two idle states. Our case studies show that the integrated model exhibits better performance in controlling manufacturing EC and job tardiness than a non-integrated model in which machine locations are uncontrollable and transportation times between machines are unchangeable. To deal with large-sized problems, we also introduce four new metaheuristics. The performances of these new metaheuristics are compared in terms of objective function values and CPU times using various case studies. The results indicate that a hybrid ant colony optimization and simulated annealing (ACO-SA) algorithm provides better performance than the other algorithms. Specifically, our case studies show that the integrated model using ACO-SA can improve the objective function value by around 5% when compared to the non-integrated model.
Stateflow is a widely used modeling framework for embedded and cyber physical systems where control software interacts with physical processes. In this work, we present a framework a fully automated safety verification technique for Stateflow models. Our approach is two-folded: (i) we faithfully compile Stateflow models into hierarchical state machines, and (ii) we use automated logic-based verification engine to decide the validity of safety properties. The starting point of our approach is a denotational semantics of State flow. We propose a compilation process using continuation-passing style (CPS) denotational semantics. Our compilation technique preserves the structural and modal behavior of the system. The overall approach is implemented as an open source toolbox that can be integrated into the existing Mathworks Simulink Stateflow modeling framework. We present preliminary experimental evaluations that illustrate the effectiveness of our approach in code generation and safety verification of industrial scale Stateflow models.
X-ray beamlines are essential components of all synchrotron light sources. Practical operations involve frequent variation in beamline component positions and orientation, particularly when photon beam parameters shift due to experimental needs, or due to variations in the incoming photon beam. The alignment process can be time consuming and takes away from valuable beam time for experimental data collection. We describe progress in the automation of certain alignment tasks on the tender-energy X-ray spectroscopy (TES) beamline at the National Synchrotron Light Source II (NSLS-II). The beamline is controlled using the BlueSky software in which high level experimental plans guide the beamline components during an experiment. Numerous software packages exist for beamline modeling, and they may be tied to the beamline control system using a package we are continuing to develop called Sirepo-Bluesky. The photon beam distribution may be measured with fluorescent screens, and a relation between beam and machine state can be found by varying the mirror and aperture settings over a multi-dimensional range. We describe the results of such parameter varying measurements and how we are combining Sirepo-Bluesky with machine learning methods and reduced models to automate mirror alignment on the TES beamline.
Discrete-event processes are modeled by state-machines in the Ramadge-Wonham framework with control by a feedback event disablement mechanism. In this paper, concepts of stabilization of discrete-event processes are defined and investigated. The possibility of driving a process (under control) from arbitrary initial states to a prescribed subset of the state set and then keeping it there indefinitely is examined. This stabilization property is studied also with respect to 'open-loop' processes and their asymptotic behavior is characterized. Polynomial time algorithms are presented for verifying various types of attraction and for the synthesis of attractors.
Two correctness criteria, the state consistency criterion and the property consistency criterion for process migration are discussed. The state machine approach is used to model the interactions between a user process and its environment. These criteria are defined in terms of the model. The idea of environment view was introduced to distinguish what a user process observes about its environment from what its environment state really is and argue that a consistent view of the environment must be maintained for every migrating process.