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Infusing New Technology into Microcircuit Standards: An Exciting Era
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Contamination control coatings for hybrids
Conductive particles unexpectedly present in hermetically sealed hybrid microcircuit packages pose a high risk of shorting the closely spaced planar conductors within the package, causing failure of the device. The present work evaluates commercially available organic coating materials and determines the most promising ones for protection of complex microcircuits against entrapped particulate contaminants. The candidate materials were exposed to a series of physical and electrical screening tests, the results of which were used as a basis for the final coating selection. Silicones and high-purity epoxies are found to not only display excellent compatibility with microcircuits but to improve the performance of microcircuits as to voltage breakdown between adjacent conductors.
An application protocol for CAD to CAD transfer of electronic information
The exchange of Computer Aided Design (CAD) information between dissimilar CAD systems is a problem. This is especially true for transferring electronics CAD information such as multi-chip module (MCM), hybrid microcircuit assembly (HMA), and printed circuit board (PCB) designs. Currently, there exists several neutral data formats for transferring electronics CAD information. These include IGES, EDIF, and DXF formats. All these formats have limitations for use in exchanging electronic data. In an attempt to overcome these limitations, the Navy's MicroCIM program implemented a project to transfer hybrid microcircuit design information between dissimilar CAD systems. The IGES (Initial Graphics Exchange Specification) format is used since it is well established within the CAD industry. The goal of the project is to have a complete transfer of microelectronic CAD information, using IGES, without any data loss. An Application Protocol (AP) is being developed to specify how hybrid microcircuit CAD information will be represented by IGES entity constructs. The AP defines which IGES data items are appropriate for describing HMA geometry, connectivity, and processing as well as HMA material characteristics.
The Assurance Challenges of Advanced Packaging Technologies for Electronics
Advances in microelectronic parts performance are driving towards finer feature sizes, three-dimensional geometries and ever-increasing number of transistor equivalents that are resulting in increased die sizes and interconnection (I/O) counts. The resultant packaging necessary to provide assemble-ability, environmental protection, testability and interconnection to the circuit board for the active die creates major challenges, particularly for space applications, Traditionally, NASA has used hermetically packaged microcircuits whenever available but the new demands make hermetic packaging less and less practical at the same time as more and more expensive, Some part types of great interest to NASA designers are currently only available in non-hermetic packaging. It is a far more complex quality and reliability assurance challenge to gain confidence in the long-term survivability and effectiveness of nonhermetic packages than for hermetic ones. Although they may provide more rugged environmental protection than the familiar Plastic Encapsulated Microcircuits (PEMs), the non-hermetic Ceramic Column Grid Array (CCGA) packages that are the focus of this presentation present a unique combination of challenges to assessing their suitability for spaceflight use. The presentation will discuss the bases for these challenges, some examples of the techniques proposed to mitigate them and a proposed approach to a US MIL specification Class for non-hermetic microcircuits suitable for space application, Class Y, to be incorporated into M. IL-PRF-38535. It has recently emerged that some major packaging suppliers are offering hermetic area array packages that may offer alternatives to the nonhermetic CCGA styles but have also got their own inspectability and testability issues which will be briefly discussed in the presentation,
Development for application of parylene coatings
A practical method of applying a parylene (paraxylene) coating to hybrid microcircuit devices was developed for the prevention of circuit malfunctions existing prior to package sealing or formed upon exposure to the service environment. It was found that paralene and an associated primer (if used) had generally little or no adverse effect on the active and passive elements of typical hybrid microcircuits. Exceptions were related to high frequency circuitry, low resistivity thick film resistors, and highly sensitive PIN diodes. Advantages of the use of the coating included increased dielectric strength and increased interconnection bond strength. Coating service life in nitrogen or nitrogen with low levels of oxygen as a contaminant is shown to be in excess of 1000 hours at 150 C and can be projected to be in excess of 5000 hours at 125 C.
Techniques of Final Preseal Visual Inspection
A dissertation is given on the final preseal visual inspection of microcircuit devices to detect manufacturing defects and reduce failure rates in service. The processes employed in fabricating monolithic integrated circuits and hybrid microcircuits, various failure mechanisms resulting from deficiencies in those processes, and the rudiments of performing final inspection are outlined.
Design and development of a 5 kV isolated solid state switch
A unique microcircuit intended for use as a shorting switch for large extraterrestrial solar cell arrays is described. The packaging design for the 5 kV isolated hybrid switch is different from most hybrid microcircuits in that it utilizes a compartmentalized plastic case (a portion of which is encapsulated), is not hermetic, and is designed for high voltage operation.
Contamination control in hybrid microelectronic modules. Part 2: Selection and evaluation of coating materials
The selection, test, and evaluation of organic coating materials for contamination control in hybrid circuits is reported. The coatings were evaluated to determine their suitability for use as a conformal coating over the hybrid microcircuit (including chips and wire bonds) inside a hermetically sealed package. Evaluations included ease of coating application and repair and effect on thin film and thick film resistors, beam leads, wire bonds, transistor chips, and capacitor chips. The coatings were also tested for such properties as insulation resistance, voltage breakdown strength, and capability of immobilizing loose particles inside the packages. The selected coatings were found to be electrically, mechanically, and chemically compatible with all components and materials normally used in hybrid microcircuits.
Design and development of a 5 kV isolated solid state switch
This paper describes the design and fabrication of a 5000 volt isolated hybrid switch developed by Hughes Aircraft Company under contract to NASA/Lewis. Hughes did the packaging design and NASA did the circuit design. This unique microcircuit is intended for use as a shorting switch for large extraterrestrial solar cell arrays. The packaging design for the 5 kV isolated hybrid switch is different from most hybrid microcircuits in that it utilizes a compartmentalized plastic case (a portion of which is encapsulated), is not hermetic, and is designed for high voltage operation.
Design, processing and testing of LSI arrays: Hybrid microelectronics task
Mathematical cost factors were generated for both hybrid microcircuit and printed wiring board packaging methods. A mathematical cost model was created for analysis of microcircuit fabrication costs. The costing factors were refined and reduced to formulae for computerization. Efficient methods were investigated for low cost packaging of LSI devices as a function of density and reliability. Technical problem areas such as wafer bumping, inner/outer leading bonding, testing on tape, and tape processing, were investigated.
Annual Conference on Nuclear and Space Radiation Effects, 16th, Santa Cruz, Calif., July 17-20, 1979, Proceedings
Papers are presented on the following topics: radiation effects in bipolar microcircuits; basic radiation mechanisms in materials and devices; energy deposition and dosimetry; and system responses from SGEMP, IEMP, and EMP. Also considered are basic processes in SGEMP and IEMP, radiation effects in MOS microcircuits, and space radiation effects and spacecraft charging.
Infrared Linear Imaging Array
Photodiodes, multiplexer, and preamp reside in hybrid ceramic package. Hybrid microcircuit produces 128-element line images of infrared scenes. Each picture element is 0.008-in. (0.2-mm) square. Even without image data processing, microcircuit resolves temperature differences as small as 0.05 degrees C in infrared images.
Procedures for precap visual inspection
Screening procedures for the final precap visual inspection of microcircuits used in electronic system components are described as an aid in training personnel unfamiliar with microcircuits. Processing techniques used in industry for the manufacture of monolithic and hybrid components are presented and imperfections that may be encountered during this inspection are discussed. Problem areas such as scratches, voids, adhesions, and wire bonding are illustrated by photomicrographs. This guide can serve as an effective tool in training personnel to perform precap visual inspections efficiently and reliably.
Space Shuttle flight test results of the Cosmic Ray Upset Experiment
CRUX is the first engineering flight experiment designed to test for the incidence of upsets in microcircuits by energetic particles. Harris HM 6504 4K x 1 static CMOS RAM's were used as the test device types in a 1.3 megabit memory which flew on two Shuttle flights. Ground (cyclotron) test information led to a prediction of about one error every 1000 days. No errors were experienced in 10 days of flight. While data were not in conflict with the error prediction and do support it, quantitative validation of the modeling for upsets is not statistically possible. Follow-on hardware (CRUX III) incorporates five different state-of-the-art microcircuits, and is scheduled for flight in October 1984.
System considerations for efficient communication and storage of MSTI image data
The Ballistic Missile Defense Organization has been developing the capability to evaluate one or more high-rate sensor/hardware combinations by incorporating them as payloads on a series of Miniature Seeker Technology Insertion (MSTI) flights. This publication represents the final report of a 1993 study to analyze the potential impact f data compression and of related communication system technologies on post-MSTI 3 flights. Lossless compression is considered alone and in conjunction with various spatial editing modes. Additionally, JPEG and Fractal algorithms are examined in order to bound the potential gains from the use of lossy compression. but lossless compression is clearly shown to better fit the goals of the MSTI investigations. Lossless compression factors of between 2:1 and 6:1 would provide significant benefits to both on-board mass memory and the downlink. for on-board mass memory, the savings could range from $5 million to $9 million. Such benefits should be possible by direct application of recently developed NASA VLSI microcircuits. It is shown that further downlink enhancements of 2:1 to 3:1 should be feasible thorough use of practical modifications to the existing modulation system and incorporation of Reed-Solomon channel coding. The latter enhancement could also be achieved by applying recently developed VLSI microcircuits.