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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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High speed klystron cathode pulser requires low voltage to generate high-voltage pulses. Broadband video transformers are wound in two configurations - /1/ transmission line, multifilar toroids and /2/ loop coupling toroids. The circuit adapts to generate high-speed, high-voltage, high-stability power pulses at megawatt levels.
Generic concepts for the installation of power data and thermal fluid distribution lines on large space platforms were discussed. Connections with central utility subsystem modules and pallet interfaces were also considered. Three system concept study platforms were used as basepoints for the detail development. The tradeoff of high voltage low voltage power distribution and the impact of fiber optics as a data distribution mechanism were analyzed. Thermal expansion and temperature control of utility lines and ducts were considered. Technology developments required for implementation of the generic distribution concepts were identified.
The availability of high density, radiation tolerant, nonvolatile memories is critical for space applications. Ferroelectric memories, when fabricated with radiation hardened complementary metal oxide semiconductors (CMOS), can be manufactured and packaged to provide high density replacements for Flash memory, which is not radiation tolerant. Previous work showed ferroelectric memory cells to be resistant to single event upsets and proton irradiation, and ferroelectric storage capacitors to be resistant to neutron exposure. In addition to radiation hardness, the fast programming times, virtually unlimited endurance, and low voltage, low power operation make ferroelectric memories ideal for space missions. Previously, a commercial double level metal 64-kilobit ferroelectric memory was presented. Although the capabilities of radiation hardened wafer fabrication facilities lag behind those of the most modern commercial wafer fabrication facilities, several paths to achieving radiation tolerant, dense ferroelectric memories are emerging. Both short and long term solutions are presented in this paper. Although worldwide major semiconductor companies are introducing commercial ferroelectric memories, funding limitations must be overcome to proceed with the development of high density, radiation tolerant ferroelectric memories.
Lateral CNT Switches: a) dc CNT switches were demonstrated to operate at low voltages, low powers and high speeds. b) RF simulations of switch in series configuration with metallized tube yielded good RF performance 1) Isolation simulated to be approx. 20 dB at 100 GHz. 2) Insertion loss simulated to be < 0.5 dB at 100 GHz. Vertical CNT Switches: a) Thermal CVD was used to mechanically constrain tubes in nanopockets; tubes not self-supporting. b) Demonstrated growth of vertically aligned arrays and single-few MWNTs using dc PECVD with Ni catalyst using optical lithography.
Distributed Energy Resources (DER) with smart inverters are becoming more prevalent as the need for renewable energy and grid stability increases. An important challenge arises when considering that inverterbased generation methods contribute less current during faults, rendering traditional overcurrent protection unsatisfactory. DERs have fault ride-through requirements when operating in high or low voltage, outlined by IEEE Std. 1547-2018. Faults cause the voltage to reach abnormal steady state magnitudes, depending on the fault resistance and fault type. There are several high voltage and low voltage ride-through zones defined by IEEE Std. 1547-2018. Each zone’s ride through duration decreases as the applicable voltage measurement, i.e., the phase RMS voltage, deviates from its nominal value. This presentation demonstrates the implementation of IEEE Std. 1547-2018 high and low voltage ridethrough grid support functions using a preexisting RSCAD model, discussing the challenges presented during this process. The implemented controls monitor the filtered phase voltages to have a more accurate reading of the applicable voltages. The controls sense the duration that the applicable voltage remains in a specific zone. The breaker trips and ceases energization to the grid when the duration is exceeded. The standard allows the operator to adjust the ride-through times and voltage zones from the default settings. These ranges are implemented into the runtime, which acts as the operator’s SCADA. The results show the accuracy of the voltage measurements, which remain within the IEEE Std. 1547-2018 for all cases.
This paper aims to present a two-stages auxiliary power supply (APS) providing 24 V output over a wide input DC voltage range, from 600 V to 2 kV. In this architecture, the medium voltage to low voltage scale is addressed by a simplified DC transformer (DCX) stage while the low voltage tight regulation is proposed to be accomplished in a cascaded second stage. Such architecture provides a simpler approach to the industry for the design of APS in MV applications. The implementation of main building blocks of the APS including the DCX stage, startup circuit and self-powered circuit is described. Experimental results at 1400 V and 100 W are presented.
Typical voltage levels from medium-voltage (MV) applications introduce additional challenges to designing the auxiliary power supply (APS) necessary to provide power to the secondary circuits of the main converter. This paper aims to present the design of a 100 W APS for 0.6–2 kV input DC voltage and 24 V output. The selected architecture addresses the medium voltage to low voltage challenge by adopting two stage approach – a simple robust DC transformer (DCX) stage and a low voltage regulation stage. The design of the main building blocks of the APS are described followed by simulation results.
The 9500 Node Test System is a representative section of distribution power system model developed as a part of the GridAPPS-D™ project, an effort funded by DOE as a part of the Grid Modernization Lab Consortium (GMLC) program. The test system was developed to fulfill a growing need to represent the rapidly evolving state of electric distribution systems by combining elements of legacy infrastructure systems, modern feeder topologies, and an anticipated future with smart grid technologies. It also provides a network model capable of supporting the simulation of operational scenarios such as the ones in a utility distribution control center. This test system allows the evaluation of the performance of advanced power applications in real-time, such as one that simulates the operations of an Advanced Distribution Management Systems (ADMS), Distributed Energy Resource Management Systems (DERMS), etc. in a Distribution control center. This model is an extension of the widely used IEEE 8500 Node Test Feeder and is currently being validated to become an IEEE test case to help increase adoption and widespread usage among both academia and industry. It is a full-size model representative of a section of a utility’s distribution system with multiple feeders fed from different substations. The model includes multiple distribution circuits, a sub-transmission system, multiple substations, behind the meter customer rooftop photovoltaics (PV), and multiple utility-scale distributed energy resources. To enable accurate simulations of operational scenarios, the 9500 Node Test System is designed to support procedure-based operations, with the ability to realistically demonstrate switching operations, feeder reconfiguration, adjustment of volt-var control equipment, dispatch of distributed generation, and response to planned and unplanned outages. The 9500 Node Test System includes three radial distribution feeders with 12.3 MVA of average load, consisting of both medium voltage and low voltage equipment each supplied by a different distribution substation. The three distribution feeders are connected to each other through Normally-Open switches which can be closed when needed to simulate restoration scenarios due to a fault. One feeder represents today’s grid with low penetration of customer-side renewables. The second represents a potential future grid with microgrids and 100% renewable penetration. The third has no customer generation resources, a district steam plant, and a utility-scale solar farm. The three diverse circuits were created to allow the simulation of both today’s situation as well as potential future scenarios. All three feeders have customers connected by low-voltage secondary triplex lines. This test system meets all requirements outlined in the report for creating a simulation environment that would enable discussion between key technical stakeholders as well as having the potential to accelerate operational application development and their subsequent testing and integration. The new model is a possible representation of what we believe the distribution grid may look like in the future: a high penetration of renewables, reconfigurable radial and mesh topology, numerous DERs, islanded microgrids, and significantly increased data and measurement density. The system supports both the solution of existing and newer algorithms but also enables the evaluation of applications in a realistic operational environment defined by task oriented procedural steps that represent the interaction between the control center operator and field personnel.
Traditionally, distribution system state estimations (DSSE) are challenged by the lack of measurements at both primary and secondary sides of the system. The widely available cable television (CATV) voltage sensors installed in low-voltage (LV) networks bring opportunities to achieve higher quality DSSE covering a broader area of the distribution network. This study proposes a medium-/low-voltage (MV/LV) joint distribution system state estimation approach using the untapped CATV measurements. It aims at addressing the need for system situational awareness at the grid edge while improving the estimation accuracy at both the primary and secondary sides compared to its disjointed counterpart. Linearized measurement functions and boundary condition uncertainty propagation rules are derived to ensure the computational efficiency and accuracy of the joint state estimator. Numerical experiments are conducted on an IEEE test feeder to demonstrate the efficacy of the proposed method and the value of CATV measurements.
Nano-second, capillary discharges (nCDs) are unique plasma sources in their ability to sustain high specific energy deposition ω dep approaching 10 eV/molecule in molecular gases. This high energy loading on short timescales produces both high plasma densities and high densities of molecular exited states. These high densities of electrons and excited states interact with each other during the early afterglow through electron collision quenching and associative ionization. In this paper we discuss results from a two-dimensional computational investigation of a nCD sustained in air at a pressure of 28.5 mbar and with a voltage amplitude 20 kV. Discharges were investigated for two circuit configurations—a floating low voltage electrode and with the low voltage electrode connected to ground through a ballast resistor. The first configuration produced a single ionization wave from the high to low voltage electrode. The second produced converging ionization waves beginning at both electrodes. With a decrease of the tube radius, the velocity of the ionization fronts decreased while the shape of the ionization wave changed from the electron density being distributed smoothly in the radial direction, to being hollow shaped where there is a higher electron density near the tube wall. For sufficiently small tubes, the near-wall maxima merge to have the higher density on the axis of the capillary tube. In the early afterglow, the temporal and radial behavior of the N 2 (C 3 Π u ) density is a sensitive function of ω dep due to electron collision quenching. Finally, these trends indicate that starting from ω dep $\geqslant$ 0.3 eV/molecule, it is necessary to take into account interactions of electrons with electronically excited species during the discharge and early afterglow.
This study reports on p-channel bottom-gate organic thin-film transistors (OTFT) that achieve low-voltage operation with a thin bilayer gate dielectric of CYTOP/HfO 2 that also leads to high operational stability. A bottom-gate geometry allows the thickness of the gate dielectric to be reduced to 17 nm, thereby increasing the gate dielectric capacitance density to a value of up to 258 nF/cm 2 . All OTFTs yielded threshold voltages (V TH ) lower than -1 V, thereby providing minimum operating voltage (gate to source voltage ~ V TH ) of -1 V with field-effect mobility values in the range from 0.3 to 0.8 cm 2 /Vs and subthreshold swing values below 100 mV/dec. Operational stability during DC bias stress was found similar to that measured in devices with a top-gate geometry, with about 1% of drain current change after 6 h. Here, using a double-stretched exponential function, the operational stability characteristics were modeled. It was found that by increasing the metal oxide layer thickness, the threshold voltage can shift toward positive values under DC stress tests. For CYTOP layer thicknesses above 15 nm, a thicker CYTOP layer was found to shift the threshold voltage in the opposite direction toward negative values. Furthermore, these p-channel bottom-gate organic transistor with a bilayer gate dielectric of CYTOP/HfO 2 combine high mobility, high operational stability, and lower voltage operation of -1 V compared to top-gate OTFTs.
Low-input voltage converter/regulator constructed in a coaxial configuration minimizes external magnetic field disturbance, suppresses radio noise interference, and provides excellent heat transfer from power transistors. It converts the output of fuel and solar cells, thermionic diodes, thermoelectric generators, and electrochemical batteries to a 28 V dc output.
High power low saturation voltage silicon switching transistor
Higher efficiency and reliability are needed in the rectification used to produce low output voltages. To this end, the application of driven synchronous rectifier circuits is investigated. One reliability problem of such circuits, the ?double-on' resulting from storage time, is illustrated for low output voltages obtained from rectification of the square-wave outputs of low input voltage converters. A comparison of the rectification efficiency and reliability of driven transistor synchronous rectifiers with that of barrier diodes indicates that the choice of rectifiers in low output voltage applications is dependent on both the source and output voltage levels of the application.
A silicon carbide brassboard power processing unit has been developed by the NASA Glenn Research Center in Cleveland, Ohio. The power processing unit operates from two sources: a nominal 300 Volt high voltage input bus and a nominal 28 Volt low voltage input bus. The design of the power processing unit includes four low voltage, low power auxiliary supplies, and two parallel 7.5 kilowatt (kW) discharge power supplies that are capable of providing up to 15 kilowatts of total power at 300 to 500 Volts (V) to the thruster. Additionally, the unit contains a housekeeping supply, high voltage input filter, low voltage input filter, and master control board, such that the complete brassboard unit is capable of operating a 12.5 kilowatt Hall effect thruster. The performance of the unit was characterized under both ambient and thermal vacuum test conditions, and the results demonstrate exceptional performance with full power efficiencies exceeding 97%. The unit was also tested with a 12.5kW Hall effect thruster to verify compatibility and output filter specifications. With space-qualified silicon carbide or similar high voltage, high efficiency power devices, this would provide a design solution to address the need for high power electric propulsion systems.
A silicon carbide brassboard power processing unit has been developed by the NASA Glenn Research Center in Cleveland, Ohio. The power processing unit operates from two sources - a nominal 300-Volt high voltage input bus and a nominal 28-Volt low voltage input bus. The design of the power processing unit includes four low voltage, low power supplies that provide power to the thruster auxiliary supplies, and two parallel 7.5 kilowatt power supplies that are capable of providing up to 15 kilowatts of total power at 300-Volts to 500-Volts to the thruster discharge supply. Additionally, the unit contains a housekeeping supply, high voltage input filter, low voltage input filter, and master control board, such that the complete brassboard unit is capable of operating a 12.5 kilowatt Hall Effect Thruster. The performance of unit was characterized under both ambient and thermal vacuum test conditions, and the results demonstrate the exceptional performance with full power efficiencies exceeding 97. With a space-qualified silicon carbide or similar high voltage, high efficiency power device, this design could evolve into a flight design for future missions that require high power electric propulsion systems.
Design and developement of high power, low voltage silicon switching transistor
A low power voltage control circuit for use in space missions includes a switching device coupled between an input voltage and an output voltage. The switching device includes a control input coupled to an enable signal, wherein the control input is configured to selectively turn the output voltage on or off based at least in part on the enable signal. A current monitoring circuit is coupled to the output voltage and configured to produce a trip signal, wherein the trip signal is active when a load current flowing through the switching device is determined to exceed a predetermined threshold and is inactive otherwise. The power voltage control circuit is constructed of space qualified components.