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At least 145 records · Page 8
All sourcesNASA NTRSDOE OSTI
DOE OSTI2025

Low-latency quantum control using AI algorithms on cryogenic microelectronics platforms

Superconducting quantum computers are a particular technology that involve the realization of qubits by means of LC circuits with a Josephson junction. As shown in Fig. 1, this latter addition has the effect of introducing a nonlinearity (anharmonicity) that makes the frequency spacing between each energy level non-uniform. This is a desired effect for separating the two lowest levels, used for computation, from the higher ones, that are theoretically infinite and which are not desired to be used.

97 MATHEMATICS AND COMPUTING↗
NASA NTRS1981

Methodology for measurement of fault latency in a digital avionic miniprocessor

Using a gate level emulation of a typical avionics miniprocessor, fault injection experiments were performed to (1) determine the time to detect a fault by comparison monitoring, (2) forecast a program's ability to detect faults and (3) validate the fault detection coverage of a typical self test program. To estimate time to detect, six programs ranging in complexity from 6 to 147 instructions, were emulated. Each program was executed repetitively in the presence of a single stuck at fault at a gate node or device pin. Detection was assumed to occur whenever the computed outputs differed from the corresponding outputs of the same program executed in a nonfaulted processor. Histograms of faults detected versus number of repetitions to detection were tabulated. Using a simple model of fault detection, which was based in an analog with the selection of balls in an urn, distributions of time to detect were computed and compared with those obtained empirically. A self test program of 2,000 executable instructions was designed expressly for the study. The only requirement imposed on the design was that it should achieve 95% coverage. The program was executed in the presence of a single stuck-at fault at a gate node on device pin. The proportion of detected faults are tabulated. In all experiments faults were selected at random over gate nodes or device pins.

Mcgough, J. C.↗
NASA NTRS1981

Methodology for measurement of fault latency in a digital avionic miniprocessor

Investigations regarding the synthesis of a reliability assessment capability for fault-tolerant computer-based systems have been conducted for several years. In 1978 a pilot study was conducted to test the feasibility of measuring detection coverage and investigating the dynamics of fault propagation in a digital computer. A description is presented of an investigation concerned with the applicability of previous results to a real avionics processor. The obtained results show that emulation is a practicable approach to failure modes and effects analysis of a digital processor. The run time of the emulated processor on a PDP-10 host computer is only 20,000 to 25,000 times slower than the actual processor. As a consequence large numbers of faults can be studied at relatively little cost and in a timely manner.

Mcgough, J. G.↗
NASA NTRS1983

Measurement of fault latency in a digital avionic mini processor, part 2

The results of fault injection experiments utilizing a gate-level emulation of the central processor unit of the Bendix BDX-930 digital computer are described. Several earlier programs were reprogrammed, expanding the instruction set to capitalize on the full power of the BDX-930 computer. As a final demonstration of fault coverage an extensive, 3-axis, high performance flght control computation was added. The stages in the development of a CPU self-test program emphasizing the relationship between fault coverage, speed, and quantity of instructions were demonstrated.

Mcgough, J.↗
NASA NTRS1988

A method of measuring fault latency in a digital flight control system

This paper describes the motivation, conduct, and analysis of some 2500 low-level hardware fault cases applied in automated testing at the NASA Ames Reconfigurable Digital Flight Control System Facility. Fault detection was correlated with hardware and software fault monitoring and, in limited cases, with sensitivity to flight program execution modes. The results are statistically assessed to ascertain system-level reliability implications based on a single-fault model. Extension to multiple-fault models is addressed. The overall methodology/facility itself is judged to be a promising enhancement to current practice.

Mcgough, John↗
NASA NTRS1994

Non-blocking crossbar permutation engine with constant routing latency

The invention is embodied in an N x N crossbar for routing packets from a set of N input ports to a set of N output ports, each packet having a header identifying one of the output ports as its destination, including a plurality of individual links which carry individual packets. Each link has a link input end and a link output end, a plurality of switches. Each of the switches has at least top and bottom switch inputs connected to a corresponding pair of the link output ends and top and bottom switch outputs connected to a corresponding pair of link input ends, whereby each switch is connected to four different links. Each of the switches has an exchange state which routes packets from the top and bottom switch inputs to the bottom and top switch outputs, respectively, and a bypass state which routes packets from the top and bottom switch inputs to the top and bottom switch outputs, respectively. A plurality of individual controller devices governing respective switches for sensing from a header of a packet at each switch input for the identity of the destination output port of the packet and selecting one of the exchange and bypass states in accordance with the identity of the destination output port and with the location of the corresponding switch relative to the destination output port.

Monacos, Steve P.↗
NASA NTRS1980

Effect of Ablation of Area Postrema on Frequency and Latency of Motion Sickness-Induced Emesis in the Squirrel Monkey

Twelve young adult squirrel monkeys of the Bolivian subspecies were subjected to continuous counter-clockwise horizontal rotary motion at 25 rpm, together with a sinusoidal vertical excursion of 6 in. every 2 sec (0.5 Hz). Each animal was exposed to this motion regimen for a period of 60 min once each week for three consecutive weeks. Following the third weekly motion test bilateral ablation of the Area Postrema (AP) was performed in eight of the animals by thermal cautery. Two control animals were sham-operated after the third motion test while two additional controls were given the motion tests as noted above but were not operated. The four controls were considered as a single group for statistical analyses of results of the motion tests. After a recovery period of 30 to 40 days, and at a comparable interval in the non-operated controls, each animal was again tested for motion sensitivity for three consecutive weeks. The brains of all of the animals were then fixed by left ventriculal cardiac perfusion with Bouin's fluid and processed for histological evaluation of the bilateral AP ablation in comparison with the control brains. Five of the AP-ablated animals postoperatively were completely refractory to the motion stimuli, two exhibited a decreased number of emetic responses, and one exhibited the same number of responses before and after the AP lesions. The controls exhibited no significant difference in emetic sensitivity on the second series of three weekly tests than on the first series. The results of this investigation appear to be in agreement with the observations of Wang and Chinn in the dog indicating that the integrity of the AP (CTZ) is essential to the emetic response to motion.

Brizzee, K. R.↗
NASA NTRS1997

Study and Simulation of Enhancements for TCP (Transmission Control Protocol) Performance Over Noisy, High-Latency Links

The designers of the TCP/IP protocol suite explicitly included support of satellites in their design goals. The goal of the Internet Project was to design a protocol which could be layered over different networking technologies to allow them to be concatenated into an internet. The results of this project included two protocols, IP and TCP. IP is the protocol used by all elements in the network and it defines the standard packet format for IP datagrams. TCP is the end-to-end transport protocol commonly used between end systems on the Internet to derive a reliable bi-directional byte-pipe service from the underlying unreliable IP datagram service. Satellite links are explicitly mentioned in Vint Cerf's 2-page article which appeared in 1980 in CCR [2] to introduce the specifications for IP and TCP. In the past fifteen years, TCP has been demonstrated to work over many differing networking technologies, including over paths including satellites links. So if satellite links were in the minds of the designers from the beginning, what is the problem? The problem is that the performance of TCP has in some cases been disappointing. A goal of the authors of the original specification of TCP was to specify only enough behavior to ensure interoperability. The specification left a number of important decisions, in particular how much data is to be sent when, to the implementor. This was deliberately' done. By leaving performance-related decisions to the implementor, this would allow the protocol TCP to be tuned and adapted to different networks and situations in the future without the need to revise the specification of the protocol, or break interoperability. Interoperability would continue while future implementations would be allowed flexibility to adapt to needs which could not be anticipated at the time of the original protocol design.

Shepard, Timothy J.↗
NASA NTRS2001

A Latency-Tolerant Partitioner for Distributed Computing on the Information Power Grid

NASA's Information Power Grid (IPG) is an infrastructure designed to harness the power of graphically distributed computers, databases, and human expertise, in order to solve large-scale realistic computational problems. This type of a meta-computing environment is necessary to present a unified virtual machine to application developers that hides the intricacies of a highly heterogeneous environment and yet maintains adequate security. In this paper, we present a novel partitioning scheme. called MinEX, that dynamically balances processor workloads while minimizing data movement and runtime communication, for applications that are executed in a parallel distributed fashion on the IPG. We also analyze the conditions that are required for the IPG to be an effective tool for such distributed computations. Our results show that MinEX is a viable load balancer provided the nodes of the IPG are connected by a high-speed asynchronous interconnection network.

Das, Sajal K.↗
NASA NTRS2004

Command and Telemetry Latency Effects on Operator Performance during International Space Station Robotics Operations

International Space Station (ISS) operations will require the on-board crew to perform numerous robotic-assisted assembly, maintenance, and inspection activities. Current estimates for some robotically performed maintenance timelines are disproportionate and potentially exceed crew availability and duty times. Ground-based control of the ISS robotic manipulators, specifically the Special Purpose Dexterous Manipulator (SPDM), is being examined as one potential solution to alleviate the excessive amounts of crew time required for extravehicular robotic maintenance and inspection tasks.

Currie, Nancy J.↗