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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 145 records · Page 8
All sourcesNASA NTRSDOE OSTI
NASA NTRS2002

SSP Technology Investigation of a High-Voltage DC-DC Converter

The goal of this project was to establish the feasibility of a high-voltage DC-DC converter based on a rod-array triggered vacuum switch (RATVS) for the Space Solar Power system. The RATVS has many advantages over silicon and silicon-carbide devices. The RATVS is attractive for this application because it is a high-voltage device that has already been demonstrated at currents in excess of the requirement for an SSP device and at much higher per-device voltages than existing or near-term solid state switching devices. The RATVS packs a much higher specific power rating than any solid-state device and it is likely to be more tolerant of its surroundings in space. In addition, pursuit of an RATVS-based system would provide NASA with a nearer-term and less expensive power converter option for the SSP.

Pappas, J. A.↗
NASA NTRS1989

Solid-state non-volatile electronically programmable reversible variable resistance device

A solid-state variable resistance device (10) whose resistance can be repeatedly altered by a control signal over a wide range, and which will remain stable after the signal is removed, is formed on an insulated layer (14), supported on a substrate (12) and comprises a set of electrodes (16a, 16b) connected by a layer (18) of material, which changes from an insulator to a conductor upon the injection of ions, covered by a layer (22) of material with insulating properties which permit the passage of ions, overlaid by an ion donor material (20). The ion donor material is overlaid by an insulating layer (24) upon which is deposited a control gate (26) located above the contacts. In a preferred embodiment, the variable resistance material comprises WO.sub.3, the ion donor layer comprises Cr.sub.2 O.sub.3, and the layers sandwiching the ion donor layer comprise silicon monoxide. When a voltage is applied to the gate, the resistance between the electrode contacts changes, decreasing with positive voltage and increasing with negative voltage.

Ramesham, Rajeshuni↗
NASA NTRS1990

Nonvolatile Ionic Two-Terminal Memory Device

Conceptual solid-state memory device nonvolatile and erasable and has only two terminals. Proposed device based on two effects: thermal phase transition and reversible intercalation of ions. Transfer of sodium ions between source of ions and electrical switching element increases or decreases electrical conductance of element, turning switch "on" or "off". Used in digital computers and neural-network computers. In neural networks, many small, densely packed switches function as erasable, nonvolatile synaptic elements.

Williams, Roger M.↗
NASA NTRS1990

Solid-state reprogrammable analog resistive devices for electronic neural networks

The fabrication and performance of WO3-based, solid-state, three-terminal device configurations as programmable analog memory elements are reported. These transistorlike device structures exhibit good resistance progammability with a remarkable resolution of a few percent of the resistive strength over a four orders of magnitude dynamic range. The most critical component of these devices is an insulating layer between the active WO3 and the cation donor layer. The progamming characteristics and operation mechanisms of the device are described, and probable reaction mechanisms critical to the device stability are discussed.

Ramesham, R.↗
NASA NTRS1985

Total integrated dose testing of solid-state scientific CD4011, CD4013, and CD4060 devices by irradiation with CO-60 gamma rays

The total integrated dose response of three CMOS devices manufactured by Solid State Scientific has been measured using CO-60 gamma rays. Key parameter measurements were made and compared for each device type. The data show that the CD4011, CD4013, and CD4060 produced by this manufacturers should not be used in any environments where radiation levels might exceed 1,000 rad(Si).

Dantas, A. R. V.↗
NASA NTRS2014

5.8kV SiC PiN Diode for Switching of High-Efficiency Inductive Pulsed Plasma Thruster Circuits

Inductive Pulsed Plasma Thruster (IPPT) pulse circuits, such as those needed to operate the Pulsed Inductive Thruster (PIT), are required to quickly switch capacitor banks operating at a period of μs while conducting current at levels on the order of at least 10 kA. [1,2] For all iterations of the PIT to date, spark gaps have been used to discharge the capacitor bank through an inductive coil. Recent availability of fast, high‐power solid state switching devices makes it possible to consider the use of semiconductor switches in modern IPPTs. In addition, novel pre‐ionization schemes have led to a reduction in discharge energy per pulse for electric thrusters of this type, relaxing the switching requirements for these thrusters. [3,4] Solid state switches offer the advantage of greater controllability and reliability, as well as decreased drive circuit dimensions and mass relative to spark gap switches. The use of solid state devices such as Integrated Gate Bipolar Transistors (IGBTs), Gate Turn‐off Thyristors (GTOs) and Silicon‐Controlled Rectifiers (SCRs) often involves the use of power diodes. These semiconductor devices may be connected antiparallel to the switch for protection from reverse current, or used to reduce power loss in a circuit by clamping off current ringing. In each case, higher circuit efficiency may be achieved by using a diode that is able to transition, or 'switch,' from the forward conducting state ('on' state) to the reverse blocking state ('off' state) in the shortest amount of time, thereby minimizing current ringing and switching losses. Silicon Carbide (SiC) PiN diodes offer significant advantages to conventional fast‐switching Silicon (Si) diodes for high power and fast switching applications. A wider band gap results in a breakdown voltage 10 times that of Si, so that a SiC device may have a thinner drift region for a given blocking voltage. [5] This leads to smaller, lighter devices for high voltage applications, as well as reduced forward conduction losses, faster reverse recovery time (faster turn‐off), and lower‐magnitude reverse recovery current. In addition, SiC devices have lower leakage current as compared to their Si counterparts, and a high thermal conductivity, potentially allowing the former to operate at higher temperatures with a smaller, lighter heatsink (or no heatsink at all).

Toftul, Alexandra↗
DOE OSTI2024

Facile Interfacial Reduction Suppresses Redox Chemical Expansion and Promotes the Polaronic to Ionic Transition in Mixed Conducting (Pr,Ce)O 2−δ Nanoparticles

Mixed ionic/electronic conductors (MIECs) are essential components of solid-state electrochemical devices, such as solid oxide fuel/electrolysis cells. For efficient performance, MIECs are typically nanostructured, to enhance the reaction kinetics. However, the effect of nanostructuring on MIEC chemo-mechanical coupling and transport properties, which also impact cell durability and efficiency, has not yet been well understood. Here, in this work, Pr 0.2 Ce 0.8 O 2−δ (PCO20) nanopowders were prepared by coprecipitation, then sintered in a modified dilatometer at three different temperatures (600, 725, and 850 °C) for microstructure evolution, resulting in three samples with different average particle sizes (23, 30, and 53 nm). The chemical strain and electronic/ionic conductivity were then measured simultaneously on stable nanostructures in four isotherms from 550 to 400 °C with steps in pO 2 (1 to 10 –4 atm O 2 ). A microcrystalline bar was prepared and measured for comparison. Particle size reduction led to a monotonically decreasing isothermal redox chemical strain, confirmed by in situ high-temperature, controlled-atmosphere XRD measurements. The corresponding conductivity measurements provided defect chemical insight into the particle size-dependent chemical expansion behavior. The significant weakening of the pO 2 dependence and decreased activation energy for electrical conduction with decreasing particle size indicated a decrease in the reduction enthalpy of PCO, shifting the transition from (Pr) polaronic to ionic behavior to higher pO 2 . STEM-EELS measurements confirmed the majority of Pr was reduced to 3+ in the nanoparticles, while Ce remained 4+. These results demonstrate suppression of deleterious chemical expansion and tailoring of the dominant charge carrier simply through controlling the particle size, providing insights for MIEC microstructural design.

ceria↗
NASA NTRS2008

Radiation-Insensitive Inverse Majority Gates

To help satisfy a need for high-density logic circuits insensitive to radiation, it has been proposed to realize inverse majority gates as microscopic vacuum electronic devices. In comparison with solid-state electronic devices ordinarily used in logic circuits, vacuum electronic devices are inherently much less adversely affected by radiation and extreme temperatures. The proposed development would involve state-of-the-art micromachining and recent advances in the fabrication of carbon-nanotube-based field emitters. A representative three-input inverse majority gate would be a monolithic, integrated structure that would include three gate electrodes, six bundles of carbon nanotubes (serving as electron emitters) at suitable positions between the gate electrodes, and an overhanging anode. The bundles of carbon nanotubes would be grown on degenerately doped silicon substrates that would be parts of the monolithic structure. The gate electrodes would be fabricated as parts of the monolithic structure by means of a double-silicon-on-insulator process developed at NASA's Jet Propulsion Laboratory. The tops of the bundles of carbon nanotubes would lie below the plane of the tops of the gate electrodes. The particular choice of shapes, dimensions, and relative positions of the electrodes and bundles of carbon nanotubes would provide for both field emission of electrons from the bundles of carbon nanotubes and control of the electron current to obtain the inverse majority function, which is described in the paper.

Manohara, Harish↗
NASA NTRS2005

500(deg)C electronics for harsh environments

Solid state vacuum devices (SSVDs) are a relatively new class of electronic devices. Innosys is a leading producer of high frequency SSVDs for a number of applications, including RF communications. SSVDs combine features inherent to both solid state and vacuum transistors. Electron transport can be by solid state or vacuum or both. The focus of this talk is on thermionic SSVDs, in which the primary vacuum transport is by thermionically liberated electron emission.

high temperature electronics↗
NASA NTRS1980

Solid state SPS microwave generation and transmission study. Volume 1: Phase 2

The solid state sandwich concept for Solar Power Station (SPS) was investigated. The design effort concentrated on the spacetenna, but did include some system analysis for parametric comparison reasons. The study specifically included definition and math modeling of basic solid state microwave devices, an initial conceptual subsystems and system design, sidelobe control and system selection, an assessment of selected system concept and parametric solid state microwave power transmission system data relevant to the SPS concept. Although device efficiency was not a goal, the sensitivities to design of this efficiency were parametrically treated. Sidelobe control consisted of various single step tapers, multistep tapers, and Gaussian tapers. A preliminary assessment of a hybrid concept using tubes and solid state is also included. There is a considerable amount of thermal analysis provided with emphasis on sensitivities to waste heat radiator form factor, emissivity, absorptivity, amplifier efficiency, material and junction temperature.

Maynard, O. E.↗
NASA NTRS2019

Molten Target Sputtering: Non-Conventional Method for High Mobility Si0.15Ge0.85 Growth at 500°C

Since electrons travel over 100 times faster in Silicon-Germanium (SiGe) than in pure Si due to the low effective masses associated with Ge and SiGe-based devices continue to replace Si-based solid-state electronic devices. SiGe thin film on sapphire was successfully grown at 890°C, using a magnetron sputtering system within heteroepitaxial framework. However, SiGe growth at 890oC is a costly and difficult process to produce as a uniform wafer for semiconductor device manufacturing due to thermal soak times, and geometric thermal shadowing from the wafer holder. To leverage the semiconducting capabilities of SiGe, novel processing techniques for SiGe film growth with decreased thermal loading are required. This paper introduces the Molten Target Sputtering (MTS) method that produces high mobility SiGe on sapphire below 500°C. This non-conventional method has the advantage of high kinetic energy, high-energy latency, and high flux density of sputtered atoms by combining benefits of both magnetron sputtering and thermal evaporation. For the MTS method, a 1~2 mm (depth and width) ring-shaped groove was cut between the center magnet and surrounded by electromagnets creating a circular cavity between the copper plate and source target materials that melt the target material. The SiGe grown from the MTS shows continuous morphology and 99.7% single crystal Si0.15Ge0.85 films. The Hall electron mobilities of the Si0.15Ge0.85 are 456 sq. cmV(exp -1)s(exp -1) and 123.9 sq. cmV(exp -1)s(exp -1) at 5.59 x 10(exp 18) cubic cm and 3.5 x 10(exp 20) cubic cm carrier concentration at 22.38°C, respectively. This is approximately 5.5 times higher than that of Si and similar to the Ge value at equivalent carrier concentrations and temperatures.

High mobility SiGe↗