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At least 145 records · Page 8

Leveraging Randomized Compiling for the QITE Algorithm

The success of the current generation of Noisy Intermediate-Scale Quantum (NISQ) hardware shows that quantum hardware may be able to tackle complex problems even without error correction. One outstanding issue is that of coherent errors arising from the increased complexity of these devices. These errors can accumulate through a circuit, making their impact on algorithms hard to predict and mitigate. Iterative algorithms like Quantum Imaginary Time Evolution are susceptible to these errors. This article presents the combination of both noise tailoring using Randomized Compiling and error mitigation with a purification. We also show that Cycle Benchmarking gives an estimate of the reliability of the purification. We apply this method to the Quantum Imaginary Time Evolution of a Transverse Field Ising Model and report an energy estimation and a ground state infidelity both below 1\%. Our methodology is general and can be used for other algorithms and platforms. We show how combining noise tailoring and error mitigation will push forward the performance of NISQ devices.

Ville, Jean-Loup↗

Status of Error Correction Studies in Support of FFA@CEBAF

In this work, we examine the beam correction requirements for the FFA@CEBAF energy upgrade. Both hardware and software diagnostic and corrector components are under investigation; in particular the relationship between hardware and software optimization will be developed. To generate a representative sample of errors---from the machine lattice and other beam properties---we construct a Markov Chain Monte Carlo (MCMC) sampler which considers different probability distributions for different types of errors. This sample is used to investigate the statistical sensitivity of the beam to various diagnostic and corrective schema. Once statistics are acquired, we plan to use a variety of optimization techniques to minimize correction time for the electron beam in the FFA arcs designed for the CEBAF upgrade.

Benesch, J.↗

Empirical Performance Analysis of HPC Applications with Portable Hardware Counter Metrics [Thesis]

In this dissertation, we demonstrate that it is possible to develop methods of empirical hardware-counter-based performance analysis for scientific applications running on diverse types of CPUs. Although hardware counters have been used in performance analysis for at least 30 years, the methods used are still limited to particular CPU vendors or even particular generations of CPUs from the same vendor. Our motivating hypothesis is that hardware counter-based measurements could be developed to provide consistent performance information on diverse CPU types. This dissertation proves the hypothesis was correct by demonstrating one such set of metrics.

97 MATHEMATICS AND COMPUTING↗

Using a Large Language Model as a Building Block to Generate Usable Validation and Verification Suite for OpenMP

In the HPC area, both hardware and software move quickly. Often new hardware is developed and deployed, the corresponding software stack, including compilers and other tools, are under active development while leading edge software developers are working to port and tune their applications, all at the same time. While the software ecosystem is in flux, one of the key challenges for users is obtaining insight into the state of implementation of key features in the programming languages and models their applications are using – whether they have been implemented, and whether the implementation conforms to the specification, especially for newly implemented features (less tested by widespread use). OpenMP is one of the most prominent shared memory programming models used for on-node programming in HPC. With the shift towards accelerators (such as GPUs and FPGAs) and heterogeneous programming OpenMP features are getting more complex. It is natural to ask whether generative AI approaches, and large language models (LLMs) in particular, can help in producing validation and verification test suites to allow users better and faster insights into the availability and correctness of OpenMP features of interest. In this work, we explore the use of ChatGPT-4 to generate a suite of tests for OpenMP features. We have chosen a set of directives and clauses, a total of 78 combinations, which first appeared in OpenMP 3.0 (released in May 2008) but are also relevant for accelerators. We prompted ChatGPT to generate tests in the C and Fortran languages, for both host (CPU) and device (accelerator). On the Summit super-computer using the GNU implementation, we found that, of the 78 generated tests 67 C tests and 43 Fortran tests compiled successfully and fewer than those executed to completion. On further analysis we show that not all generated tests are valid. We document the process, results, and provide detailed analysis regarding the quality of tests generated. With the aim of providing input to a production quality validation and verification suite, we manually implement the corrections required to make the tests valid according to the current OpenMP specification. We quantify this effort as small, medium, or large, and record the lines of code changed to correct the invalid tests. With the corrected tests we validate recent implementations from HPE, AMD, and GNU on the Frontier supercomputer. Our experiment and subsequent analysis show that although LLMs are capable of producing HPC specific codes, they are limited by their understanding of the deeper semantics and restrictions of programming models such as OpenMP. Unsurprisingly more commonly used features have better support, while some OpenMP 3.0 directives such as sections and tasking are not universally supported on accelerators. We demonstrate that successful compilation and execution to completion are inadequate metrics for evaluating generated code and that, at this time, commodity LLMs require expert intervention for code verification. This points to gaps in the training data that is currently available for HPC. We demonstrate that with "small" effort 37% of generated invalid C tests and 63% of generated invalid Fortran tests could be corrected. This improves productivity of test generation as we circumvent writing from scratch and the common programming errors associated with it.

Pophale, Swaroop [ORNL] (ORCID:0000000185446367)↗

Small Hydro Power Plants with Integrated BESS for Enhance Resiliency

Battery energy storage systems (BESS) are an important asset for power systems with high integration levels of renewable energy, and they can be controlled to provide various services to the grid. This paper presents the hardware demonstration and characterization of using a utility-scale BESS with grid-following (GFL) and grid-forming (GFM) controls and a run-of-river (ROR) hydropower plant to perform a bottom-up power system black start that enhances power systems' resiliency. ROR hydropower plants are generally not used for power system restoration due to their frequency instability during islanded operation; however, BESS with droop control can provide critical damping to convert a ROR hydropower generator into a black start- capable unit. To demonstrate this, we carry out hardware experiments at the megawatt-scale integrating a synchronous generator driven by a dynamometer, an actual GFL/GFM BESS, a medium-voltage impedance network, and a load bank. The demonstration shows the different roles of BESS with GFL and GFM control in power system restoration. GFL BESS can suffer from high-frequency oscillations, even instability, depending on the droop control gain and loading condition. The results provide further insights for system operators on how GFL- or GFM controlled BESS can enhance grid stability and how hydro-BESS hybrids can operate as a black-start-capable unit. The presented experimental results are also a valuable resource to understand the different stability characteristics of real-world BESS with different control modes.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Keeping LAMMPS cutting edge

Since its inception 30 years ago, LAMMPS has grown to be a world-class molecular dynamics code and a cornerstone of computational materials science research. This project aimed to keep LAMMPS at the forefront of molecular dynamics simulations by adapting LAMMPS to the latest developments in machine learning technology and hardware. Initially, the project set out to provide a unified implementation of active learning for efficient training data generation in LAMMPS, but the research trajectory pivoted to address more immediate and impactful opportunities. On the hardware side, recent record-breaking molecular dynamics simulations were developed on the Cerebras wafer-scale AI chip, and this project has developed an interface between LAMMPS and the hardware-specific molecular dynamics code to accelerate and simplify development and user adoption. On the software side, PyTorch’s Ahead-of-Time (AOT) compilation features promised increased performance for state-of-the-art equivariant neural network potentials, and this project laid the groundwork for their adoption in LAMMPS, resulting in a nearly 20x acceleration in extreme cases. Combined with a comprehensive benchmark study of LAMMPS across all current exascale systems, this project has reinforced LAMMPS’s role as a versatile, high-performance tool for current and future materials science applications.

36 MATERIALS SCIENCE↗

Reduced Stochastic Resistive Switching in Organic-Inorganic Hybrid Memristors by Vapor-Phase Infiltration

We report resistive random-access memory (RRAM) is promising for next-generation data storage and non-von Neumann computing hardware. However, tuning device switching characteristics and particularly, controlling their stochastic variation remain as critical challenges. Here, new organic-inorganic hybrid RRAM media are reported whose bipolar switching characteristics and stochasticity can be controlled by vapor-phase infiltration (VPI), an ex situ hybridization technique derived from atomic layer deposition. Hybrid RRAMs based on AlO x -infiltrated SU-8 feature facile tunability of device switching voltages, off-state current, and on-off ratio by adjusting the amount of infiltrated AlO x in the hybrid. Furthermore, a significant reduction in the stochastic, cycle-to-cycle variations of switching parameters is enabled by AlO x infiltration, driven by the infiltration-induced changes in mechanical, dielectric, and chemical properties of organic medium and their influence on the dimension and formation characteristics of conductive filaments. Finally, multi-level analog switching potentially useful for neuromorphic applications are demonstrated, along with direct, one-step device patterning exploiting the negative-tone resist feature of SU-8. With the demonstrated control over switching characteristics and stochastic variation, combined with analog switching and one-step patterning capabilities, the results not only present a novel hybrid medium for RRAM applications but also showcase the utility of VPI for developing new, high-performance hybrid RRAM devices.

77 NANOSCIENCE AND NANOTECHNOLOGY↗

ChatGPT and Other Large Language Models for Cybersecurity of Smart Grid Applications

Cybersecurity breaches targeting electrical substations constitute a significant threat to the integrity of the power grid, necessitating comprehensive defense and mitigation strategies. Any anomaly in information and communication technology (ICT) should be detected for secure communications between devices in digital substations. This paper proposes large language models (LLMs), e.g., ChatGPT, for the cybersecurity of IEC 61850-based communications. Multi-cast messages such as generic object oriented system events (GOOSE) and sampled values (SV) are used for case studies. The proposed LLM-based cybersecurity framework includes, for the first time, data pre-processing of communication systems and human-in-the-loop (HITL) training (considering the cybersecurity guidelines recommended by humans). The results show a comparative analysis of detected anomaly data carried out based on the performance evaluation metrics for different LLMs. A hardware-in-the-loop (HIL) testbed is used to generate and extract a dataset of IEC 61850 communications.

ChatGPT↗

Holistic Measurement Driven Resilience: Combining Operational Fault and Failure Measurements and Fault Injection for Quantifying Fault Detection, Propagation and Impact. Final report

For HPC systems to date, application resilience to faults and failures has been accomplished by the brute- force method of checkpoint/restart, which allows an application to make forward progress in the face of system and application faults, errors, and failures independent of root cause or end result. It has remained the primary resilience mechanism because we lack a way to identify faults and anticipate consequences early enough to take meaningful mitigating action. However, checkpoint/restart implementations put a tremendous burden on system resources and on the applications themselves and is becoming less feasible at scale. Because we have not yet operated at scales at which checkpoint/restart fails to provide forward progress, despite increasing costs, vendors have had little motivation to provide the instrumentation necessary for early identification of faults and failures. However, as we move from petascale to exascale, component mean time to failure (MTTF) will render the existing techniques ineffectual and/or too expensive. Furthermore, fault recovery mechanisms such as failover and/or error correction introduce performance inconsistency. Instrumentation allowing early indication of problems and tools to enable use of such information by systems, operating systems, and applications offer an alternative, more scalable and less costly solution. In the HMDR project, we built on our experience and expertise developed and accumulated over years of research on design, monitoring, measurement, and assessment of resilient computing systems. Analysis of field data on the current and past generations of extreme-scale systems revealed several challenges that, if not addressed in increasingly larger and more complex systems, may hinder the effectiveness of future exascale computing systems. Specifically, i) file systems and interconnects in current-generation large-scale systems already operate at the margins of resiliency, including consistent performance, and may not scale to larger deployments; ii) automated, software-based failover mechanisms are frequently inadequate and can introduce wider failures, such that failures during recovery may lead to system/application failures, including system-wide outages; and iii) silent data corruption represents a critical fault mode and will require efficient detection mechanisms if next-generation applications are to take full advantage of exascale hardware. To address the above challenges, we assembled a team of world-renowned experts in resilient extreme- scale computing from the University of Illinois (Electrical and Computer Engineering, Computer Science, and NCSA), SNL, LANL, NERSC, and Cray. Our team includes representatives from centers that house many of the largest HPC resources in the world, both today and over the coming years. The team has a unique track record of research in i) system and application failure characterization based on the analysis of field data, ii) data-driven design of fault/error detection mechanisms, and iii) experimental characterization of system/application resiliency. The team includes system owners/operators who provide continuous data collection and access and ensure installation of appropriate analysis tools.

97 MATHEMATICS AND COMPUTING↗

Development of 250 kW Ammonia and Hydrogen Industrial Burner Test Facility at the National Energy Technology Laboratory

In an effort to investigate the viability of ammonia and hydrogen as fuels in the industrial heating sector, the Department of Energy’s National Energy Technology Laboratory is developing a 250 kW burner test facility. The pursuit of a decarbonized industrial heating sector requires innovative approaches to convert existing assets to alternative fuels while maintaining adequate radiative heat transfer and limiting NOx. This new capability will leverage NETL’s experience and prior investments in ammonia and hydrogen combustion, to advance atmospheric pressure industrial combustion systems for industries such as cement kilns and glass factories. The intention in coming years is to collaborate with burner manufacturers and heavy industry partners to study, develop, and validate strategies for converting existing hardware from carbon-based fuels to next-generation clean ammonia and hydrogen technologies.

May, Kristyn Johnson↗

Understanding Line Losses and Transformer Losses in Rural Isolated Distribution Systems: Preprint

Rural, isolated power systems in the mainland U.S. and in states like Alaska and Hawaii are powered by assets like diesel generators. These rural, isolated power systems also cannot operate at the higher band of medium voltage (like 69kV). They are primarily in the 12 to 14 kV range to keep the cost of the distribution investments lower. Because of this mid-band medium voltage range, the line losses and distribution transformers losses consume significant diesel consumption (almost 10 percent of the peak load). This work considers one such power system powering an isolated system and presents key findings online losses, and transformer losses. Understanding and documenting the impacts is critical for these communities operating their power systems and take actions to reduce expensive diesel consumption. In this paper, we will present one such typical grid and model it in electromagnetic transients (EMT) domain. We used the tower structure, under ground cabling installation to develop high fidelity models of lines. We also used high fidelity models of distribution transformers to present the no-load losses and full load loses. We will also present technical solutions available commercially off-the-shelf to reduce these losses and reduce diesel consumption. This work will be a primer for communities to understand the technical challenges and to understand the possible solution available to solve such challenges for rural, isolated power system operators.

blackstart↗

ARQUIN: Architectures for Multinode Superconducting Quantum Computers

Many proposals to scale quantum technology rely on modular or distributed designs wherein individual quantum processors, called nodes, are linked together to form one large multinode quantum computer (MNQC). One scalable method to construct an MNQC is using superconducting quantum systems with optical interconnects. However, internode gates in these systems may be two to three orders of magnitude noisier and slower than local operations. Surmounting the limitations of internode gates will require improvements in entanglement generation, use of entanglement distillation, and optimized software and compilers. Still, it remains unclear what performance is possible with current hardware and what performance algorithms require. In this article, we employ a systems analysis approach to quantify overall MNQC performance in terms of hardware models of internode links, entanglement distillation, and local architecture. We show how to navigate tradeoffs in entanglement generation and distillation in the context of algorithm performance, lay out how compilers and software should balance between local and internode gates, and discuss when noisy quantum internode links have an advantage over purely classical links. Here, we find that a factor of 10–100× better link performance is required and introduce a research roadmap for the co-design of hardware and software towards the realization of early MNQCs. While we focus on superconducting devices with optical interconnects, our approach is general across MNQC implementations.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

A High-Fidelity Cyber-Physical Testbed-Based Benchmarking Dataset For Testing Operational Technology Specific Intrusion Detection Systems

Quality datasets serve a critical purpose in cyber security research. Data is needed to understand system behavior and develop security controls to protect critical systems. However, for critical infrastructure operational environments there is a lack of available datasets to study because of the high cost and specialized capabilities necessary to generate them. This paper documents the development of a dataset of high fidelity hardware in the loop laboratory simulated models of electric and natural gas distribution systems with real cyber attack test cases. A deep dive discussion for the experimental setup and controls for generating the data is provided along with observations from using the data in evaluating intrusion detection approaches.

Ashok, Aditya↗

Contact-Less Integrity Verification of Microelectronics Using Near-Field EM Analysis

Modern microelectronics life-cycle and supply chain ecosystem bring multiple untrusted entities, which can compromise their integrity. A major integrity issue of microelectronics stems from piracy of intellectual properties (IP) and counterfeiting, which causes significant revenue loss to the semiconductor manufacturers. Further, these components often lead to compromised functionality, reliability, security, and safety of an electronic system. This paper presents secure information transmission and probing methods for verifying the integrity of digital integrated circuit (ICs) based on their electromagnetic (EM) near-field emissions and thereby protecting systems against counterfeit components. The proposed method has been tested on both high-level instructions executed by microprocessors or Systems-on-Chip (serving as examples of software), and also logic circuits within FPGA fabrics and ASICs (serving as examples of hardware). The authentication information required by each digital system is generated using a pseudo-random number generator circuit and securely transmitted via near-field magnetic emissions. The authorized party can probe these emissions using a near-field probe, process the acquired signals to improve the signal-to-noise ratio (SNR), and then recover the secure information through matched filtering. Experimental results from commercial SoCs are used to demonstrate the proposed technique. Methods for reducing EM interference during integrity verification of both FPGAs and ASICs are also described.

47 OTHER INSTRUMENTATION↗

Modeling and Power-Hardware-in-the-Loop Validation of Synchronous Machine Governor

This paper introduces the development of a high-fidelity gas turbine governor model using a programmable logic controller for power-hardware-in-the-loop (PHIL) validation. The governor model is integrated with the National Renewable Energy Laboratory's (NREL) PHIL test bed, featuring a 2-MVA synchronous machine and a 2.5-MW variable-speed drive, to emulate NG-driven HRSGs and CTs under various operational scenarios. The primary objective of this research is to study the grid-connected and islanding operations of conventional generation sources, with representative startup sequences including turbine purge, ignition, speed ramp-up, synchronization, and breaker closure. Preliminary results of the generator governor model on NREL PHIL platform, particularly using the 2.5-MW dynamometer system, offered significant insights into the modeling techniques, hardware integration, scaling, and real-world simulation dynamics.

24 POWER TRANSMISSION AND DISTRIBUTION↗

Automated Generation of Integrated Digital and Spiking Neuromorphic Machine Learning Accelerators

The growing numbers of application areas for artificial intelligence (AI) methods have led to an explosion of domain-specific accelerators that could support every new machine learning (ML) algorithm advancement, clearly highlighting the need for a capability to quickly and automatically transition from algorithm definition to hardware implementation and explore design space along a variety of SWaP (size, weight and Power). The software defined architectures (SODA) synthesizer implements a compiler-based modular infrastructure for the end-to-end generation of machine learning accelerators from high-level frameworks to hardware description language. At the same time, neuromorphic computing, by mimicking how the brain operates, promises to perform artificial intelligence tasks at efficiencies orders of magnitude higher than the current conventional tensor-processing based accelerators, as demonstrated by a variety of specialized designs leveraging Spiking Neural Networks (SNNs). Nevertheless, the mapping of an artificial neural network (ANN) to solutions supporting SNNs is still a non-trivial and very device-specific task, and completely lack the possibility to design hybrid systems that integrate conventional and spiking neural models. In this paper we discuss the support for such an integrated generation leveraging the SODA Synthesizer framework and its modular structure. In particular, we present a new MLIR dialect (part of the SODA frontend) that allows expressing spiking neural network features (e.g., available resources, spiking sequences, analog signal reading, etc.) and illustrate how it enables mapping to Spiking Neurons and deployment to the related specialized hardware (which, in the digital domain, could be generated through the other existing layers of the SODA Synthesizer). We then discuss the opportunities for even deeper integration afforded by the hardware compilation infrastructure, providing a path towards the generation of complex heterogeneous artificial intelligence systems.

Curzel, Serena↗

Cross-Feature Transfer Learning for Efficient Tensor Program Generation

Tuning tensor program generation involves navigating a vast search space to find optimal program transformations and measurements for a program on the target hardware. The complexity of this process is further amplified by the exponential combinations of transformations, especially in heterogeneous environments. This research addresses these challenges by introducing a novel approach that learns the joint neural network and hardware features space, facilitating knowledge transfer to new, unseen target hardware. A comprehensive analysis is conducted on the existing state-of-the-art dataset, TenSet, including a thorough examination of test split strategies and the proposal of methodologies for dataset pruning. Leveraging an attention-inspired technique, we tailor the tuning of tensor programs to embed both neural network and hardware-specific features. Notably, our approach substantially reduces the dataset size by up to 53% compared to the baseline without compromising Pairwise Comparison Accuracy (PCA). Furthermore, our proposed methodology demonstrates competitive or improved mean inference times with only 25–40% of the baseline tuning time across various networks and target hardware. The attention-based tuner can effectively utilize schedules learned from previous hardware program measurements to optimize tensor program tuning on previously unseen hardware, achieving a top-5 accuracy exceeding 90%. This research introduces a significant advancement in autotuning tensor program generation, addressing the complexities associated with heterogeneous environments and showcasing promising results regarding efficiency and accuracy.

97 MATHEMATICS AND COMPUTING↗

CFD-trained ANN Model for Approximating Near-occupant Condition in Real-time Simulations

The main drawback of Computational Fluid Dynamics (CFD) simulations has been the time and resource consuming nature which is not suitable for real-time applications. In this work, we first generated numerous CFD models of a given indoor space to obtain airspeed, temperature, and mean radiant temperature near an occupant as training data. Several artificial neural networks (ANN) models were trained using this CFD simulated data to approximate near real-time environmental conditions for a given occupant. This trained ANN model approach is a part of a real-time simulation of building operations using a combination of software and real hardware (HVAC equipment) approaches. The preliminary results suggest that the CFD- generated training data and the trained ANN model can accurately approximate such conditions in a real-time application, a method that has great potential in building simulation and building digital twin areas of research.

Zhang, Yun↗