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At least 145 records · Page 8

The Microwave Anisotropy Probe (MAP): Guidance, Navigation, and Control Hardware Suite

The Microwave Anisotropy Probe (MAP) was launched June 30, 2001 to create an all-sky map of the Cosmic Microwave Background. The mission's hardware suite included two Lockheed Martin AST-201 star trackers, two Kearfott Two-Axis Rate Assemblies (TARAs) mounted to provide X, Y and redundant Z-axis rates, two Adcole Digital Sun Sensor (DSS) heads sharing one set of electronics, twelve Adcole Coarse Sun Sensor (CSS) eyes, three Ithaco E-sized Reaction Wheel Assemblies (RWAs), and a Propulsion Subsystem that employed eight PRIMEX Rocket Engine Modules (REMs). This hardware has allowed MAP to meet its various Orbit and Attitude Control Requirements, including performing a complex zero-momentum scan, meeting its attitude determination requirements, and maintaining a trajectory that places MAP in a lissajous orbit around the second Sun-Earth Lagrange point (L2) via phasing loops and a lunar gravity assist. Details of MAP's attitude determination, attitude control, and trajectory design are presented separately. This paper will focus on the performance of the hardware components mentioned above, as well as the significant lessons learned through the use of these components. An emphasis will be placed on spacecraft design modifications that were needed to accommodate existing hardware designs into the MAP Observatory design.

Ward, David K.

Ground and flight test experience with a triple redundant digital fly by wire control system

A triplex digital fly by wire flight control system was developed and installed in an F-8C aircraft to provide fail operative, full authority control. Hardware and software redundancy management techniques were designed to detect and identify failures in the system. Control functions typical of those projected for future actively controlled vehicles were implemented.

Jarvis, C. R.

Application experience with the NASA aircraft interrogation and display system - A ground-support equipment for digital flight systems

The NASA Dryden Flight Research Facility has developed a microprocessor-based, user-programmable, general-purpose aircraft interrogation and display system (AIDS). The hardware and software of this ground-support equipment have been designed to permit diverse applications in support of aircraft digital flight-control systems and simulation facilities. AIDS is often employed to provide engineering-units display of internal digital system parameters during development and qualification testing. Such visibility into the system under test has proved to be a key element in the final qualification testing of aircraft digital flight-control systems. Three first-generation 8-bit units are now in service in support of several research aircraft projects, and user acceptance has been high. A second-generation design, extended AIDS (XAIDS), incorporating multiple 16-bit processors, is now being developed to support the forward swept wing aircraft project (X-29A). This paper outlines the AIDS concept, summarizes AIDS operational experience, and describes the planned XAIDS design and mechanization.

Glover, R. D.

Flight testing the digital electronic engine control in the F-15 airplane

The digital electronic engine control (DEEC) is a full-authority digital engine control developed for the F100-PW-100 turbofan engine which was flight tested on an F-15 aircraft. The DEEC hardware and software throughout the F-15 flight envelope was evaluated. Real-time data reduction and data display systems were implemented. New test techniques and stronger coordination between the propulsion test engineer and pilot were developed which produced efficient use of test time, reduced pilot work load, and greatly improved quality data. The engine pressure ratio (EPR) control mode is demonstrated. It is found that the nonaugmented throttle transients and engine performance are satisfactory.

Myers, L. P.

The Alaska SAR processor

The Alaska SAR processor was designed to process over 200 100 km x 100 km (Seasat like) frames per day from the raw SAR data, at a ground resolution of 30 m x 30 m from ERS-1, J-ERS-1, and Radarsat. The near real time processor is a set of custom hardware modules operating in a pipelined architecture, controlled by a general purpose computer. Input to the processor is provided from a high density digital cassette recording of the raw data stream as received by the ground station. A two pass processing is performed. During the first pass clutter-lock and auto-focus measurements are made. The second pass uses the results to accomplish final image formation which is recorded on a high density digital cassette. The processing algorithm uses fast correlation techniques for range and azimuth compression. Radiometric compensation, interpolation and deskewing is also performed by the processor. The standard product of the ASP is a high resolution four-look image, with a low resolution (100 to 200 m) many look image provided simultaneously.

Carande, R. E.

Large angle magnetic suspension test fixture

Progress made under the subject grant in the period from 1 Nov. 1992 to 31 May 1993 is presented. The research involves the continued development of the Large Angle Magnetic Suspension Test Fixture (LAMSTF) and also the recommissioning of an additional piece of exisiting hardware. During the period in question, the initial configuration of LAMSTF was completed and made routinely and reliably operational. A digital phase advance controller was completed and documented. The goal of a controlled 360 deg rotation was achieved. Work started on the recommissioning of the Annular Suspension and Pointing System (ASPS). Work completed during the report period included: modeling; position sensing; controller; support of the Second International Symposium on Magnetic Suspension Technology; and recommissioning of the Annular Suspension and Pointing System.

Britcher, Colin P.

Scalable Multiprocessor for High-Speed Computing in Space

A report discusses the continuing development of a scalable multiprocessor computing system for hard real-time applications aboard a spacecraft. "Hard realtime applications" signifies applications, like real-time radar signal processing, in which the data to be processed are generated at "hundreds" of pulses per second, each pulse "requiring" millions of arithmetic operations. In these applications, the digital processors must be tightly integrated with analog instrumentation (e.g., radar equipment), and data input/output must be synchronized with analog instrumentation, controlled to within fractions of a microsecond. The scalable multiprocessor is a cluster of identical commercial-off-the-shelf generic DSP (digital-signal-processing) computers plus generic interface circuits, including analog-to-digital converters, all controlled by software. The processors are computers interconnected by high-speed serial links. Performance can be increased by adding hardware modules and correspondingly modifying the software. Work is distributed among the processors in a parallel or pipeline fashion by means of a flexible master/slave control and timing scheme. Each processor operates under its own local clock; synchronization is achieved by broadcasting master time signals to all the processors, which compute offsets between the master clock and their local clocks.

Lux, James

Study for incorporating time-synchronized approach control into the CH-47/VALT digital navigation system

Techniques for obtaining time synchronized (4D) approach control in the VALT research helicopter is described. Various 4D concepts and their compatibility with the existing VALT digital computer navigation and guidance system hardware and software are examined. Modifications to various techniques were investigated in order to take advantage of the unique operating characteristics of the helicopter in the terminal area. A 4D system is proposed, combining the direct to maneuver with the existing VALT curved path generation capability.

Mcconnell, W. J., Jr.

Rotorcraft simulation at Ames

Attention is given to rotorcraft simulation experience at NASA's Ames research facility, which has involved complex mathematical modeling, high computational capability requirements, and strong influences from pilot motion and visual cues. A development history and performance assessment is presented for the rotorcraft simulation hardware, together with projections of near term development improvements of capabilities. Greater demand is anticipated for the simulation of all-digital helicopter flight control systems.

Alderete, T. S.

Combining high performance simulation, data acquisition, and graphics display computers

Issues involved in the continuing development of an advanced simulation complex are discussed. This approach provides the capability to perform the majority of tests on advanced systems, non-destructively. The controlled test environments can be replicated to examine the response of the systems under test to alternative treatments of the system control design, or test the function and qualification of specific hardware. Field tests verify that the elements simulated in the laboratories are sufficient. The digital computer is hosted by a Digital Equipment Corp. MicroVAX computer with an Aptec Computer Systems Model 24 I/O computer performing the communication function. An Applied Dynamics International AD100 performs the high speed simulation computing and an Evans and Sutherland PS350 performs on-line graphics display. A Scientific Computer Systems SCS40 acts as a high performance FORTRAN program processor to support the complex, by generating numerous large files from programs coded in FORTRAN that are required for the real time processing. Four programming languages are involved in the process, FORTRAN, ADSIM, ADRIO, and STAPLE. FORTRAN is employed on the MicroVAX host to initialize and terminate the simulation runs on the system. The generation of the data files on the SCS40 also is performed with FORTRAN programs. ADSIM and ADIRO are used to program the processing elements of the AD100 and its IOCP processor. STAPLE is used to program the Aptec DIP and DIA processors.

Hickman, Robert J.

NISAR L-SAR Digital Electronics Subsystem - A Multichannel Distributed Processing System with Synchronous Timing Control for Digital Beam Forming and Multiple Echo Tracking

The NASA-ISRO Synthetic Aperture Radar (NISAR) L-band SAR instrument employs multiple digital channels to optimize resolution while keeping a large swath on a single pass. High-speed digitization with fine synchronization and digital beam forming are necessary in order to facilitate this new technique called SweepSAR. An architecture employing multiple FPGA based digital signal processors has been conceived to facilitate digital calibration on an individual channel basis as well as digital signal processing to optimize the receive signal. On-board processing and data compression has been implemented to reduce the volume of data in order to satisfy the operational requirements of near global coverage for the desired science targets. A novel command and timing architecture was developed to manage this complex system while providing detailed control of individual channel receive window timing required for digital beam forming. The NISAR L-band Digital Electronics Subsystem is the combination of the hardware, firmware and software components architected and implemented to operate this radar and return the desired quantity and quality of data for the science community.

Chuang, Chung-Lun

Backup Attitude Control Algorithms for the MAP Spacecraft

The Microwave Anisotropy Probe (MAP) is a follow-on to the Differential Microwave Radiometer (DMR) instrument on the Cosmic Background Explorer (COBE) spacecraft. The MAP spacecraft will perform its mission, studying the early origins of the universe, in a Lissajous orbit around the Earth-Sun L(sub 2) Lagrange point. Due to limited mass, power, and financial resources, a traditional reliability concept involving fully redundant components was not feasible. This paper will discuss the redundancy philosophy used on MAP, describe the hardware redundancy selected (and why), and present backup modes and algorithms that were designed in lieu of additional attitude control hardware redundancy to improve the odds of mission success. Three of these modes have been implemented in the spacecraft flight software. The first onboard mode allows the MAP Kalman filter to be used with digital sun sensor (DSS) derived rates, in case of the failure of one of MAP's two two-axis inertial reference units. Similarly, the second onboard mode allows a star tracker only mode, using attitude and derived rate from one or both of MAP's star trackers for onboard attitude determination and control. The last backup mode onboard allows a sun-line angle offset to be commanded that will allow solar radiation pressure to be used for momentum management and orbit stationkeeping. In addition to the backup modes implemented on the spacecraft, two backup algorithms have been developed in the event of less likely contingencies. One of these is an algorithm for implementing an alternative scan pattern to MAP's nominal dual-spin science mode using only one or two reaction wheels and thrusters. Finally, an algorithm has been developed that uses thruster one shots while in science mode for momentum management. This algorithm has been developed in case system momentum builds up faster than anticipated, to allow adequate momentum management while minimizing interruptions to science. In this paper, each mode and algorithm will be discussed, and simulation results presented.

ODonnell, James R., Jr.

Proton pulse charge calculation algorithm in Beam Power Limiting System at Spallation Neutron Source

A proton pulse charge calculation algorithm in the Beam Power Limiting System (BPLS) at the Spallation Neutron Source (SNS) was developed and implemented in an FPGA. The algorithm calculates one-minute running average of the pulse charges and issues a fault to the Personal Protection System (PPS) and the Machine Protection System (MPS) when a limit is reached. A bit-accurate model of the algorithm was first developed and tested in Matlab® and then implemented and simulated in VHDL using Vivado® design environment. Finally, the algorithm was verified on a µTCA-based hardware platform.

Bobrek, Miljko [ORNL] (ORCID:0000000332763451)

Dynamic verification of a digital flight control system.

Development of a digital control system dynamic variation technique which accounts for the limitation of available frequency response analyzers. Digital control system theory is briefly reviewed, and generation of the necessary theoretical frequency responses is discussed. Results of the dynamic verification of a digital control system for a Saturn V launch vehicle are presented, and attention is given to the limitations of this technique along with its applicability to other types of digital control systems. A technique for performing open-loop frequency response analyses of a flight program implemented in a 'flight-type' digital computer and interface hardware with vehicle dynamics simulated on an analog computer is described.

Nabers, J. P., Jr.

Development of the NASA VALT digital navigation system

The research to develop and fabricate a terminal area navigation system for use in the NASA VTOL Approach and Landing Technology (VALT) program. The results of that effort are reported. The navigation system developed and fabricated was based on a general purpose airborne digital computer. A set of flight hardware units was fabricated to create the necessary analog, digital and human interface with the computer. A comprehensive package of software was created to implement the control and guidance laws required for automatic and flight director approaches that are curved in two planes. A technique was developed that enables the generation of randomly shaped lateral paths from simple input data. The lateral path concept combines straight line and elliptical-curved segments to fit a continuous curved path to the data points. A simple, fixed base simulation was put together to assist in developing and evaluating the system. The simulation was used to obtain system performance data during simulated curved-path approaches.

Mcconnell, W. J., Jr.

Automation of the deep space network

Approaches to automating the radiofrequency system used in the deep space network (DSN) are discussed. The goal is to operate DSN, which communicates with U.S. space probes that travel beyond the moon, in an unattended mode in order to reduce operating costs. The philosophy of a hierachical automation plan, which emphasizes distributed control and the utilization of DSN hardware development engineers to develop automation software, is discussed, and software development as well as common software and common microcontroller hardware are considered. It is planned that a station controller will serve as the operator interface and control and coordinate the operation of three system controllers (RF system, digital system, and antenna system). These systems are described.

Crow, R. B.

A model following variable stability system for the NASA ARC X-14B.

A description of the basic design concept, hardware design, and flight evaluation of a Variable Stability System (VSS) installed on the NASA ARC X-14B is presented. The NASA ARC X-14B is a twin-engine, single-seated VTOL aircraft. The VSS is unique in that it employs a general purpose airborne digital computer as an integral part of the hybrid model following flight control system. The system design, analysis and testing phases are discussed in the paper from the application of optimal control techniques in the preliminary design of the system, through the flight demonstration of the VSS hardware.

Gallagher, J. T.

Design and test experience with a triply redundant digital fly-by-wire control system

A triplex digital fly-by-wire flight control system was developed and then installed in a NASA F-8C aircraft to provide fail-operative, full authority control. Hardware and software redundancy management techniques were designed to detect and identify failures in the system. Control functions typical of those projected for future actively controlled vehicles were implemented. This paper describes the principal design features of the system, the implementation of computer, sensor, and actuator redundancy management, and the ground test results. An automated test program to verify sensor redundancy management software is also described.

Szalai, K. J.