Remote pilot-controlled docking with television
Remote pilot-controlled visual docking of two space vehicles on rendezvous docking simulator with closed circuit television
CLOSED CIRCUIT TELEVISION↗
SEARCH · Engineering Papers
Results for “Circuit simulation”
Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Performance simulation involving correlated part characteristics.
Algorithm for generating normally distributed variables set with given correlation matrix in digital computer simulation of electronic circuit performance
DISTRIBUTION FUNCTION↗
Operating characteristics of computer programs for nonlinear transient analysis
Selection and use of computer programs for simulation of electronic circuits
Schneider, W. J.↗
Test results and in-orbit operation of the Infrared Astronomical Satellite circumvention circuit
The IRAS circumvention circuit (CC) eliminates the unwanted charged-particle pulses from the IR signal. The operation of the CC along with preflight and in-orbit testing is described. Ground testing of the brassboard circuit using a simulated preamplifier output showed that the CC would perform the circumvention function as designed. When all flight detectors and preamplifiers became available, the CC was tested using a gamma source to simulate charged-particle sources; with the low energy deposited in the detectors (20 keV average) the noise was reduced by up to 5 times with the CC turned on. In-orbit results show that the CC decreases the unwanted charged-particle background noise by up to two orders of magnitude. The difference in the results with the CC on and off is so great that the science team has recommended that no data be taken with the CC off.
Long, E. C.↗
A reconfigurable multicarrier demodulator architecture
An architecture based on parallel and pipline design approaches has been developed for the Frequency Division Multiple Access/Time Domain Multiplexed (FDMA/TDM) conversion system. The architecture has two main modules namely the transmultiplexer and the demodulator. The transmultiplexer has two pipelined modules. These are the shared multiplexed polyphase filter and the Fast Fourier Transform (FFT). The demodulator consists of carrier, clock, and data recovery modules which are interactive. Progress on the design of the MultiCarrier Demodulator (MCD) using commercially available chips and Application Specific Integrated Circuits (ASIC) and simulation studies using Viewlogic software will be presented at the conference.
Kwatra, S. C.↗
Error coding simulations
There are various elements such as radio frequency interference (RFI) which may induce errors in data being transmitted via a satellite communication link. When a transmission is affected by interference or other error-causing elements, the transmitted data becomes indecipherable. It becomes necessary to implement techniques to recover from these disturbances. The objective of this research is to develop software which simulates error control circuits and evaluate the performance of these modules in various bit error rate environments. The results of the evaluation provide the engineer with information which helps determine the optimal error control scheme. The Consultative Committee for Space Data Systems (CCSDS) recommends the use of Reed-Solomon (RS) and convolutional encoders and Viterbi and RS decoders for error correction. The use of forward error correction techniques greatly reduces the received signal to noise needed for a certain desired bit error rate. The use of concatenated coding, e.g. inner convolutional code and outer RS code, provides even greater coding gain. The 16-bit cyclic redundancy check (CRC) code is recommended by CCSDS for error detection.
Noble, Viveca K.↗
Hierarchical simulation of large system
The main problem facing current CAD tools for VLSIs is the large amount of memory required when dealing with large systems, primarily due to the circuit representation used by most current tools. This paper discusses an approach for hierarchical switch-level simulation of digital circuits. The approach exploits the hierarchy to reduce the memory requirements of the simulation, allowing the simulation of circuits that are too large to simulate at one flat level. The approach has been implemented in a hierarchical switch-level simulator, CHAMP, which runs on a SUN workstation. The program performs mixed mode simulation: parts of the circuit can be simulated faster at a behavioral level by supplying a high level software description. CHAMP allows assignable delays, and bidirectional signal flow inside circuit blocks that are represented as transistor networks as well as across the boundaries of higher level blocks. CHAMP is also unique in that it simulates directly from the hierarchical circuit description without flattening to a single level.
Saab, Daniel G.↗
Simulation of the Universal-Time Diurnal Variation of the Global Electric Circuit Charging Rate
A global lightning model that includes diurnal and annual lightning variation, and total flash density versus latitude for each major land and ocean, has been used as the basis for simulating the global electric circuit charging rate. A particular objective has been to reconcile the difference in amplitude ratios [AR=(max-min)/mean] between global lightning diurnal variation (AR approx. = 0.8) and the diurnal variation of typical atmospheric potential gradient curves (AR approx. = 0.35). A constraint on the simulation is that the annual mean charging current should be about 1000 A. The global lightning model shows that negative ground flashes can contribute, at most, about 10-15% of the required current. For the purpose of the charging rate simulation, it was assumed that each ground flash contributes 5 C to the charging process. It was necessary to assume that all electrified clouds contribute to charging by means other than lightning, that the total flash rate can serve as an indirect indicator of the rate of charge transfer, and that oceanic electrified clouds contribute to charging even though they are relatively inefficient in producing lightning. It was also found necessary to add a diurnally invariant charging current component. By trial and error it was found that charging rate diurnal variation curves in Universal time (UT) could be produced with amplitude ratios and general shapes similar to those of the potential gradient diurnal variation curves measured over ocean and arctic regions during voyages of the Carnegie Institute research vessels.
Mackerras, D.↗
Simulation of the Universal-Time Diurnal Variation of the Global Electric Circuit Charging Rate
A global lightning model that includes diurnal and annual lightning variation, and total flash density versus latitude for each major land and ocean, has been used as the basis for simulating the global electric circuit charging rate. A particular objective has been to reconcile the difference in amplitude ratios [AR=(max-min)/mean] between global lightning diurnal variation (AR approximately equals 0.8) and the diurnal variation of typical atmospheric potential gradient curves (AR approximately equals 0.35). A constraint on the simulation is that the annual mean charging current should be about 1000 A. The global lightning model shows that negative ground flashes can contribute, at most, about 10-15% of the required current. For the purpose of the charging rate simulation, it was assumed that each ground flash contributes 5 C to the charging process. It was necessary to assume that all electrified clouds contribute to charging by means other than lightning, that the total flash rate can serve as an indirect indicator of the rate of charge transfer, and that oceanic electrified clouds contribute to charging even though they are relatively inefficient in producing lightning. It was also found necessary to add a diurnally invariant charging current component. By trial and error it was found that charging rate diurnal variation curves could be produced with amplitude ratios and general shapes similar to those of the potential gradient diurnal variation curves measured over ocean and arctic regions during voyages of the Carnegie Institute research vessels. The comparisons were made for the northern winter (Nov.-Feb.), the equinox (Mar., Apr., Sept., Oct.), the northern summer (May-Aug.), and the whole year.
Mackerras, David↗
Study of mathematical modeling of communication systems transponders and receivers
The modeling of communication receivers is described at both the circuit detail level and at the block level. The largest effort was devoted to developing new models at the block modeling level. The available effort did not permit full development of all of the block modeling concepts envisioned, but idealized blocks were developed for signal sources, a variety of filters, limiters, amplifiers, mixers, and demodulators. These blocks were organized into an operational computer simulation of communications receiver circuits identified as the frequency and time circuit analysis technique (FATCAT). The simulation operates in both the time and frequency domains, and permits output plots or listings of either frequency spectra or time waveforms from any model block. Transfer between domains is handled with a fast Fourier transform algorithm.
Walsh, J. R.↗
EHWPACK: An evolvable hardware environment using the SPICE simulator and the Field Programmable Transistor Array
This paper describes the EHW development system, a tool that performs the evolutionary synthesis of electronic circuits, using the SPICE simulator and the Field Programmable Transistor Array hardware (FPTA) developed at JPL.
evolvable hardware spice simulations↗
Using Modern Design Tools for Digital Avionics Development
Using Modem Design Tools for Digital Avionics Development Shrinking development time and increased complexity of new avionics forces the designer to use modem tools and methods during hardware development. Engineers at the Marshall Space Flight Center have successfully upgraded their design flow and used it to develop a Mongoose V based radiation tolerant processor board for the International Space Station's Water Recovery System. The design flow, based on hardware description languages, simulation, synthesis, hardware models, and full functional software model libraries, allowed designers to fully simulate the processor board from reset, through initialization before any boards were built. The fidelity of a digital simulation is limited to the accuracy of the models used and how realistically the designer drives the circuit's inputs during simulation. By using the actual silicon during simulation, device modeling errors are reduced. Numerous design flaws were discovered early in the design phase when they could be easily fixed. The use of hardware models and actual MIPS software loaded into full functional memory models also provided checkout of the software development environment. This paper will describe the design flow used to develop the processor board and give examples of errors that were found using the tools. An overview of the processor board firmware will also be covered.
Hyde, David W.↗
Igniter Simulator
Report describes electronic circuitry that simulates electrical properties of igniter of Space Shuttle main engine. Circuit used to test software of engine controller, without having to fire real igniter or turn on engine. Circuit used in all igniter simulations and mimics operation of igniter more realistically than did previous versions.
Simon, Richard A.↗
The Orbital Maneuvering Vehicle Training Facility visual system concept
The purpose of the Orbital Maneuvering Vehicle (OMV) Training Facility (OTF) is to provide effective training for OMV pilots. A critical part of the training environment is the Visual System, which will simulate the video scenes produced by the OMV Closed-Circuit Television (CCTV) system. The simulation will include camera models, dynamic target models, moving appendages, and scene degradation due to the compression/decompression of video signal. Video system malfunctions will also be provided to ensure that the pilot is ready to meet all challenges the real-world might provide. One possible visual system configuration for the training facility that will meet existing requirements is described.
Williams, Keith↗
Human Thermal Assessment of Traverse and Geology Task Iterations During Simulated Lunar Extravehicular Activity
Spacewalks or extravehicular activities (EVA) in microgravity are mentally and physically demanding. Current microgravity EVAs are predominantly focused on upper body tasks on engineered surfaces; however, the introduction of gravity means that crew members during future lunar EVAs will be required to perform tasks that generate full body workloads such as navigating natural lunar terrain while conducting geological sampling. To date, only 12 people have walked on the surface of the Moon resulting in limited knowledge of suited thermal regulation under lunar-relevant physical workloads. To address this gap, a study is underway to focus on spacesuit operations with simulated lunar EVA workloads. This study presents methodology for collecting standard thermal measures during suit testing. In this pilot study, two suited subjects underwent simulated lunar EVAs using the NASA Active Response Gravity Offload System (ARGOS) to simulate the effects of partial gravity. Each lunar EVA, lasting three to five hours, included various metabolically demanding EVA tasks. Subjects donned the NASA Mark III (MK III) space suit and were offloaded to 1/6th G (lunar gravity). A subset task circuit from one of these simulations replicated an EVA traverse to a lunar crater, taking a geological sample, and returning to base. The suited subject walked one 1500 m (0% grade) and three 500 m traverses at three different grades (10, 20, 30%). Between each traverse, subjects performed geology sampling tasks (0 and 10% grade). Thermal measurements included core and skin temperature, liquid cooling garment (LCG) inlet and outlet temperature, and spacesuit gas inlet and outlet temperature and humidity. Compared to baseline core temperature (S1 = 37.07±0.32 °C, S2 = 37.27±0.01 °C) and mean skin temperature (S1 = 32.38±0.34 °C, S2 = 33.62±0.03 °C), after a 1500 m traverse, each suited subject showed an increased core temperature (S1 = 37.23±0.12 °C, S2 = 37.41±0.11°C) and decreased mean skin temperature (S1 = 32.16±0.17 °C, S2 = 31.53±1.15 °C) at a delta LCG temperature (S1 = 1.86±0.24 °C, S2 = 2.20±0.76 °C) and delta suit humidity (S1 = 9.66±1.49 %, S2 = 11.50±1.58 %). Core temperature continued to increase from compounding traverse and geology tasks (S1 = 38.04±0.03 °C, S2 = 38.1±0.02 °C) accompanied by an increase in delta LCG temperature (S1 = 2.24±0.13 °C, S2 = 2.67±0.12 °C) and delta suit humidity (S1 = 28±2.42 %, S2 = 31±2.13 %). Conversely, as the circuit progressed, mean skin temperature continued to decrease due to sustained LCG heat rejection (S1 = 30.08±0.15 °C, S2 = 30.28±0.07 °C). During the simulated EVA circuit core temperature increased to elevated values and remained elevated as heat was retained while mean skin temperature decreased due to peripheral heat offloaded to the LCG. The thermal measures collected during this study provided critical heat loading dynamics during lunar EVA tasks. Including core and skin temperatures along with suited thermal measures provides a standard data collection scheme for human thermal metrics during EVA task management. Data collected in this configuration can be used to build future lunar EVA task circuits and human thermal predictions.
Bradley Hoffmann↗
Calculating Second-Order Effects in MOSFET's
Collection of mathematical models includes second-order effects in n-channel, enhancement-mode, metal-oxide-semiconductor field-effect transistors (MOSFET's). When dimensions of circuit elements relatively large, effects neglected safely. However, as very-large-scale integration of microelectronic circuits leads to MOSFET's shorter or narrower than 2 micrometer, effects become significant in design and operation. Such computer programs as widely-used "Simulation Program With Integrated Circuit Emphasis, Version 2" (SPICE 2) include many of these effects. In second-order models of n-channel, enhancement-mode MOSFET, first-order gate-depletion region diminished by triangular-cross-section deletions on end and augmented by circular-wedge-cross-section bulges on sides.
Benumof, Reuben↗
Simulating Single-Event Upsets in Bipolar RAM's
Simulation technique saves testing. Uses interactive version of SPICE (Simulation Program with Integrated Circuit Emphasis). Device and subcircuit models available in software used to construct macromodel for an integrated bipolar transistor. Time-dependent current generators placed inside transistor macromodel to simulate charge collection from ion track. Significant finding of experiments is standard design practice of reducing power in unaddressed bipolar RAM cell increases sensitivity of cell to single-event upsets.
Zoutendyk, J. A.↗
Tin Whisker Electrical Short Circuit Characteristics Part 2
Existing risk simulations make the assumption that when a free tin whisker has bridged two adjacent exposed electrical conductors, the result is an electrical short circuit. This conservative assumption is made because shorting is a random event that has a currently unknown probability associated with it. Due to contact resistance electrical shorts may not occur at lower voltage levels. In this experiment, we study the effect of varying voltage on the breakdown of the contact resistance which leads to a short circuit. From this data we can estimate the probability of an electrical short, as a function of voltage, given that a free tin whisker has bridged two adjacent exposed electrical conductors. In addition, three tin whiskers grown from the same Space Shuttle Orbiter card guide used in the aforementioned experiment were cross-sectioned and studied using a focused ion beam (FIB).
Courey, Karim J.↗