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At least 145 records · Page 8

The D3 Middleware Architecture

DARWIN is a NASA developed, Internet-based system for enabling aerospace researchers to securely and remotely access and collaborate on the analysis of aerospace vehicle design data, primarily the results of wind-tunnel testing and numeric (e.g., computational fluid-dynamics) model executions. DARWIN captures, stores and indexes data; manages derived knowledge (such as visualizations across multiple datasets); and provides an environment for designers to collaborate in the analysis of test results. DARWIN is an interesting application because it supports high-volumes of data. integrates multiple modalities of data display (e.g., images and data visualizations), and provides non-trivial access control mechanisms. DARWIN enables collaboration by allowing not only sharing visualizations of data, but also commentary about and views of data. Here we provide an overview of the architecture of D3, the third generation of DARWIN. Earlier versions of DARWIN were characterized by browser-based interfaces and a hodge-podge of server technologies: CGI scripts, applets, PERL, and so forth. But browsers proved difficult to control, and a proliferation of computational mechanisms proved inefficient and difficult to maintain. D3 substitutes a pure-Java approach for that medley: A Java client communicates (though RMI over HTTPS) with a Java-based application server. Code on the server accesses information from JDBC databases, distributed LDAP security services, and a collaborative information system. D3 is a three tier-architecture, but unlike 'E-commerce' applications, the data usage pattern suggests different strategies than traditional Enterprise Java Beans - we need to move volumes of related data together, considerable processing happens on the client, and the 'business logic' on the server-side is primarily data integration and collaboration. With D3, we are extending DARWIN to handle other data domains and to be a distributed system, where a single login allows a user transparent access to test results from multiple servers and authority domains.

Walton, Joan↗

Testing Spatial Correlation of Subduction Interplate Coupling and Forearc Morpho-Tectonics

Subduction zones that are capable of generating great (Mw greater than 8) earthquakes appear to have a common assemblage of forearc morphologic elements. Although details vary, each have (from the trench landward), an accretionary prism, outer arc high, outer forearc basin, an inner forean: basin, and volcanic arc. This pattern is common in spite of great variation in forearc architecture. Because interseismic strain is known to be associated with a locked seismogenic plate interface, we infer that this common forearc morphology is related, in an unknown way, to the process of interseismic Strain accumulation and release in great earthquakes. To date, however, no clear relationship between the subduction process and the common elements of upper plate form has emerged. Whereas certain elements of the system, i.e. the outer arc high, are reasonably well- understood in a structural context, there is little understanding of the structural or topographic evolution of the other key elements like the inner arc and inner forearc basin, particularly with respect to the coupled zone of earthquake generation. This project developed a model of the seismologic, topographic, and uplift/denudation linkages between forearc topography and the subduction system by: 1) comparing geophysical, geodetic, and topographic data from subduction margins that generate large earthquakes; 2) using existing GPS, seismicity, and other data to model the relationship between seismic cycles involving a locked interface and upper-plate topographic development; and 3) using new GPS data and a range-scale topographic, uplift, and denudation analysis of the presently aseismic Cascadia margin to constrain topographic/plate coupling relationships at this poorly understood margin.

Goldfinger, Chris↗

Robust Bioinformatics Recognition with VLSI Biochip Microsystem

A microsystem architecture for real-time, on-site, robust bioinformatic patterns recognition and analysis has been proposed. This system is compatible with on-chip DNA analysis means such as polymerase chain reaction (PCR)amplification. A corresponding novel artificial neural network (ANN) learning algorithm using new sigmoid-logarithmic transfer function based on error backpropagation (EBP) algorithm is invented. Our results show the trained new ANN can recognize low fluorescence patterns better than the conventional sigmoidal ANN does. A differential logarithmic imaging chip is designed for calculating logarithm of relative intensities of fluorescence signals. The single-rail logarithmic circuit and a prototype ANN chip are designed, fabricated and characterized.

bioinformatics↗

Memory switches based on metal oxide thin films

MnO.sub.2-x thin films (12) exhibit irreversible memory switching (28) with an OFF/ON resistance ratio of at least about 10.sup.3 and the tailorability of ON state (20) resistance. Such films are potentially extremely useful as a connection element in a variety of microelectronic circuits and arrays (24). Such films provide a pre-tailored, finite, non-volatile resistive element at a desired place in an electric circuit, which can be electrically turned OFF (22) or disconnected as desired, by application of an electrical pulse. Microswitch structures (10) constitute the thin film element, contacted by a pair of separate electrodes (16a, 16b) and have a finite, pre-selected ON resistance which is ideally suited, for example, as a programmable binary synaptic connection for electronic implementation of neural network architectures. The MnO.sub.2-x microswitch is non-volatile, patternable, insensitive to ultraviolet light, and adherent to a variety of insulating substrates (14), such as glass and silicon dioxide-coated silicon substrates.

Ramesham, Rajeshuni↗

New Approaches to Low-Cost Scalable Doping of Interdigitated back Contact Silicon Solar Cells (Final Report)

The goal of this project was to develop novel approaches to patterning of dopants in the rear fingers of interdigitated back contact (IBC) Si solar cells to reduce the cost of manufacturing this high-efficiency-potential cell architecture. The work throughout this project can be divided into four categories: (a) development of dopant patterning technique using laser scribed Si contacts masks that are mechanically aligned with ~10 μm resolution to the underlying Si substrate; (b) measuring dopant spreading profiles in the isolation region between n- and p-type dopant fingers during plasma-enhanced chemical vapor deposition (PECVD) of doped hydrogenated amorphous silicon (a-Si:H) via shadow masks, and dopant desorption and re-adsorption during high-temperature annealing; (c) understanding the role of dopant compensation on the shunt resistance in contaminated isolation regions through analysis of defect-enhanced compensation; and (d) simulation and fabrication of passivated two-sided grid and back-contact solar cells to demonstrate the use of direct dopant patterning in cell fabrication. For the passivated two-sided grid solar cells, masked deposition was used to demonstrate an improvement in the blue response of the cell by creating a shallow front emitter. During development of the masked PECVD patterning process, we measured 3-D dopant profiles using secondary ion mass spectrometry. After deposition, in the masked region, the phosphorus dopant tail was >100 µm at concentrations >10 19 cm -3 while the boron dopant tail was shorter. During high-temperature crystallization of doped a-Si:H films to polycrystalline Si (poly-Si), phosphorus atoms spread by desorbing from the poly-Si surface and re-adsorbing onto intrinsic poly-Si on adjacent wafers that were separated by several millimeters. These contamination mechanisms resulted in a decrease in resistivity from ~10 5 Ω·cm for intrinsic poly-Si to ~10 -1 Ω·cm for contaminated poly-Si. Mitigation strategies for each contamination mechanism were developed to maintain a resistivity of ~10 5 Ω·cm between doped fingers. During fabrication of the 209 cells created during this project, it was found that despite contamination of the IBC gap through the abovementioned mechanisms, high shunt resistances and FF ~75% were still reached. Investigation into this led to the discovery of defect-enhanced compensation which exists within highly defective poly-Si when net doping concentrations reach the value of defect density (~10 18 cm -3 for many poly-Si films). Simulations guided us in the fabrication of IBCs and the cells fabricated were able to meet the year-end goals for BP 2 and 3 of 15% and 17% IBC cell efficiency, as well as the BP 4 goal of a 1% absolute increase in efficiency for PERC-like devices. However, the most efficient cell created during this project of 18.6% fell short of the 21% final project target. While the champion device fell short in V oc and J sc , many devices fabricated were able to reach the necessary goals of ~40 mA/cm 2 , ~700 mV, and ~75% FF required for a 21% device. The results generated from this project were disseminated through 11 conference presentations and proceedings. Presentations included oral talks at 2019 IEEE PVSC, 2019 MRS Fall Meeting, 2020 PVSEC-30 and 2021 IEEE PVSC, as well as poster presentations at 2020 IEEE PVSC and 2021 SiPV. The project resulted in 2 peer reviewed publications – one published in IEEE Journal of Photovoltaics and one in ACS Applied Energy Materials. The information gained in this project will aid in development of improved processes for fabrication of high-efficiency solar cells and other areas of the semiconductor device industry as well. The IBC cells will also pave the way for higher efficiency tandem devices. Through further manufacturing of high-efficiency solar cells, more of the world’s energy demands can be met through renewable sources, helping to stave off the worst effects that may come about from global climate change.

14 SOLAR ENERGY↗

Tree architecture: A strigolactone-deficient mutant reveals a connection between branching order and auxin gradient along the tree stem

Due to their long lifespan, trees and bushes develop higher order of branches in a perennial manner. In contrast to a tall tree, with a clearly defined main stem and branching order, a bush is shorter and has a less apparent main stem and branching pattern. To address the developmental basis of these two forms, we studied several naturally occurring architectural variants in silver birch (Betula pendula). Using a candidate gene approach, we identified a bushy kanttarelli variant with a loss-of-function mutation in the BpMAX1 gene required for strigolactone (SL) biosynthesis. While kanttarelli is shorter than the wild type (WT), it has the same number of primary branches, whereas the number of secondary branches is increased, contributing to its bush-like phenotype. To confirm that the identified mutation was responsible for the phenotype, we phenocopied kanttarelli in transgenic BpMAX1::RNAi birch lines. SL profiling confirmed that both kanttarelli and the transgenic lines produced very limited amounts of SL. Interestingly, the auxin (IAA) distribution along the main stem differed between WT and BpMAX1::RNAi. In the WT, the auxin concentration formed a gradient, being higher in the uppermost internodes and decreasing toward the basal part of the stem, whereas in the transgenic line, this gradient was not observed. Through modeling, we showed that the different IAA distribution patterns may result from the difference in the number of higher-order branches and plant height. Future studies will determine whether the IAA gradient itself regulates aspects of plant architecture.

59 BASIC BIOLOGICAL SCIENCES↗

Automatic Differentiation of C++ Codes on Emerging Manycore Architectures with Sacado

Automatic differentiation (AD) is a well-known technique for evaluating analytic derivatives of calculations implemented on a computer, with numerous software tools available for incorporating AD technology into complex applications. However, a growing challenge for AD is the efficient differentiation of parallel computations implemented on emerging manycore computing architectures such as multicore CPUs, GPUs, and accelerators as these devices become more pervasive. In this work, we explore forward mode, operator overloading-based differentiation of C++ codes on these architectures using the widely available Sacado AD software package. In particular, we leverage Kokkos, a C++ tool providing APIs for implementing parallel computations that is portable to a wide variety of emerging architectures. Here we describe the challenges that arise when differentiating code for these architectures using Kokkos, and two approaches for overcoming them that ensure optimal memory access patterns as well as expose additional dimensions of fine-grained parallelism in the derivative calculation. We describe the results of several computational experiments that demonstrate the performance of the approach on a few contemporary CPU and GPU architectures. We then conclude with applications of these techniques to the simulation of discretized systems of partial differential equations.

97 MATHEMATICS AND COMPUTING↗

Memory Circuit Fault Simulator

Spacecraft are known to experience significant memory part-related failures and problems, both pre- and postlaunch. These memory parts include both static and dynamic memories (SRAM and DRAM). These failures manifest themselves in a variety of ways, such as pattern-sensitive failures, timingsensitive failures, etc. Because of the mission critical nature memory devices play in spacecraft architecture and operation, understanding their failure modes is vital to successful mission operation. To support this need, a generic simulation tool that can model different data patterns in conjunction with variable write and read conditions was developed. This tool is a mathematical and graphical way to embed pattern, electrical, and physical information to perform what-if analysis as part of a root cause failure analysis effort.

Sheldon, Douglas J.↗

Novel Highly Parallel and Systolic Architectures Using Quantum Dot-Based Hardware

VLSI technology has made possible the integration of massive number of components (processors, memory, etc.) into a single chip. In VLSI design, memory and processing power are relatively cheap and the main emphasis of the design is on reducing the overall interconnection complexity since data routing costs dominate the power, time, and area required to implement a computation. Communication is costly because wires occupy the most space on a circuit and it can also degrade clock time. In fact, much of the complexity (and hence the cost) of VLSI design results from minimization of data routing. The main difficulty in VLSI routing is due to the fact that crossing of the lines carrying data, instruction, control, etc. is not possible in a plane. Thus, in order to meet this constraint, the VLSI design aims at keeping the architecture highly regular with local and short interconnection. As a result, while the high level of integration has opened the way for massively parallel computation, practical and full exploitation of such a capability in many applications of interest has been hindered by the constraints on interconnection pattern. More precisely. the use of only localized communication significantly simplifies the design of interconnection architecture but at the expense of somewhat restricted class of applications. For example, there are currently commercially available products integrating; hundreds of simple processor elements within a single chip. However, the lack of adequate interconnection pattern among these processing elements make them inefficient for exploiting a large degree of parallelism in many applications.

Fijany, Amir↗

Development of a dynamical model and energy analysis for wheel loader

The objective of this paper is to develop a fully integrated model for the wheel loader, including the subsystem dynamics of the engine, drivetrain, working circuit, steering circuit, and vehicle. It leads to a high-order strongly nonlinear system, and all state variables are coupled together to form a Multi-Input and Multi-Output (MIMO) system. A control architecture is proposed to decouple the MIMO system into several Single-Input and Single-Output (SISO) systems. Here, a tracking problem has been formulated to validate this fully integrated model with the field test data. The accuracy of the model is verified by the 2.3% difference between the measured and simulated fuel consumption. Meanwhile, an energy distribution analysis is conducted to reveal the energy consumption and energy loss of each portion of the wheel loader. Such a model can be used to plan the working pattern, guide the driving habits of human operators, or refine the underlying architecture, leading to the ultimate goal of reducing total fuel consumption and improving productivity.

42 ENGINEERING↗

An Automatic Code Synthesizer

This paper describes the design and architecture fo an automatic code sysnthesizer we call the ACG. The input to the ACG is a list of facts that must hold for the generated code, along with domain-specific knowledge (design rules and patterns).

programming programming code programming productiv↗

A Navier-Strokes Chimera Code on the Connection Machine CM-5: Design and Performance

We have implemented a three-dimensional compressible Navier-Stokes code on the Connection Machine CM-5. The code is set up for implicit time-stepping on single or multiple structured grids. For multiple grids and geometrically complex problems, we follow the 'chimera' approach, where flow data on one zone is interpolated onto another in the region of overlap. We will describe our design philosophy and give some timing results for the current code. A parallel machine like the CM-5 is well-suited for finite-difference methods on structured grids. The regular pattern of connections of a structured mesh maps well onto the architecture of the machine. So the first design choice, finite differences on a structured mesh, is natural. We use centered differences in space, with added artificial dissipation terms. When numerically solving the Navier-Stokes equations, there are liable to be some mesh cells near a solid body that are small in at least one direction. This mesh cell geometry can impose a very severe CFL (Courant-Friedrichs-Lewy) condition on the time step for explicit time-stepping methods. Thus, though explicit time-stepping is well-suited to the architecture of the machine, we have adopted implicit time-stepping. We have further taken the approximate factorization approach. This creates the need to solve large banded linear systems and creates the first possible barrier to an efficient algorithm. To overcome this first possible barrier we have considered two options. The first is just to solve the banded linear systems with data spread over the whole machine, using whatever fast method is available. This option is adequate for solving scalar tridiagonal systems, but for scalar pentadiagonal or block tridiagonal systems it is somewhat slower than desired. The second option is to 'transpose' the flow and geometry variables as part of the time-stepping process: Start with x-lines of data in-processor. Form explicit terms in x, then transpose so y-lines of data are in-processor. Form explicit terms in y, then transpose so z-lines are in processor. Form explicit terms in z, then solve linear systems in the z-direction. Transpose to the y-direction, then solve linear systems in the y-direction. Finally transpose to the x direction and solve linear systems in the x-direction. This strategy avoids inter-processor communication when differencing and solving linear systems, but requires a large amount of communication when doing the transposes. The transpose method is more efficient than the non-transpose strategy when dealing with scalar pentadiagonal or block tridiagonal systems. For handling geometrically complex problems the chimera strategy was adopted. For multiple zone cases we compute on each zone sequentially (using the whole parallel machine), then send the chimera interpolation data to a distributed data structure (array) laid out over the whole machine. This information transfer implies an irregular communication pattern, and is the second possible barrier to an efficient algorithm. We have implemented these ideas on the CM-5 using CMF (Connection Machine Fortran), a data parallel language which combines elements of Fortran 90 and certain extensions, and which bears a strong similarity to High Performance Fortran. We make use of the Connection Machine Scientific Software Library (CMSSL) for the linear solver and array transpose operations.

Jespersen, Dennis C.↗

Optimization-based approaches to control of connected and automated vehicles: Principles, complexities, applications, challenges, and outlook

Safe and optimal motion control for connected and automated vehicles (CAVs) poses a fundamental optimization challenge at the intersection of system complexity, environmental uncertainty, and stringent real-time constraints. Existing surveys address this challenge in isolation – focusing either on specific control techniques or individual uncertainty sources – without providing a unified framework that characterizes the trade-offs among computational tractability, performance verifiability, and adaptive generalization across paradigms. This review addresses that gap by presenting a cohesive analytical framework concentrated on the decision-making and trajectory optimization layers of the CAV autonomy stack. We systematically analyze three major optimization paradigms – first-principles model-based optimization, data-driven methods, and hybrid synergistic architectures – evaluating each against four core complexity axes: problem formulation, constraint handling, optimality guarantees, and robustness. Key applications including platooning, trajectory planning, collision avoidance, and cooperative control are examined to reveal recurring methodological patterns and critical operational constraints that limit real-world performance. Our synthesis identifies verifiable hybrid architectures, incentive-aligned multi-agent cooperation, and hardware-algorithm co-design as the defining research frontiers, and distills a targeted agenda for developing CAV control systems that are simultaneously safe, computationally efficient, and deployable in the full complexity of real-world traffic environments.

Muzahid, Abu Jafar Md [University of Tennessee, Kn↗

MAPredict: Static Analysis Driven Memory Access Prediction Framework for Modern CPUs

Application memory access patterns are crucial in deciding how much traffic is served by the cache and forwarded to the dynamic random-access memory (DRAM). However, predicting such memory traffic is difficult because of the interplay of prefetchers, compilers, parallel execution, and innovations in manufacturer-specific micro-architectures. This research introduced MAPredict, a static analysis-driven framework that addresses these challenges to predict last-level cache (LLC)-DRAM traffic. By exploring and analyzing the behavior of modern Intel processors, MAPredict formulates cache-aware analytical models. MAPredict invokes these models to predict LLC-DRAM traffic by combining the application model, machine model, and user-provided hints to capture dynamic information. MAPredict successfully predicts LLC-DRAM traffic for different regular access patterns and provides the means to combine static and empirical observations for irregular access patterns. Evaluating 130 workloads from six applications on recent Intel micro-architectures, MAPredict yielded an average accuracy of 99% for streaming, 91% for strided, and 92% for stencil patterns. By coupling static and empirical methods, up to 97% average accuracy was obtained for random access patterns on different micro-architectures.

Monil, M. A. H.↗

A neural network prototyping package within IRAF

We outline our plans for incorporating a Neural Network Prototyping Package into the IRAF environment. The package we are developing will allow the user to choose between different types of networks and to specify the details of the particular architecture chosen. Neural networks consist of a highly interconnected set of simple processing units. The strengths of the connections between units are determined by weights which are adaptively set as the network 'learns'. In some cases, learning can be a separate phase of the user cycle of the network while in other cases the network learns continuously. Neural networks have been found to be very useful in pattern recognition and image processing applications. They can form very general 'decision boundaries' to differentiate between objects in pattern space and they can be used for associative recall of patterns based on partial cures and for adaptive filtering. We discuss the different architectures we plan to use and give examples of what they can do.

Bazell, D.↗

SSME fault monitoring and diagnosis expert system

An expert system, called LEADER, has been designed and implemented for automatic learning, detection, identification, verification, and correction of anomalous propulsion system operations in real time. LEADER employs a set of sensors to monitor engine component performance and to detect, identify, and validate abnormalities with respect to varying engine dynamics and behavior. Two diagnostic approaches are adopted in the architecture of LEADER. In the first approach fault diagnosis is performed through learning and identifying engine behavior patterns. LEADER, utilizing this approach, generates few hypotheses about the possible abnormalities. These hypotheses are then validated based on the SSME design and functional knowledge. The second approach directs the processing of engine sensory data and performs reasoning based on the SSME design, functional knowledge, and the deep-level knowledge, i.e., the first principles (physics and mechanics) of SSME subsystems and components. This paper describes LEADER's architecture which integrates a design based reasoning approach with neural network-based fault pattern matching techniques. The fault diagnosis results obtained through the analyses of SSME ground test data are presented and discussed.

Ali, Moonis↗

Atomic-scale manipulation of buried graphene–silicon carbide interface by local electric field

Abstract Precision of scanning tunneling microscopy (STM) enables control of matter at scales of single atoms. However, transition from atomic-scale manipulation strategies to practical devices encounters fundamental problems in protection of the designer structures formed atop the surface. In this context, STM manipulation of subsurface structures on technologically relevant materials is encouraging. Here, we propose a material platform and protocols for precise manipulation of a buried graphene interface. We show that an electric field from the STM tip reversibly controls breaking and restoring of covalent bonds between the graphene buffer layer and the SiC substrate. The process involves charge redistribution at the atomically sharp interface plane under the epitaxial graphene layer(s). This buried manipulation platform is laterally defined by unit cells from the corresponding (6×6) SiC moiré lattice of the epitaxial graphene. Local and reversible electric-field-induced patterning of graphene heterostructures from the bottom interface creates an alternative architecture concept for their applications.

74 ATOMIC AND MOLECULAR PHYSICS↗

Neural networks for structural design - An integrated system implementation

The development of powerful automated procedures to aid the creative designer is becoming increasingly critical for complex design tasks. In the work described here Artificial Neural Nets are applied to acquire structural analysis and optimization domain expertise. Based on initial instructions from the user an automated procedure generates random instances of structural analysis and/or optimization 'experiences' that cover a desired domain. It extracts training patterns from the created instances, constructs and trains an appropriate network architecture and checks the accuracy of net predictions. The final product is a trained neural net that can estimate analysis and/or optimization results instantaneously.

Berke, Laszlo↗