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At least 145 records · Page 8

General-purpose interface bus for multiuser, multitasking computer system

The architecture of a multiuser, multitasking, virtual-memory computer system intended for the use by a medium-size research group is described. There are three central processing units (CPU) in the configuration, each with 16 MB memory, and two 474 MB hard disks attached. CPU 1 is designed for data analysis and contains an array processor for fast-Fourier transformations. In addition, CPU 1 shares display images viewed with the image processor. CPU 2 is designed for image analysis and display. CPU 3 is designed for data acquisition and contains 8 GPIB channels and an analog-to-digital conversion input/output interface with 16 channels. Up to 9 users can access the third CPU simultaneously for data acquisition. Focus is placed on the optimization of hardware interfaces and software, facilitating instrument control, data acquisition, and processing.

Generazio, Edward R.↗

Performance of hashed cache data migration schemes on multicomputers

After conducting an examination of several data-migration mechanisms which permit an explicit and controlled mapping of data to memory, a set of schemes for storage and retrieval of off-processor array elements is experimentally evaluated and modeled. All schemes considered have their basis in the use of hash tables for efficient access of nonlocal data. The techniques in question are those of hashed cache, partial enumeration, and full enumeration; in these, nonlocal data are stored in hash tables, so that the operative difference lies in the amount of memory used by each scheme and in the retrieval mechanism used for nonlocal data.

Hiranandani, Seema↗

Correlation-based technique for automated tunable diode laser scan stabilization

A software-based method for real-time, active stabilization of tunable diode laser spectral scans is described. The procedure is suitable for use with field and laboratory instrumentation where automated, unattended spectrometer operation is required. An autocorrelation of two high-resolution reference gas infrared spectra is computed at regular intervals, and the location of the maximum value of the autocorrelation provides the relative abscissa shift between the spectra. Small adjustments to the laser scan parameters are thereby made to ensure that drifts in the laser output frequency are tracked and compensated. Calculations required for stabilization of a 512-point spectrum can be completed in under 25 ms using an inexpensive, moderate-speed, array processor installed in a PC.

May, Randy D.↗

Particle displacement tracking applied to air flows

Electronic Particle Image Velocimetric (PIV) techniques offer many advantages over conventional photographic PIV methods such as fast turn around times and simplified data reduction. A new all electronic PIV technique was developed which can measure high speed gas velocities. The Particle Displacement Tracking (PDT) technique employs a single CW laser, small seed particles (1 micron), and a single intensified, gated CCD array frame camera to provide a simple and fast method of obtaining two-dimensional velocity vector maps with unambiguous direction determination. Use of a single CCD camera eliminates registration difficulties encountered when multiple cameras are used to obtain velocity magnitude and direction information. An 80386 PC equipped with a large memory buffer frame-grabber board provides all of the data acquisition and data reduction operations. No array processors of other numerical processing hardware are required. Full video resolution (640 x 480 pixel) is maintained in the acquired images, providing high resolution video frames of the recorded particle images. The time between data acquisition to display of the velocity vector map is less than 40 sec. The new electronic PDT technique is demonstrated on an air nozzle flow with velocities less than 150 m/s.

Wernet, Mark P.↗

Model-driven mapping onto distributed memory parallel computers

The author addresses the problem of exploiting the parallelism available in a program to efficiently employ the resources of the target machine in the context of building a mapping compiler for a distributed memory parallel machine. He demonstrates the effectiveness of using execution models to select the best mapping technique from among those available for a given program segment on a particular machine. Through analysis of the execution models for several mapping techniques for one class of programs on a linear processor array, it is shown that selecting the best technique for a particular program instance can make a significant difference in performance. On the other hand, the results of benchmarks from a mapping compiler for the Warp systolic array machine show that the execution models considered are accurate enough to select the best mapping technique for a given program.

Sussman, Alan↗

An architecture for real-time vision processing

To study the feasibility of developing an architecture for real time vision processing, a task queue server and parallel algorithms for two vision operations were designed and implemented on an i860-based Mercury Computing System 860VS array processor. The proposed architecture treats each vision function as a task or set of tasks which may be recursively divided into subtasks and processed by multiple processors coordinated by a task queue server accessible by all processors. Each idle processor subsequently fetches a task and associated data from the task queue server for processing and posts the result to shared memory for later use. Load balancing can be carried out within the processing system without the requirement for a centralized controller. The author concludes that real time vision processing cannot be achieved without both sequential and parallel vision algorithms and a good parallel vision architecture.

Chien, Chiun-Hong↗

VLSI neuroprocessors

Electronic and optoelectronic hardware implementations of highly parallel computing architectures address several ill-defined and/or computation-intensive problems not easily solved by conventional computing techniques. The concurrent processing architectures developed are derived from a variety of advanced computing paradigms including neural network models, fuzzy logic, and cellular automata. Hardware implementation technologies range from state-of-the-art digital/analog custom-VLSI to advanced optoelectronic devices such as computer-generated holograms and e-beam fabricated Dammann gratings. JPL's concurrent processing devices group has developed a broad technology base in hardware implementable parallel algorithms, low-power and high-speed VLSI designs and building block VLSI chips, leading to application-specific high-performance embeddable processors. Application areas include high throughput map-data classification using feedforward neural networks, terrain based tactical movement planner using cellular automata, resource optimization (weapon-target assignment) using a multidimensional feedback network with lateral inhibition, and classification of rocks using an inner-product scheme on thematic mapper data. In addition to addressing specific functional needs of DOD and NASA, the JPL-developed concurrent processing device technology is also being customized for a variety of commercial applications (in collaboration with industrial partners), and is being transferred to U.S. industries. This viewgraph p resentation focuses on two application-specific processors which solve the computation intensive tasks of resource allocation (weapon-target assignment) and terrain based tactical movement planning using two extremely different topologies. Resource allocation is implemented as an asynchronous analog competitive assignment architecture inspired by the Hopfield network. Hardware realization leads to a two to four order of magnitude speed-up over conventional techniques and enables multiple assignments, (many to many), not achievable with standard statistical approaches. Tactical movement planning (finding the best path from A to B) is accomplished with a digital two-dimensional concurrent processor array. By exploiting the natural parallel decomposition of the problem in silicon, a four order of magnitude speed-up over optimized software approaches has been demonstrated.

Kemeny, Sabrina E.↗

Development of software for the MSFC solar vector magnetograph

The Marshall Space Flight Center Solar Vector Magnetograph is a special purpose telescope used to measure the vector magnetic field in active areas on the surface of the sun. This instrument measures the linear and circular polarization intensities (the Stokes vectors Q, U and V) produced by the Zeeman effect on a specific spectral line due to the solar magnetic field from which the longitudinal and transverse components of the magnetic field may be determined. Beginning in 1990 as a Summer Faculty Fellow in project JOVE and continuing under NASA Grant NAG8-1042, the author has been developing computer software to perform these computations, first using a DEC MicroVAX system equipped with a high speed array processor, and more recently using a DEC AXP/OSF system. This summer's work is a continuation of this development.

Kineke, Jack↗

PIV/HPIV Film Analysis Software Package

A PIV/HPIV film analysis software system was developed that calculates the 2-dimensional spatial autocorrelations of subregions of Particle Image Velocimetry (PIV) or Holographic Particle Image Velocimetry (HPIV) film recordings. The software controls three hardware subsystems including (1) a Kodak Megaplus 1.4 camera and EPIX 4MEG framegrabber subsystem, (2) an IEEE/Unidex 11 precision motion control subsystem, and (3) an Alacron I860 array processor subsystem. The software runs on an IBM PC/AT host computer running either the Microsoft Windows 3.1 or Windows 95 operating system. It is capable of processing five PIV or HPIV displacement vectors per second, and is completely automated with the exception of user input to a configuration file prior to analysis execution for update of various system parameters.

Blackshire, James L.↗

Sensitivity Analysis of ProSEDS (Propulsive Small Expendable Deployer System) Data Communication System

This paper discusses analytical approaches to evaluating performance of Spacecraft On-Board Computing systems, thereby ultimately achieving a reliable spacecraft data communications systems. The sensitivity analysis approach of memory system on the ProSEDS (Propulsive Small Expendable Deployer System) as a part of its data communication system will be investigated. Also, general issues and possible approaches to reliable Spacecraft On-Board Interconnection Network and Processor Array will be shown. The performance issues of a spacecraft on-board computing systems such as sensitivity, throughput, delay and reliability will be introduced and discussed.

Park, Nohpill↗

Integrating Computer Architectures into the Design of High-Performance Controllers

Modern control systems must typically perform real-time identification and control, as well as coordinate a host of other activities related to user interaction, on-line graphics, and file management. This paper discusses five global design considerations that are useful to integrate array processor, multimicroprocessor, and host computer system architecture into versatile, high-speed controllers. Such controllers are capable of very high control throughput, and can maintain constant interaction with the non-real-time or user environment. As an application example, the architecture of a high-speed, closed-loop controller used to actively control helicopter vibration will be briefly discussed. Although this system has been designed for use as the controller for real-time rotorcraft dynamics and control studies in a wind-tunnel environment, the control architecture can generally be applied to a wide range of automatic control applications.

Jacklin, Stephen A.↗

NASA Tech Briefs, June 2008

Topics covered include: Charge-Control Unit for Testing Lithium-Ion Cells; Measuring Positions of Objects Using Two or More Cameras; Lidar System for Airborne Measurement of Clouds and Aerosols; Radiation-Insensitive Inverse Majority Gates; Reduced-Order Kalman Filtering for Processing Relative Measurements; Spaceborne Processor Array; Instrumentation System Diagnoses a Thermocouple; Chromatic Modulator for a High-Resolution CCD or APS; Commercial Product Activation Using RFID; Cup Cylindrical Waveguide Antenna; Aerobraking Maneuver (ABM) Report Generator; ABM Drag_Pass Report Generator; Transformation of OODT CAS to Perform Larger Tasks; Visualization Component of Vehicle Health Decision Support System; Mars Reconnaissance Orbiter Uplink Analysis Tool; Problem Reporting System; G-Guidance Interface Design for Small Body Mission Simulation; DSN Scheduling Engine; Replacement Sequence of Events Generator; Force-Control Algorithm for Surface Sampling; Tool for Merging Proposals Into DSN Schedules; Micromachined Slits for Imaging Spectrometers; Fabricating Nanodots Using Lift-Off of a Nanopore Template; Making Complex Electrically Conductive Patterns on Cloth; Special Polymer/Carbon Composite Films for Detecting SO2; Nickel-Based Superalloy Resists Embrittlement by Hydrogen; Chemical Passivation of Li+-Conducting Solid Electrolytes; Organic/Inorganic Polymeric Composites for Heat-Transfer Reduction; Composite Cathodes for Dual-Rate Li-Ion Batteries; Improved Descent-Rate Limiting Mechanism; Alignment-Insensitive Lower-Cost Telescope Architecture; Micro-Resistojet for Small Satellites; Using Piezoelectric Devices to Transmit Power through Walls; Miniature Latching Valve; Apparatus for Sampling Surface Contamination; Novel Species of Non-Spore-Forming Bacteria; Chamber for Aerosol Deposition of Bioparticles; Hyperspectral Sun Photometer for Atmospheric Characterization and Vicarious Calibrations; Dynamic Stability and Gravitational Balancing of Multiple Extended Bodies; Simulation of Stochastic Processes by Coupled ODE-PDE; Cluster Inter-Spacecraft Communications; Genetic Algorithm Optimizes Q-LAW Control Parameters; Low-Impact Mating System for Docking Spacecraft; Non-Destructive Evaluation of Materials via Ultraviolet Spectroscopy; Gold-on-Polymer-Based Sensing Films for Detection of Organic and Inorganic Analytes in the Air; and Quantum-Inspired Maximizer.

Source record↗

High-performance ultra-low power VLSI analog processor for data compression

An apparatus for data compression employing a parallel analog processor. The apparatus includes an array of processor cells with N columns and M rows wherein the processor cells have an input device, memory device, and processor device. The input device is used for inputting a series of input vectors. Each input vector is simultaneously input into each column of the array of processor cells in a pre-determined sequential order. An input vector is made up of M components, ones of which are input into ones of M processor cells making up a column of the array. The memory device is used for providing ones of M components of a codebook vector to ones of the processor cells making up a column of the array. A different codebook vector is provided to each of the N columns of the array. The processor device is used for simultaneously comparing the components of each input vector to corresponding components of each codebook vector, and for outputting a signal representative of the closeness between the compared vector components. A combination device is used to combine the signal output from each processor cell in each column of the array and to output a combined signal. A closeness determination device is then used for determining which codebook vector is closest to an input vector from the combined signals, and for outputting a codebook vector index indicating which of the N codebook vectors was the closest to each input vector input into the array.

Tawel, Raoul↗

Phased array antenna beamforming using optical processor

The feasibility of optical processor based beamforming for microwave array antennas is investigated. The primary focus is on systems utilizing the 20/30 GHz communications band and a transmit configuration exclusively to serve this band. A mathematical model is developed for computation of candidate design configurations. The model is capable of determination of the necessary design parameters required for spatial aspects of the microwave 'footprint' (beam) formation. Computed example beams transmitted from geosynchronous orbit are presented to demonstrate network capabilities. The effect of the processor on the output microwave signal to noise quality at the antenna interface is also considered.

Anderson, L. P.↗

Aluminum Nitride Based MEMS IF Filter Array for Analog Spectral Processors

The purpose of this project was to enable new levels of performance in radio frequency systems, such as adaptability, size and stability, based on aluminum nitride microresonator technology. Early in the project, in 2008, Sandia developed arrays of filters for realizing high scan rate spectrum analyzers at 20 MHz and Rockwell Collins demonstrated a high scan rate spectrum analyzer leveraging this technology in 2009. The filter arrays, because of the transduction physics, demonstrated massively reduced size, loss and impedance compared to existing filter technologies. These device level benefits translated to reduced size and power for the spectrum analyzers at the system level.

71 CLASSICAL AND QUANTUM MECHANICS, GENERAL PHYSIC↗

The current status of super computers

In this paper, commercially available super computers are surveyed. Computer performance in general is limited by circuit speeds and physical size. Assuming the use of the fastest technology, super computers typically use parallelism in the form of either vector processing or array processing to obtain performance. The Burroughs Scientific Processor is an array computer with 16 separate processors, the Cray-1 and CDC STAR-100 are vector processors, the Goodyear Aerospace STARAN is an array processor with up to 8192 single bit processors, and the Systems Development Corporation PEPE is a collection of up to 288 separate processors.

Knight, J. C.↗

Development of a ground signal processor for digital synthetic array radar data

A modified APQ-102 sidelooking array radar (SLAR) in a B-57 aircraft test bed is used, with other optical and infrared sensors, in remote sensing of Earth surface features for various users at NASA Johnson Space Center. The video from the radar is normally recorded on photographic film and subsequently processed photographically into high resolution radar images. Using a high speed sampling (digitizing) system, the two receiver channels of cross-and co-polarized video are recorded on wideband magnetic tape along with radar and platform parameters. These data are subsequently reformatted and processed into digital synthetic aperture radar images with the image data available on magnetic tape for subsequent analysis by investigators. The system design and results obtained are described.

Griffin, C. R.↗