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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.
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Single-event gate rupture (SEGR)in vertical power MOSFETs is induced by charge deposited in the epitaxial region (below the gate oxide) in concert with the weakening of the oxide, both are a result of the ion passage.
Destructive single event effects (DSEE) are a main concern for pioneers attempting to use COTS (commercial-off-the-shelf) devices in space, so a COTS instrument full of such devices is particulary scary.
Breakdown of gate oxides from heavy ions is investigated.
This compendium of SEGR and SEB data organizes results from several laboratories comparing failure thresholds for several different manufacturers and technologies. The results of this compendium are aimed at the designer to show the possible variations between manufacturers and processes.
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Features of flash memories: Flash memories are non-volatile; that is they do not require power to retain the information in its memory. They can be erased and written to while the device is still in the circuit.
Star trackers are a reliable and accurate device used by almost all spacecraft in order to autonomously determine their orientation.
Applications of highly scaled devices in space applications are shown to be limited by hard errors from cosmic rays. Hard errors were first observed in 0.8 (micro)m DRAMs. For feature sizes below 0.5 (micro)m, scaling theory predicts that low power devices will have much lower hard error rates than devices optimized for high speed.
Gamma irradiation and annealing of a large number of Actel FPGAs with in-situ current measurements were performed. Lot-to-lot, part-to-part, and burn in variations were measured. Findings include a catastrophic failure mechanism and minimal dose rate effects.
In this paper, total ionizing dose radiation evaluations of the Micron 64 Mb 3.3 V, fast page mode DRAM and the IBM LUNA-ES 16 Mb DRAM are presented. The effects of scaling on total ionizing dose radiation hardness are studied utilizing test structures and a series of 16 Mb DRAMs with different feature sizes from the same manufacturing line. General agreement was found between the threshold voltage shifts of 16 Mb DRAM test structures and the threshold voltage measured on complete circuits using retention time measurements. Retention time measurement data from early radiation doses are shown that allow internal failure modes to be distinguished.
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A new method using an array of MOS transistors formeasuring dose absorbed from ionizing radiation is compared to previous dosimetric methods., The accuracy and precision of dosimetry based on COTS SRAMs, DRAMs, and WPROMs are compared and contrasted. Applications of these devices in various space missions will be discussed. TID results are presented for this summary and microdosimetricresults will be added to the full paper. Finally, an analysis of the optimal condition for a digital dosimeter will be presented.
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Heavy ion testing of the Xilinx Virtex II was conducted on the configuration, block RAM and user flip flop cells to determine their static single-event upset susceptibility using LETs of 1.2 to 60 MeVcm^2/mg. A software program specifically designed to count errors in the FPGA was used to reveal L1/e, values (the LET at which the cross section is l/e times the saturation cross-section) and single-event functional-interrupt failures.
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Heavy ion irradiation of high-voltage power MOSFETs with long-range ions was performed using 14, 19, 22, 24, 28 and 39 MeV-cm2/mg ions.