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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 1,405 records · Page 78
All sourcesNASA NTRSDOE OSTI
NASA NTRS1984

Flat-plate module efficiency versus cost tradeoffs

The Five Year Research Plan energy cost methodology and in depth analyses based on the extensive data that are relevant to PV systems are used to facilitate the accomplishment of the $0.15/kWh energy cost goal. An equation is given for the five year energy cost methodology. The allocation guidelines are designed to be consistent with flat solar array (FSA) milestones for module cost, module efficiency, and the programmatic goal for energy cost. They are research targets that appear to be achievable, given prior accomplishments and planned activities in the areas of low cost silicon purification, low cost sheet material, high efficiency cell processing, low cost, long life encapsulants, and automated fabrication method. Extensive sensitivity analysis work has been performed that shows that these guidelines represent an efficient way to meet the intent of the DOE program.

Aster, R. W.↗
NASA NTRS1984

Analysis of stress-strain relationships in silicon ribbon

An analysis of stress-strain relationships in silicon ribbon is presented. A model to present entire process, dynamical Transit Analysis is developed. It is found that knowledge of past-strain history is significant in modeling activities.

Dillon, O. W., Jr.↗
NASA NTRS1986

Ellipsometric Monitoring of Film Deposition

Impurities detected nondestructively during processing. In proposed system, surface of growing amorphous-silicon film monitored by ellipsometer at wavelength or combination of wavelengths at which impurity or impurities of interest absorb light strongly.

Bickler, D. B.↗
NASA NTRS1987

Study of Silicon-Web Growth

Study of dendritic-web growth of single-crystal silicon casts doubts on previously accepted physical concepts of process.

Richter, Robert↗
NASA NTRS1990

The effect of temperature cycling typical of low earth orbit satellites on thin films of YBa2Cu3O(7-x)

The refrigeration of superconductors in space poses a challenging problem. The problem could be less severe if superconducting materials would not have to be cooled when not in use. Thin films of the YBa2Cu3O(7-x) (YBCO) superconductor were subjected to thermal cycling, which was carried out to simulate a large number of eclipses of a low earth orbit satellite. Electrical measurements were performed to find the effect of the temperature cycling. Thin films of YBCO were formed by coevaporation of Y, BaF2, and Cu and postannealing in wet oxygen at 850 C for 3.5 h. The substrates used were (100) SrTiO3, polycrystalline alumina, and oxidized silicon; the last two have an evaporated zirconia layer. Processing and microstructure studies of these types of films have been published. THe zero resistance transition temperatures of the samples used in this study were 91, 82, and 86 K, respectively. The samples were characterized by four point probe electrical measurements as a function of temperature. The parameters measured were: the zero resistance transition temperature, the 10 to 90 percent transition width, and the room temperature resistance, normalized to that measured before temperature cycling. The results for two samples are presented. Each sample had a cumulative exposure. Cycling in atmospheric pressure nitrogen was performed at a rate of about 60 cycles per day, whereas in vacuum the rate was only about 10 cycles per day. The results indicate only little or no changes in the parameters measured. Degradation of superconducting thin films of YBCO has been reported due to storage in nitrogen. It is believed that the relatively good performance of films after temperature cycling is related to the fact that BaF2 was used as an evaporation source. The latest result on extended temperature cycling indicates significant degradation. Further tests of extended cycling will be carried out to provide additional data and to clarify this preliminary finding.

Mogro-Campero, A.↗
NASA NTRS1990

Wide-bandgap epitaxial heterojunction windows for silicon solar cells

It is shown that the efficiency of a solar cell can be improved if minority carriers are confined by use of a wide-bandgap heterojunction window. For silicon (lattice constant a = 5.43 A), nearly lattice-matched wide-bandgap materials are ZnS (a = 5.41 A) and GaP (a = 5.45 A). Isotype n-n heterojuntions of both ZnS/Si and GaP/Si were grown on silicon n-p homojunction solar cells. Successful deposition processes used were metalorganic chemical vapor deposition (MO-CVD) for GaP and ZnS, and vacuum evaporation of ZnS. Planar (100) and (111) and texture-etched - (111)-faceted - surfaces were used. A decrease in minority-carrier surface recombination compared to a bare surface was seen from increased short-wavelength spectral response, increased open-circuit voltage, and reduced dark saturation current, with no degradation of the minority carrier diffusion length.

Landis, Geoffrey A.↗
NASA NTRS1991

Telerobotic electronic materials processing experiment

The Office of Commercial Programs (OCP), working in conjunction with NASA engineers at the Goddard Space Flight Center, is supporting research efforts in robot technology and microelectronics materials processing that will provide many spinoffs for science and industry. The Telerobotic Materials Processing Experiment (TRMPX) is a Shuttle-launched materials processing test payload using a Get Away Special can. The objectives of the project are to define, develop, and demonstrate an automated materials processing capability under realistic flight conditions. TRMPX will provide the capability to test the production processes that are dependent on microgravity. The processes proposed for testing include the annealing of amorphous silicon to increase grain size for more efficient solar cells, thin film deposition to demonstrate the potential of fabricating solar cells in orbit, and the annealing of radiation damaged solar cells.

Ollendorf, Stanford↗
NASA NTRS1995

Nanoelectronics: Opportunities for future space applications

Further improvements in the performance of integrated electronics will eventually halt due to practical fundamental limits on our ability to downsize transistors and interconnect wiring. Avoiding these limits requires a revolutionary approach to switching device technology and computing architecture. Nanoelectronics, the technology of exploiting physics on the nanometer scale for computation and communication, attempts to avoid conventional limits by developing new approaches to switching, circuitry, and system integration. This presentation overviews the basic principles that operate on the nanometer scale that can be assembled into practical devices and circuits. Quantum resonant tunneling (RT) is used as the center-piece of the overview since RT devices already operate at high temperature (120 degrees C) and can be scaled, in principle, to a few nanometers in semiconductors. Near- and long-term applications of GaAs and silicon quantum devices are suggested for signal and information processing, memory, optoelectronics, and radio frequency (RF) communication.

Frazier, Gary↗
NASA NTRS2008

Nano-Multiplication-Region Avalanche Photodiodes and Arrays

Nano-multiplication-region avalanche photodiodes (NAPDs), and imaging arrays of NAPDs integrated with complementary metal oxide/semiconductor (CMOS) active-pixel-sensor integrated circuitry, are being developed for applications in which there are requirements for high-sensitivity (including photoncounting) detection and imaging at wavelengths from about 250 to 950 nm. With respect to sensitivity and to such other characteristics as speed, geometric array format, radiation hardness, power demand of associated circuitry, size, weight, and robustness, NAPDs and arrays thereof are expected to be superior to prior photodetectors and arrays including CMOS active-pixel sensors (APSs), charge-coupled devices (CCDs), traditional APDs, and microchannelplate/ CCD combinations. Figure 1 depicts a conceptual NAPD array, integrated with APS circuitry, fabricated on a thick silicon-on-insulator wafer (SOI). Figure 2 presents selected aspects of the structure of a typical single pixel, which would include a metal oxide/semiconductor field-effect transistor (MOSFET) integrated with the NAPD. The NAPDs would reside in silicon islands formed on the buried oxide (BOX) layer of the SOI wafer. The silicon islands would be surrounded by oxide-filled insulation trenches, which, together with the BOX layer, would constitute an oxide embedding structure. There would be two kinds of silicon islands: NAPD islands for the NAPDs and MOSFET islands for in-pixel and global CMOS circuits. Typically, the silicon islands would be made between 5 and 10 m thick, but, if necessary, the thickness could be chosen outside this range. The side walls of the silicon islands would be heavily doped with electron-acceptor impurities (p+-doped) to form anodes for the photodiodes and guard layers for the MOSFETs. A nanoscale reach-through structure at the front (top in the figures) central position of each NAPD island would contain the APD multiplication region. Typically, the reach-through structure would be about 0.1 microns in diameter and between 0.3 and 0.4 nm high. The top layer in the reach-through structure would be heavily doped with electron-donor impurities (n+-doped) to make it act as a cathode. A layer beneath the cathode, between 0.1 and 0.2 nm thick, would be p-doped to a concentration .10(exp 17)cu cm. A thin n+-doped polysilicon pad would be formed on the top of the cathode to protect the cathode against erosion during a metal-silicon alloying step that would be part of the process of fabricating the array.

Zheng, Xinyu↗
NASA NTRS2010

Corrosion-Resistant Container for Molten-Material Processing

In a carbothermal process, gaseous methane is passed over molten regolith, which is heated past its melting point to a temperature in excess of 1,625 C. At this temperature, materials in contact with the molten regolith (or regolith simulant) corrode and lose their structural properties. As a result, fabricating a crucible to hold the molten material and providing a method of contact heating have been problematic. Alternative containment approaches use a large crucible and limit the heat zone of the material being processed, which is inefficient because of volume and mass constraints. Alternative heating approaches use non-contact heating, such as by laser or concentrated solar energy, which can be inefficient in transferring heat and thus require higher power heat sources to accomplish processing. The innovation is a combination of materials, with a substrate material having high structural strength and stiffness and high-temperature capability, and a coating material with a high corrosion resistance and high-temperature capability. The material developed is a molybdenum substrate with an iridium coating. Creating the containment crucible or heater jacket using this material combination requires only that the molybdenum, which is easily processed by conventional methods such as milling, electric discharge machining, or forming and brazing, be fabricated into an appropriate shape, and that the iridium coating be applied to any surfaces that may come in contact with the corrosive molten material. In one engineering application, the molybdenum was fashioned into a container for a heat pipe. Since only the end of the heat pipe is used to heat the regolith, the container has a narrowing end with a nipple in which the heat pipe is snugly fit, and the external area of this nipple, which contacts the regolith to transfer heat into it, is coated with iridium. At the time of this reporting, no single material has been found that can perform the functions of this combination of materials, and other combinations of materials have not proven to be survivable to the corrosiveness of this environment. High-temperature processing of materials with similar constituencies as lunar regolith is fairly common. The carbo-thermal process is commonly used to make metallurgical-grade silicon for the semiconductor and solar-cell industries.

Stern, Theodore G.↗
NASA NTRS2012

Nitrogen Isotopic Composition of Organic Matter in a Pristine Collection IDP

Anhydrous chondritic porous interplanetary dust particles (CP IDPs) are probable cometary materials that show primitive characteristics, such as unequilibrated mineralogy, fragile structure, and abundant presolar grains and organic matter [1-3]. CP IDPs are richer in aliphatic species and N-bearing aromatic hydrocarbons than meteoritic organics and commonly exhibit highly anomalous H and N isotopic compositions [4,5]. Cometary organic matter is of interest in part because it has escaped the hydrothermal processing experienced by meteorites. However, IDPs are collected using silicon oil that must be removed with strong organic solvents such as hexane. This procedure is likely to have removed some fraction of soluble organic phases in IDPs. We recently reported the first stratospheric collection of IDPs without the use of silicone oil [6]. Here we present initial studies of the carbonaceous material in an IDP from this collection.

Messenger, S.↗
NASA NTRS2014

Advanced CMOS Radiation Effects Testing and Analysis

Presentation at the annual NASA Electronic Parts and Packaging (NEPP) Program Electronic Technology Workshop (ETW). The material includes an update of progress in this NEPP task area over the past year, which includes testing, evaluation, and analysis of radiation effects data on the IBM 32 nm silicon-on-insulator (SOI) complementary metal oxide semiconductor (CMOS) process. The testing was conducted using test vehicles supplied by directly by IBM.

cmos↗
DOE OSTI2022

Two-qubit silicon quantum processor with operation fidelity exceeding 99%

Silicon spin qubits satisfy the necessary criteria for quantum information processing. However, a demonstration of high-fidelity state preparation and readout combined with high-fidelity single- and two-qubit gates, all of which must be present for quantum error correction, has been lacking. We use a two-qubit Si/SiGe quantum processor to demonstrate state preparation and readout with fidelity greater than 97%, combined with both single- and two-qubit control fidelities exceeding 99%. The operation of the quantum processor is quantitatively characterized using gate set tomography and randomized benchmarking. Finally, our results highlight the potential of silicon spin qubits to become a dominant technology in the development of intermediate-scale quantum processors.

97 MATHEMATICS AND COMPUTING↗
NASA NTRS2013

Planar Superconducting Millimeter-Wave/Terahertz Channelizing Filter

This innovation is a compact, superconducting, channelizing bandpass filter on a single-crystal (0.45 m thick) silicon substrate, which operates from 300 to 600 GHz. This device consists of four channels with center frequencies of 310, 380, 460, and 550 GHz, with approximately 50-GHz bandwidth per channel. The filter concept is inspired by the mammalian cochlea, which is a channelizing filter that covers three decades of bandwidth and 3,000 channels in a very small physical space. By using a simplified physical cochlear model, and its electrical analog of a channelizing filter covering multiple octaves bandwidth, a large number of output channels with high inter-channel isolation and high-order upper stopband response can be designed. A channelizing filter is a critical component used in spectrometer instruments that measure the intensity of light at various frequencies. This embodiment was designed for MicroSpec in order to increase the resolution of the instrument (with four channels, the resolution will be increased by a factor of four). MicroSpec is a revolutionary wafer-scale spectrometer that is intended for the SPICA (Space Infrared Telescope for Cosmology and Astrophysics) Mission. In addition to being a vital component of MicroSpec, the channelizing filter itself is a low-resolution spectrometer when integrated with only an antenna at its input, and a detector at each channel s output. During the design process for this filter, the available characteristic impedances, possible lumped element ranges, and fabrication tolerances were identified for design on a very thin silicon substrate. Iterations between full-wave and lumped-element circuit simulations were performed. Each channel s circuit was designed based on the availability of characteristic impedances and lumped element ranges. This design was based on a tabular type bandpass filter with no spurious harmonic response. Extensive electromagnetic modeling for each channel was performed. Four channels, with 50-GHz bandwidth, were designed, each using multiple transmission line media such as microstrip, coplanar waveguide, and quasi-lumped components on 0.45- m thick silicon. In the design process, modeling issues had to be overcome. Due to the extremely high frequencies, very thin Si substrate, and the superconducting metal layers, most commercially available software fails in various ways. These issues were mitigated by using alternative software that was capable of handling them at the expense of greater simulation time. The design of on-chip components for the filter characterization, such as a broadband antenna, Wilkinson power dividers, attenuators, detectors, and transitions has been completed.

Ehsan, Negar↗
NASA NTRS1983

Ultrasonics and Optics Would Control Shot Size

Feedback system assures production of silicon shot of uniform size. Breakup of silicon stream into drops is controlled, in part, by varying frequency of vibrations imparted to stream by ultrasonic transducer. Drop size monitored by photodetector. Control method particularly advantageous in that constant size is maintained even while other process variables are changed deliberately or inadvertently. Applicable to materials other than silicon.

Morrison, A. D.↗
NASA NTRS1978

The study of surface acoustic wave charge transfer device

A surface acoustic wave-charge transfer device, consisting of an n-type silicon substrate, a thermally grown silicon dioxide layer, and a sputtered film of piezoelectric zinc oxide is proposed as a means of circumventing problems associated with charge-coupled device (CCD) applications in memory, signal processing, and imaging. The proposed device creates traveling longitudinal electric fields in the silicon and replaces the multiphase clocks in CCD's. The traveling electric fields create potential wells which carry along charges stored there. These charges may be injected into the wells by light or by using a p-n junction as in conventional CCD's.

Papanicolaou, N.↗
NASA NTRS1990

Lunar oxygen and metal for use in near-Earth space: Magma electrolysis

Because it is energetically easier to get material from the Moon to Earth orbit than from the Earth itself, the Moon is a potentially valuable source of materials for use in space. The unique conditions on the Moon, such as vacuum, absence of many reagents common on the Earth, and the presence of very nontraditional ores suggest that a unique and nontraditional process for extracting materials from the ores may prove the most practical. With this in mind, an investigation of unfluxed silicate electrolysis as a method for extracting oxygen, iron, and silicon from lunar regolith was initiated and is discussed. The advantages of the process include simplicity of concept, absence of need to supply reagents from Earth, and low power and mass requirements for the processing plant. Disadvantages include the need for uninterrupted high temperature and the highly corrosive nature of the high-temperature silicate melts which has made identifying suitable electrode and container materials difficult.

Colson, Russell O.↗
DOE OSTI2016

Microscratch testing method for systematic evaluation of the adhesion of atomic layer deposited thin films on silicon

The scratch test method is widely used for adhesion evaluation of thin films and coatings. Usual critical load criteria designed for scratch testing of coatings were not applicable to thin atomic layer deposition (ALD) films on silicon wafers. Thus, the bases for critical load evaluation were established and the critical loads suitable for ALD coating adhesion evaluation on silicon wafers were determined in this paper as L{sub CSi1}, L{sub CSi2}, L{sub CALD1}, and L{sub CALD2}, representing the failure points of the silicon substrate and the coating delamination points of the ALD coating. The adhesion performance of the ALD Al{sub 2}O{sub 3}, TiO{sub 2}, TiN, and TaCN+Ru coatings with a thickness range between 20 and 600 nm and deposition temperature between 30 and 410 °C on silicon wafers was investigated. In addition, the impact of the annealing process after deposition on adhesion was evaluated for selected cases. The tests carried out using scratch and Scotch tape test showed that the coating deposition and annealing temperature, thickness of the coating, and surface pretreatments of the Si wafer had an impact on the adhesion performance of the ALD coatings on the silicon wafer. There was also an improved load carrying capacity due to Al{sub 2}O{sub 3}, the magnitude of which depended on the coating thickness and the deposition temperature. The tape tests were carried out for selected coatings as a comparison. The results show that the scratch test is a useful and applicable tool for adhesion evaluation of ALD coatings, even when carried out for thin (20 nm thick) coatings.

36 MATERIALS SCIENCE↗