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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 1,405 records · Page 78

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NASA NTRS1972

The image-processing system for the Earth Resources Technology Satellite.

Description of the image-processing system for the Earth Resources Technology Satellite (ERTS), which will process video-tape recordings received from the satellite into imagery and digitized video data suitable for earth-resource study and analysis. The system is made up of three subsystems. The bulk processor produces 70-mm images and digitized records, corrected for systematic geometric and radiometric errors as well as for sensor-calibration and other errors. The precision processor modifies the bulk images to significantly increase geometric precision. The special processor transfers either bulk or precision data to computer-compatible tape.

Johnson, R. H.↗

NASA NTRS1972

The precision-processing subsystem for the Earth Resources Technology Satellite.

Description of the precision processor, a subsystem in the image-processing system for the Earth Resources Technology Satellite (ERTS). This processor is a special-purpose image-measurement and printing system, designed to process user-selected bulk images to produce 1:1,000,000-scale film outputs and digital image data, presented in a Universal-Transverse-Mercator (UTM) projection. The system will remove geometric and radiometric errors introduced by the ERTS multispectral sensors and by the bulk-processor electron-beam recorder. The geometric transformations required for each input scene are determined by resection computations based on reseau measurements and image comparisons with a special ground-control base contained within the system; the images are then printed and digitized by electronic image-transfer techniques.

Chapelle, W. E.↗

NASA NTRS1972

C-MOS array design techniques: SUMC multiprocessor system study

The current capabilities of LSI techniques for speed and reliability, plus the possibilities of assembling large configurations of LSI logic and storage elements, have demanded the study of multiprocessors and multiprocessing techniques, problems, and potentialities. Evaluated are three previous systems studies for a space ultrareliable modular computer multiprocessing system, and a new multiprocessing system is proposed that is flexibly configured with up to four central processors, four 1/0 processors, and 16 main memory units, plus auxiliary memory and peripheral devices. This multiprocessor system features a multilevel interrupt, qualified S/360 compatibility for ground-based generation of programs, virtual memory management of a storage hierarchy through 1/0 processors, and multiport access to multiple and shared memory units.

Clapp, W. A.↗

NASA NTRS1972

Multiprocessor architectural study

An architectural design study was made of a multiprocessor computing system intended to meet functional and performance specifications appropriate to a manned space station application. Intermetrics, previous experience, and accumulated knowledge of the multiprocessor field is used to generate a baseline philosophy for the design of a future SUMC* multiprocessor. Interrupts are defined and the crucial questions of interrupt structure, such as processor selection and response time, are discussed. Memory hierarchy and performance is discussed extensively with particular attention to the design approach which utilizes a cache memory associated with each processor. The ability of an individual processor to approach its theoretical maximum performance is then analyzed in terms of a hit ratio. Memory management is envisioned as a virtual memory system implemented either through segmentation or paging. Addressing is discussed in terms of various register design adopted by current computers and those of advanced design.

Kosmala, A. L.↗

NASA NTRS1973

Shuttle cryogenics supply system. Optimization study. Volume 5 B-2, part 1: Appendix programmers manual for math model

An appendix to the programmers manual for the mathematical model pertaining to the design of cryogenic supply systems for spacecraft is presented. The program listing was produced using the EXEC-8 LISTALL processor which lists a file in alphabetical order. Since the processor does not differentiate between subroutines, functions, and procedure definition processors, each subprogram has been relabeled to clearly identify the type of symbolic listing.

Source record↗

NASA NTRS1973

Apparatus for aiding a pilot in avoiding a midair collision between aircraft

An apparatus for aiding a pilot in avoiding a midair collision between aircraft is described. A protected aircraft carries a transmitter, a transponder, a receiver, and a data processor; and an intruding cooperating aircraft carries a transponder. The transmitter of the protected aircraft continuously transmits a signal to the transponders of all intruding aircraft. The transponder of each of the intruding aircraft adds the altitude of the intruding aircraft to the signal and transmits it back to the receiver of the protected aircraft. The receiver selects only the signal from the most hazardous intruding aircraft and applies it to the data processor. From this selected signal the data processor determines the closing velocity between the protected and intruding aircraft, the range between the two aircraft, their altitude difference and the time to a possible collision.

Schrader, J. H.↗

NASA NTRS1973

Scheduling algorithms for multiprogramming in a hard-real-time environment.

The problem of multiprogram scheduling on a single processor is studied from the viewpoint of the characteristics peculiar to the program functions that need guaranteed service. It is shown that an optimum fixed priority scheduler possesses an upper bound to processor utilization which may be as low as 70 percent for large task sets. It is also shown that full processor utilization can be achieved by dynamically assigning priorities on the basis of their current deadlines. A combination of these two scheduling techniques is also discussed.

Liu, C. L.↗

NASA NTRS1973

Processing of thermionic power on an electrically propelled spacecraft

A study to define the power processing equipment required between a thermionic reactor and an array of mercury-ion thrusters for a nuclear electric propulsion system is reported. Observations and recommendations that resulted from this study were: (1) the preferred thermionic-fuel-element source voltages are 23 V or higher; (2) transistor characteristics exert a strong effect on power processor mass; (3) the power processor mass could be considerably reduced should the magnetic materials that exhibit low losses at high frequencies, that have a high Curie point, and that can operate at 15 to 20 kG become avaliable; (4) electrical component packaging on the radiator could reduce the area that is sensitive to meteoroid penetration, thereby reducing the meteoroid shielding mass requirement; (5) an experimental model of the power processor design should be built and tested to verify the efficiencies, masses, and all the automatic operational aspects of the design.

Macie, T. W.↗

NASA NTRS1975

Technical guidance and analytic services in support of SEASAT-A

The design of a high resolution radar for altimetry and ocean wave height estimation was studied. From basic principles, it is shown that a short pulse wide beam radar is the most appropriate and recommended technique for measuring both altitude and ocean wave height. To achieve a topographic resolution of + or - 10 cm RMS at 5.0 meter RMS wave heights, as required for SEASAT-A, it is recommended that the altimeter design include an onboard adaptive processor. The resulting design, which assumes a maximum likelihood estimation (MLE) processor, is shown to satisfy all performance requirements. A design summary is given for the recommended radar altimeter, which includes a full deramp STRETCH pulse compression technique followed by an analog filter bank to separate range returns as well as the assumed MLE processor. The feedback loop implementation of the MLE on a digital computer was examined in detail, and computer size, estimation accuracies, and bias due to range sidelobes are given for the MLE with typical SEASAT-A parameters. The standard deviation of the altitude estimate was developed and evaluated for several adaptive and nonadaptive split-gate trackers. Split-gate tracker biases due to range sidelobes and transmitter noise are examined. An approximate closed form solution for the altimeter power return is derived and evaluated. The feasibility of utilizing the basic radar altimeter design for the measurement of ocean wave spectra was examined.

Brooks, W. L.↗

NASA NTRS1975

System balance analysis for vector computers

The availability of vector processors capable of sustaining computing rates of 10 to the 8th power arithmetic results pers second raised the question of whether peripheral storage devices representing current technology can keep such processors supplied with data. By examining the solution of a large banded linear system on these computers, it was found that even under ideal conditions, the processors will frequently be waiting for problem data.

Knight, J. C.↗

NASA NTRS1975

Literal algebra for satellite dynamics

A description of the rather general class of operations available is given and the operations are related to problems in satellite dynamics. The implementation of an algebra processor is discussed. The four main categories of symbol processors are related to list processing, string manipulation, symbol manipulation, and formula manipulation. Fundamental required operations for an algebra processor are considered. It is pointed out that algebra programs have been used for a number of problems in celestial mechanics with great success. The advantage of computer algebra is its accuracy and speed.

Gaposchkin, E. M.↗

NASA NTRS1975

Satellite on-board processing for earth resources data

The feasibility was investigated of an on-board earth resources data processor launched during the 1980-1990 time frame. Projected user applications were studied to define the data formats and the information extraction algorithms that the processor must execute. Based on these constraints, and the constraints imposed by the available technology, on-board processor systems were designed and their feasibility evaluated. Conclusions and recommendations are given.

Bodenheimer, R. E.↗

NASA NTRS1975

Design and implementation of a medium speed communications interface and protocol for a low cost, refreshed display computer

The design and implementation of hardware and software systems involved in using a 40,000 bit/second communication line as the connecting link between an IMLAC PDS 1-D display computer and a Univac 1108 computer system were described. The IMLAC consists of two independent processors sharing a common memory. The display processor generates the deflection and beam control currents as it interprets a program contained in the memory; the minicomputer has a general instruction set and is responsible for starting and stopping the display processor and for communicating with the outside world through the keyboard, teletype, light pen, and communication line. The processing time associated with each data byte was minimized by designing the input and output processes as finite state machines which automatically sequence from each state to the next. Several tests of the communication link and the IMLAC software were made using a special low capacity computer grade cable between the IMLAC and the Univac.

Phyne, J. R.↗

NASA NTRS1976

Simulation analysis of a microcomputer-based, low-cost Omega navigation system

The current status of research on a proposed micro-computer-based, low-cost Omega Navigation System (ONS) is described. The design approach emphasizes minimum hardware, maximum software, and the use of a low-cost, commercially-available microcomputer. Currently under investigation is the implementation of a low-cost navigation processor and its interface with an omega sensor to complete the hardware-based ONS. Sensor processor functions are simulated to determine how many of the sensor processor functions can be handled by innovative software. An input data base of live Omega ground and flight test data was created. The Omega sensor and microcomputer interface modules used to collect the data are functionally described. Automatic synchronization to the Omega transmission pattern is described as an example of the algorithms developed using this data base.

Lilley, R. W.↗

NASA NTRS1976

Real-time video compression algorithm for Hadamard transform processing

A real-time digital video processor using Hadamard transform techniques to reduce video bandwidth is described. The processor can be programmed with different parameters to investigate various algorithms for bandwidth compression. The processor is also adaptive in that it can select different parameter sets to tradeoff spatial resolution for temporal resolution in the regions of the picture that are moving. Algorithms used in programming the system are described along with results achieved at various levels of compression. The algorithms relate to spatial compression, temporal compression, and the adaptive selection of parameter sets.

Knauer, S. C.↗

NASA NTRS1975

Real-time video compression algorithm for Hadamard transform processing

A real-time digital video processor using Hadamard transform techniques to reduce video bandwidth is described. The processor can be programmed with different parameters to investigate various algorithms for bandwidth compression. The processor is also adaptive in that it can select different parameter sets to trade off spatial resolution for temporal resolution in the regions of the picture that are moving. Algorithms used in programming the system are described along with results achieved at various levels of compression. The algorithms relate to spatial compression, temporal compression, and the adaptive selection of parameter sets.

Knauer, S. C.↗

NASA NTRS1978

Development of flame resistant treatment for nomex fibrous structures

Technology which renders aramid fibrous structures flame resistant through chemical modification was developed. The project scaled up flame resistant treatment from laboratory fabric swatches of a few inches to efficiently producing ten yards of commercial width (41 inches) aromatic polyamide. The radiation intensity problem of the processor was resolved. Further improvement of the processor cooling system was recommended for two reasons: (1) To advance current technology of flame proofing Nomex fabric to higher oxygen enriched atmospheres; and (2) To adapt the processor for direct applicability to low cost commercial fabrics.

Toy, M. S.↗

NASA NTRS1979

A Study of Linear Approximation Techniques for SAR Azimuth Processing

The application of the step transform subarray processing techniques to synthetic aperture radar (SAR) was studied. The subarray technique permits the application of efficient digital transform computational techniques such as the fast Fourier transform to be applied while offering an effective tool for range migration compensation. Range migration compensation is applied at the subarray level, and with the subarray size based on worst case range migration conditions, a minimum control system is achieved. A baseline processor was designed for a four-look SAR system covering approximately 4096 by 4096 SAR sample field every 2.5 seconds. Implementation of the baseline system was projected using advanced low power technologies. A 20 swath is implemented with approximately 1000 circuits having a power dissipation of from 70 to 195 watts. The baseline batch step transform processor is compared to a continuous strip processor, and variations of the baseline are developed for a wide range of SAR parameters.

Martinson, L. W.↗