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Search indexed NASA NTRS and DOE OSTI research on propulsion, heat transfer, battery materials and energy systems. Follow report and document links to the original sources.

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At least 1,405 records · Page 78

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NASA NTRS1986

Electronic timer for sounding rocket payload use

An electronic timer has been developed for sounding rocket use. The timer uses CMOS technology for low power consumption and has a battery back-up to keep the timing circuit active in case of a dropout on the payload power bus. Time-event decoding is done by programming EPROM's which enable a +28 volt dc sourcing output. There are 32 discrete outputs which can provide +28 volt dc into a minimum load impedance of 150 ohms. Inputs are designed to operate on standard CMOS voltage levels, but they can withstand +28 volts dc without damage. The timer can be started by either 'G' or lift-off switch closure or umbilical release at lift-off.

Williams, C. P.↗

DOE OSTI2019

Development of FELIX based readout system for HV-CMOS sensor testbeam

The High Voltage CMOS (HV-CMOS) sensors are extensively investigated by the ATLAS collaboration for the High-Luminosity LHC (HL-LHC) upgrade of the Inner Tracker (ITk) detector. The HV-CMOS technology is a commercial integrated circuit process with the advantages of monolithic readout and fast charge collection. A front-end test platform of CaRIBOu (Control and Readout Itk BOard) and a testbeam Telescope based on the ATLAS IBL (Insertable B-Layer) silicon pixel modules, have been developed for the HV-CMOS sensor study and characterization in testbeam experiments. The Front-End LInk eXchange (FELIX) system is a newapproach to function as the gateway between detector front-end electronics and the commodity switched network in the ATLAS upgrade. A FELIX based readout system has been developed for both the CaRIBOu and the testbeam Telescope. It has been deployed successfully in the testbeam at theCERNSPS H8 beamline in August 2017. The test results show that the readout system is capable of sensor calibration and readout of a high-density pixel detector with high trigger rate in testbeam experiments.

47 OTHER INSTRUMENTATION↗

DOE OSTI2016

Fabrication of Gamma Detectors Based on Magnetic Ag:Er Microcalorimeters

This report discusses the photolithographic fabrication of ultra-high resolution gamma-ray detectors based on magnetic microcalorimeters (MMCs). The MMC uses a novel Er-doped silver sensor (Ag:Er) that is expected to have higher sensitivity than the Er-doped gold (Au:Er) sensors currently in use. The MMC also integrates the first-stage SQUID preamplifier on the same chip as the MMC gamma detector to increase its signal-to-noise ratio. In addition, the MMC uses a passive Ta-Nb heat switch to replace one of the common long-term failure points in earlier detectors. This report discusses the fabrication process we have developed to implement the proposed improvements.

46 INSTRUMENTATION RELATED TO NUCLEAR SCIENCE AND ↗

DOE OSTI2026

A Sensitivity-driven Wide Area Protection (SWAP) Coordination Tool for High Penetration of Inverter-based Resources (IBR)

Traditionally, power system generation sources have been composed of synchronous generators, of which the fault current behavior is understood with minimal differences between generation size and types due to the physics of their construction. Present protection schemes and modeling methods are based upon these understood characteristics. Most renewable generation is composed of inverter-based resources (IBR), in which fault current is determined by switching control software and hardware limitations, each of which can vary between manufacturers and even between models of the same manufacturer. The resulting fault current is low in magnitude, low in negative-sequence current, unpredictable phase angles, and is a challenge to model. These characteristics also result in a challenge to traditional protection schemes and fault simulation software. To address several of these concerns, the project has the following goals: 1. Improve IBR models: Improve IBR models used in short circuit (SC) programs to accurately capture the response of IBRs at the bulk power system (BPS) level for fault and protection studies. 2. Develop automation tool: Develop an automation tool that allows engineers to identify protection coordination and sensitivity issues by performing SC and protection coordination studies in a high IBR-penetrated grid by applying variations to the IBR models, faults, contingencies, etc. 3. Develop schemes: Develop new protection mitigation solution schemes that complement the existing protection systems to ensure safe operation of the BPS with higher IBR penetration levels. The project team did not achieve this final goal, as the Department of Energy (DOE) stopped the project early due to changes in DOE funding priorities. The termination notice came at the beginning of the final project phase, while the team was identifying and beginning to investigate protection issues. It should be noted that the team discussed a 100% penetration scenario. However, this scenario would require the use of grid-forming IBR models that are not presently available. Since developing these models requires additional effort, the 100% penetration scenario was not pursued during this project. In the future, developing the methodology and models for the 100% scenario could benefit the industry.

14 SOLAR ENERGY↗

NASA NTRS1996

Silicon Carbide High-Temperature Power Rectifiers Fabricated and Characterized

The High Temperature Integrated Electronics and Sensors (HTIES) team at the NASA Lewis Research Center is developing silicon carbide (SiC) for use in harsh conditions where silicon, the semiconductor used in nearly all of today's electronics, cannot function. Silicon carbide's demonstrated ability to function under extreme high-temperature, high power, and/or high-radiation conditions will enable significant improvements to a far ranging variety of applications and systems. These improvements range from improved high-voltage switching for energy savings in public electric power distribution and electric vehicles, to more powerful microwave electronics for radar and cellular communications, to sensors and controls for cleaner-burning, more fuel-efficient jet aircraft and automobile engines. In the case of jet engines, uncooled operation of 300 to 600 C SiC power actuator electronics mounted in key high-temperature areas would greatly enhance system performance and reliability. Because silicon cannot function at these elevated temperatures, the semiconductor device circuit components must be made of SiC. Lewis' HTIES group recently fabricated and characterized high-temperature SiC rectifier diodes whose record-breaking characteristics represent significant progress toward the realization of advanced high-temperature actuator control circuits. The first figure illustrates the 600 C probe-testing of a Lewis SiC pn-junction rectifier diode sitting on top of a glowing red-hot heating element. The second figure shows the current-versus voltage rectifying characteristics recorded at 600 C. At this high temperature, the diodes were able to "turn-on" to conduct 4 A of current when forward biased, and yet block the flow of current ($quot;turn-off") when reverse biases as high as 150 V were applied. This device represents a new record for semiconductor device operation, in that no previous semiconductor electronic device has ever simultaneously demonstrated 600 C functionality, and 4-A turn-on and 150-V rectification. The high operating current was achieved despite severe device size limitations imposed by present-day SiC wafer defect densities. Further substantial increases in device performance can be expected when SiC wafer defect densities decrease as SiC wafer production technology matures.

Source record↗

NASA NTRS1976

High photovoltages in ferroelectric ceramics

The short-circuit currents and photo-emfs were measured for various ceramics including barium titanate, lead metaniobate, and lead titanate. It is suggested that the emfs and currents arise from the presence of photoconductor-insulator sandwiches in the presence of space-charge-produced internal fields. Results are in agreement with the proposed theory and indicate that the ferroelectric ceramics are not only producers of high-voltage photoelectricity but a photo-battery, the polarity and magnitude of which can be switched by application of an electrical signal.

Brody, P. S.↗

DOE OSTI2010

Utility-Scale Silicon Carbide Semiconductor: Monolithic Silicon Carbide Anode Switched Thyristor for Medium Voltage Power Conversion

ADEPT Project: GeneSiC is developing an advanced silicon-carbide (SiC)-based semiconductor called an anode-switched thyristor. This low-cost, compact SiC semiconductor conducts higher levels of electrical energy with better precision than traditional silicon semiconductors. This efficiency will enable a dramatic reduction in the size, weight, and volume of the power converters and electronic devices it's used in.GeneSiC is developing its SiC-based semiconductor for utility-scale power converters. Traditional silicon semiconductors can't process the high voltages that utility-scale power distribution requires, and they must be stacked in complicated circuits that require bulky insulation and cooling hardware. GeneSiC's semiconductors are well suited for high-power applications like large-scale renewable wind and solar energy installations.

ADEPT↗

DOE OSTI2024

FET Junction Temperature Monitoring Using Novel On-Chip Solution

A novel junction temperature monitoring sensor is proposed and experimentally demonstrated for application in MOS-gate power devices. The sensor is created using the polycide gate electrode layer of the devices to create a temperature-sensitive resistor without any additional fabrication steps. The resistor is located on the field oxide with one end grounded at the device reference terminal to isolate it from the device current and voltage transients. It allows in-situ monitoring of the device junction temperature during active circuit operation. The technology has been implemented to monitor the junction temperature of Silicon Carbide Junction Barrier Schottky Field Effect Transistors (SiC JBSFETs) with the bi-directional FET (BiDFET).

Bidirectional switches, SiC bidirectional FET, BiD↗

NASA NTRS1996

ACTS Aeronautical Terminal Experiment System Description and Link Analysis

During the summer of 1994, the performance of an experimental mobile satellite communication system was demonstrated to industry and government representatives by the NASA Lewis Research Center (LeRC) and the Jet Propulsion Laboratory (JPL). The system was based on the advanced communications technology satellite (ACTS) and consisted of a K-/Ka-band active monolithic microwave integrated circuit (MMIC) phased array antenna system, ACTS mobile terminal (AMT) and link evaluation terminal (LET). A LeRC research aircraft, Learjet model 25, was outfitted with the active MMIC phased array antenna system and AMT and served as the experimental 20/30 Ghz aeronautical terminal. The LET at LeRC in Cleveland, OH, was interfaced with portions of fixed-AMT equipment and together provided the gateway station functions including ACTS interface and public service telephone network (PSTN) interface. The ACTS was operated in its microwave switch matrix (MSM) mode with a spot beam for the Learjet and another spot beam dedicated to the LET. The Learjet was flown over several major cities across the US and demonstrated the feasibility of a full-duplex compressed voice links for an aeronautical terminal through the 20/30 Ghz ACTS channel. This paper presents a technical description of the system including the MMIC phased array antenna system, AMT, Learjet, LET, and ACTS. The array antenna system consists of a 30 Ghz transmit array (LeRc/Texas Instruments) and two 20 Ghz receive arrays (USAF Rome Lab., Boeing, and Martin Marietta), each one very small with sufficient performance for a satellite voice link. The AMT consists of 2.4/4.8/9.6 Kbps voice coder/decoder, modem, PSTN interface and RF/IF converters. Link analysis is presented and compared to the actual performance data collected during the demonstration flights.

Sohn, Philip↗

DOE OSTI2026

A Unified Wireless Charger, On-Board Charger, and Auxiliary Power Module for Electric Vehicle Charging Systems

This paper proposes a unified electric vehicle (EV) charging architecture that integrates wireless power transfer (WPT), an on-board charger (OBC), and an auxiliary power module (APM) within a single architecture. By sharing a multi-functional magnetic structure and active switch bridges, the proposed topology eliminates additional transformers and converter stages, reducing hardware complexity and improving power density. A multipurpose magnetic design achieves magnetic decoupling among the WPT, OBC, and APM functions while maintaining the required coupling for each mode. Through electrical reconfiguration, the WPT operates as an LCC-S converter, whereas the OBC and APM operate as dual-active-bridge (DAB) converters. The system supports multiple operating modes, including simultaneous high-voltage and lowvoltage battery charging. Finite-element and circuit simulations verify the magnetic characteristics and system operation, demonstrating the feasibility of the proposed unified architecture for EV charging applications.

Jo, Cheolhui [ORNL] (ORCID:0000000322692434)↗

DOE OSTI2019

Electrothermal Modeling and Analysis of Gallium Oxide Power Switching Devices: Preprint

Gallium oxide is an emerging wide band-gap material that has the potential to penetrate the power electronics market in the near future. In this paper, a finite-element gallium oxide semiconductor model is presented that can predict the electrical and thermal characteristics of the device. The finite element model of the two-dimensional device architecture is developed inside the Sentaurus environment. A vertical FinFET device architecture is employed to assess the device's behavior and its static and dynamic behavior. Enhancement-mode device operation is realized with this type of device architecture without the need for any selective area doping. The dynamic thermal behavior of the device is characterized through its short-circuit behavior. Based on the device static and dynamic behavior, it is envisioned that reliable vertical transistors can be fabricated for the power electronics applications.

33 ADVANCED PROPULSION SYSTEMS↗

DOE OSTI2013

A Dynamic Photovoltaic Model Incorporating Capacitive and Reverse-Bias Characteristics

Photovoltaics (PVs) are typically modeled only for their forward-biased dc characteristics, as in the commonly used single-diode model. While this approach accurately models the I-V curve under steady forward bias, it lacks dynamic and reverse-bias characteristics. The dynamic characteristics, primarily parallel capacitance and series inductance, affect operation when a PV cell or string interacts with switching converters or experiences sudden transients. Reverse-bias characteristics are often ignored because PV devices are not intended to operate in the reverse-biased region. However, when partial shading occurs on a string of PVs, the shaded cell can become reverse biased and develop into a hot spot that permanently degrades the cell. To fully examine PV behavior under hot spots and various other faults, reverse-bias characteristics must also be modeled. This study develops a comprehensive mathematical PV model based on circuit components that accounts for forward bias, reverse bias, and dynamic characteristics. Using a series of three experimental tests on an unilluminated PV cell, all required model parameters are determined. The model is implemented in MATLAB Simulink and accurately models the measured data.

Kim, KA↗

NASA NTRS1987

Advanced Components for Spaceborne Infrared Astronomy

Basic improvements in the technology of low noise read-out systems for low background detectors were demonstrated. Using discrete JFET integrating amplifiers at their optimum temperature of 55 K, read noise less than 7.5 electrons in 128 seconds of integration was obtained. Two models of single channel integrators are now available, the JF-77 for use between 50 and 80 K and the JF-4 for lower temperatures. A 1 x 15 linear array of complete integrators on a single integrated circuit was developed and will be made available in the near future. The successful operation of a superconducting stepper motor was demonstrated. The motor shows a three fold increase in torque over conventional motors operating at room temperature. The success of the motor stems from the use of superconducting coils in conjunction with developments in bearings for cryogenic use, rare-earth rotors, and motor cooling techniques. The current state of development will allow the rapid development of motors optimized for specific applications. An electronic switch capable of resetting cooled JFET integrating amplifiers was developed. The JFET integrating amplifiers that use this switch have demonstrated read noise of less than 10 electrons. The JFET reset device exhibits an extremely high open impedance and low leakage current. Capacitance is sufficiently low so as not to impair amplifier sensitivity. The effects of transient switching charges are minimized by a compensation technique and variable transient current problems inherent to devices of this type are overcome by external circuity.

Davidson, Arnold W.↗

NASA NTRS2009

FPGA-Based Networked Phasemeter for a Heterodyne Interferometer

A document discusses a component of a laser metrology system designed to measure displacements along the line of sight with precision on the order of a tenth the diameter of an atom. This component, the phasemeter, measures the relative phase of two electrical signals and transfers that information to a computer. Because the metrology system measures the differences between two optical paths, the phasemeter has two inputs, called measure and reference. The reference signal is nominally a perfect square wave with a 50- percent duty cycle (though only rising edges are used). As the metrology system detects motion, the difference between the reference and measure signal phases is proportional to the displacement of the motion. The phasemeter, therefore, counts the elapsed time between rising edges in the two signals, and converts the time into an estimate of phase delay. The hardware consists of a circuit board that plugs into a COTS (commercial, off-the- shelf) Spartan-III FPGA (field-programmable gate array) evaluation board. It has two BNC inputs, (reference and measure), a CMOS logic chip to buffer the inputs, and an Ethernet jack for transmitting reduced-data to a PC. Two extra BNC connectors can be attached for future expandability, such as external synchronization. Each phasemeter handles one metrology channel. A bank of six phasemeters (and two zero-crossing detector cards) with an Ethernet switch can monitor the rigid body motion of an object. This device is smaller and cheaper than existing zero-crossing phasemeters. Also, because it uses Ethernet for communication with a computer, instead of a VME bridge, it is much easier to use. The phasemeter is a key part of the Precision Deployable Apertures and Structures strategic R&D effort to design large, deployable, segmented space telescopes.

Rao, Shanti↗

NASA NTRS1994

FDDI network test adaptor error injection circuit

An apparatus for injecting errors into a FDDI token ring network is disclosed. The error injection scheme operates by fooling a FORMAC into thinking it sent a real frame of data. This is done by using two RAM buffers. The RAM buffer normally accessed by the RBC/DPC becomes a SHADOW RAM during error injection operation. A dummy frame is loaded into the shadow RAM in order to fool the FORMAC. This data is just like the data that would be used if sending a normal frame, with the restriction that it must be shorter than the error injection data. The other buffer, the error injection RAM, contains the error injection frame. The error injection data is sent out to the media by switching a multiplexor. When the FORMAC is done transmitting the data, the multiplexor is switched back to the normal mode. Thus, the FORMAC is unaware of what happened and the token ring remains operational.

Eckenrode, Thomas↗

DOE OSTI2019

Intertidal Creeks and Overmarsh Circulation in a Small Salt Marsh Basin

The role of intertidal creek networks in overmarsh circulation is not well constrained. In this study, we systematically remove intertidal creeks from a high-resolution salt marsh digital elevation model and conduct new flow simulations with each iteration. Overall, removal of first- and second-order creeks reduced drainage density by 65%, and this had a negligible effect on overmarsh circulation and tracer distribution. However, upon removal of third- and fourth-order creeks, drainage density was reduced by 80% of the original value, and changes in peak velocity magnitude across various spatial and temporal scales reveal a system-wide switch from ebb to flood dominance. This response coincides with the interruption of topographically connected creeks that facilitate the direct exchange of water and tracer between the marsh interior and the larger subtidal system. Further, this reduction in hydraulic connectivity gives rise to less expansive tracer dispersal and a systematic decline in tracer residence time. Together, these results reveal that for the Groves Creek marsh, lower-order intertidal creeks have a minor role in overmarsh circulation, while higher-order creeks increase the potential for short circuiting of flow; they greatly influence overall flood and ebb dominance, and net tracer dispersal and associated retention time. Moreover, results reported here provide new insight on, for example, salt marsh restoration and the requisite digital elevation model bathymetry for robust simulations of overmarsh circulation.

58 GEOSCIENCES↗

NASA NTRS2009

SOI N-Channel Field Effect Transistors, CHT-NMOS80, for Extreme Temperatures

Extreme temperatures, both hot and cold, are anticipated in many of NASA space exploration missions as well as in terrestrial applications. One can seldom find electronics that are capable of operation under both regimes. Even for operation under one (hot or cold) temperature extreme, some thermal controls need to be introduced to provide appropriate ambient temperatures so that spacecraft on-board or field on-site electronic systems work properly. The inclusion of these controls, which comprise of heating elements and radiators along with their associated structures, adds to the complexity in the design of the system, increases cost and weight, and affects overall reliability. Thus, it would be highly desirable and very beneficial to eliminate these thermal measures in order to simplify system's design, improve efficiency, reduce development and launch costs, and improve reliability. These requirements can only be met through the development of electronic parts that are designed for proper and efficient operation under extreme temperature conditions. Silicon-on-insulator (SOI) based devices are finding more use in harsh environments due to the benefits that their inherent design offers in terms of reduced leakage currents, less power consumption, faster switching speeds, good radiation tolerance, and extreme temperature operability. Little is known, however, about their performance at cryogenic temperatures and under wide thermal swings. The objective of this work was to evaluate the performance of a new commercial-off-the-shelf (COTS) SOI parts over an extended temperature range and to determine the effects of thermal cycling on their performance. The results will establish a baseline on the suitability of such devices for use in space exploration missions under extreme temperatures, and will aid mission planners and circuit designers in the proper selection of electronic parts and circuits. The electronic part investigated in this work comprised of a CHT-NMOS80 high temperature N-channel MOSFET (metal-oxide semiconductor field-effect transistor) device that was manufactured by CISSOID. This high voltage, medium-power transistor is fabricated using SOI processes and is designed for extreme wide temperature applications such as geothermal well logging, aerospace and avionics, and automotive industry. It has a high DC current capability and is specified for operation in the temperature range of -55 C to +225 C

Patterson, Richard L.↗

NASA NTRS2014

Using a Commercial Ethernet PHY Device in a Radiation Environment

This work involved placing a commercial Ethernet PHY on its own power boundary, with limited current supply, and providing detection methods to determine when the device is not operating and when it needs either a reset or power-cycle. The device must be radiation-tested and free of destructive latchup errors. The commercial Ethernet PHY's own power boundary must be supplied by a current-limited power regulator that must have an enable (for power cycling), and its maximum power output must not exceed the PHY's input requirements, thus preventing damage to the device. A regulator with configurable output limits and short-circuit protection (such as the RHFL4913, rad hard positive voltage regulator family) is ideal. This will prevent a catastrophic failure due to radiation (such as a short between the commercial device's power and ground) from taking down the board's main power. Logic provided on the board will detect errors in the PHY. An FPGA (field-programmable gate array) with embedded Ethernet MAC (Media Access Control) will work well. The error detection includes monitoring the PHY's interrupt line, and the status of the Ethernet's switched power. When the PHY is determined to be non-functional, the logic device resets the PHY, which will often clear radiation induced errors. If this doesn't work, the logic device power-cycles the FPGA by toggling the regulator's enable input. This should clear almost all radiation induced errors provided the device is not latched up.

Parks, Jeremy↗