Evaluating the Thermal Efficiency of Multistage Falling Particle Receivers Subject to Wind.
Abstract not provided.
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Abstract not provided.
2022 AIChE Annual Meeting, Phoenix, AZ, November 13-18, 2022
Often there are errors when reading data from computer memory. To detect and correct these errors, there are multiple types of error correction codes. Disclosed is an error correction architecture that creates a codeword having a data portion and an error correction code portion. Swizzling rearranges the order of bits and distributes the bits among different codewords. Because the data is redistributed, a potential memory error of up to N contiguous bits, where N for example equals 2 times the number of codewords swizzled together, only affects up to, at most, two bits per swizzled codeword. This keeps the error within the error detecting capabilities of the error correction architecture. Furthermore, this can allow improved error correction and detection without requiring a change to error correcting code generators and checkers.
Traditional liquid electrolytes used in lithium (Li) metal batteries (LMBs) have severe safety issues, poor power density, as well as thermal and electrochemical instability that prevents their scaling to newer applications, such as electric vehicles. Using sulfide-based solid-state electrolytes (SSEs) is a viable method to address many of the issues that plague LMBs. However, the key issue preventing the expansion of sulfide-based SSEs is an interplay between poor interfacial stability with the electrodes and massive external stack pressure required to maintain electrode-electrolyte contact. The need for extensive pressure requires large system-level (i.e., battery pack used in an electric vehicle) housing that causes a disconnect between performance at a smaller scale and actual application. Secondary prevention to sulfide-based SSE adoption are difficulties in manufacturing, as toxic deterioration occurs when these materials are exposed to humidity, as well as drastic reduction in SSE performance at low temperature. This work hypothesizes that unique interfacial designs of electrodes and the modification of the sulfide-based SSE will enable reduction of necessary external cell pressure, and therefore support the design of practical LMBs. This will be done through collaboration within Idaho National Laboratory (INL), where manufacturing practices will be parameterized to produce low defect, low porosity SSEs with slight modifications. Next, artificial interfaces will be produced on electrodes to observe the conformality and mass transport properties between the modified SSE and pre-treated anode. External pressure on Li-metal cells will also be parameterized to reduce interfacial impedance while a reduction in the pressure will allot reasonable housing design for larger scale applications. Focus on novelty in this work occurs by modifications to the solid-solid interfaces between electrolyte and electrode, done through doping of the electrolyte and production of artificial interfaces on the Li-metal anode. The modifications at these interfaces, in addition to modified external pressure could identify and address the poor interfacial impedance that hinders high performance SSEs. Fundamental understanding on how to reduce the key hindrances of all-solid-state batteries (ASSBs) will support the advancement for larger scale production and performance, of which will be held in perspective for future works. Beyond battery development, the knowledge gained from process control and defect analysis is applicable to other ceramic systems, such as nuclear fuel coatings and high temperature electrolyzers.
Traditional liquid electrolytes used in lithium (Li) metal batteries (LMBs) have severe safety issues, poor power density, as well as thermal and electrochemical instability that prevents their scaling to newer applications, such as electric vehicles. Using sulfide-based solid-state electrolytes (SSEs) is a viable method to address many of the issues that plague LMBs. However, the key issue preventing the expansion of sulfide-based SSEs is an interplay between poor interfacial stability with the electrodes and massive external stack pressure required to maintain electrode-electrolyte contact. The need for extensive pressure requires large system-level (i.e., battery pack used in an electric vehicle) housing that causes a disconnect between performance at a smaller scale and actual application. Secondary prevention to sulfide-based SSE adoption are difficulties in manufacturing, as toxic deterioration occurs when these materials are exposed to humidity, as well as drastic reduction in SSE performance at low temperature. This work hypothesizes that unique interfacial designs of electrodes and the modification of the sulfide-based SSE will enable reduction of necessary external cell pressure, and therefore support the design of practical LMBs. This will be done through collaboration within Idaho National Laboratory (INL), where manufacturing practices will be parameterized to produce low defect, low porosity SSEs with slight modifications. Next, artificial interfaces will be produced on electrodes to observe the conformality and mass transport properties between the modified SSE and pre-treated anode. External pressure on Li-metal cells will also be parameterized to reduce interfacial impedance while a reduction in the pressure will allot reasonable housing design for larger scale applications. Focus on novelty in this work occurs by modifications to the solid-solid interfaces between electrolyte and electrode, done through doping of the electrolyte and production of artificial interfaces on the Li-metal anode. The modifications at these interfaces, in addition to modified external pressure could identify and address the poor interfacial impedance that hinders high performance SSEs. Fundamental understanding on how to reduce the key hindrances of all-solid-state batteries (ASSBs) will support the advancement for larger scale production and performance, of which will be held in perspective for future works. Beyond battery development, the knowledge gained from process control and defect analysis is applicable to other ceramic systems, such as nuclear fuel coatings and high temperature electrolyzers.
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Various embodiments include a parallel processing computer system that detects memory errors as a memory client loads data from memory and disables the memory client from storing data to memory, thereby reducing the likelihood that the memory error propagates to other memory clients. The memory client initiates a stall sequence, while other memory clients continue to execute instructions and the memory continues to service memory load and store operations. When a memory error is detected, a specific bit pattern is stored in conjunction with the data associated with the memory error. When the data is copied from one memory to another memory, the specific bit pattern is also copied, in order to identify the data as having a memory error.
The combinatorics of track seeding has long been a computational bottleneck for triggering and offline computing in High Energy Physics (HEP), and remains so for the HL-LHC. Next-generation pixel sensors will be sufficiently fine-grained to determine angular information of the charged particle passing through from pixel-cluster properties. This detector technology immediately improves the situation for offline tracking, but any major improvements in physics reach are unrealized since they are dominated by lowest-level hardware trigger acceptance. We will demonstrate track angle and hit position prediction, including errors, using a mixture density network within a single layer of silicon as well as the progress towards and status of implementing the neural network in hardware on both FPGAs and ASICs.
The combinatorics of track seeding has long been a computational bottleneck for triggering and offline computing in High Energy Physics (HEP), and remains so for the HL-LHC. Next-generation pixel sensors will be sufficiently fine-grained to determine angular information of the charged particle passing through from pixel-cluster properties. This detector technology immediately improves the situation for offline tracking, but any major improvements in physics reach are unrealized since they are dominated by lowest-level hardware trigger acceptance. We will demonstrate track angle and hit position prediction, including errors, using a mixture density network within a single layer of silicon as well as the progress towards and status of implementing the neural network in hardware on both FPGAs and ASICs.
Often there are errors when reading data from computer memory. To detect and correct these errors, there are multiple types of error correction codes. Disclosed is an error correction architecture that creates a codeword having a data portion and an error correction code portion. Swizzling rearranges the order of bits and distributes the bits among different codewords. Because the data is redistributed, a potential memory error of up to N contiguous bits, where N for example equals 2 times the number of codewords swizzled together, only affects up to, at most, two bits per swizzled codeword. This keeps the error within the error detecting capabilities of the error correction architecture. Furthermore, this can allow improved error correction and detection without requiring a change to error correcting code generators and checkers.
A method for removing a contaminant from a fluid is provided. A positively charged layered double hydroxide is combined with a negatively charged clay material to form adsorption material. The adsorption material is contacted with an aqueous solution containing the contaminant to adsorb the contaminant onto the adsorption material.
The Brine Availability Tests in Salt is a US Department of Energy Office of Nuclear Energy supported activity as part of the Spent Fuel and Waste Disposition Campaign where we are performing simultaneous heated and control experiments in adjacent horizontal boreholes in the WIPP Salt Disposal Investigation drifts as part of experimental Phase 1. Phase 1a of BATS, a low-cost, small spatial-scale experiment performed in order to design instrumentation and methods for further experimentation in the URL, has been completed (June 2018 - May 2019) and is described elsewhere. In coincidence with multiple physical parameters that will be measured over the duration of the experiment, we will be measuring the liquid and vapor phases of H{sub 2}O as well as its isotopic content (not measured in Phase 1a). Three different forms of water occur in natural salts: as fluid in macro scale (mm size) inclusions, as intergranular free H{sub 2}O and as H{sub 2}O incorporated in hydrous minerals. Each of these forms has potentially different stable isotope signatures and will be influenced differentially by heat induced transport and by interaction with introduced tracers. Continuous measurement of vapor phase H{sub 2}O isotopes during borehole heating will be impacted by several effects: 1) evaporation as liquid brine flows into the borehole and evaporates completely or partially into the dry N{sub 2} stream; 2) steam from dehydration of hydrous minerals, that may enter the borehole; and 3) hydrous minerals that may form in the borehole (preferentially incorporating heavier isotopes). The continuous time series collected over the course of the heating test will be combined with analyses of pre-test and post-test collected samples of test site salt to investigate the contributions of each of the three water types as H{sub 2}O is mobilized due to the effects of heating. (authors)
DOE-EM's Consolidated Business Center (EM-CBC) Office of Cost Estimating has developed a system of Decommissioning Cost Estimating Relationships (CERs) and Models to improve the reliability and efficiency of its estimates. The development builds on the multi-year process of collecting and organizing historical cost data from DOEEMs decommissioning projects and estimate model development to support project and program-level decommissioning estimates. The latest work has extended these models down to project scope element and component building area levels, allowing the actual costs of work for these estimate components to be assembled into estimates that reflect specific projects. The CERs have been incorporated into two estimator-friendly products - as cost libraries in the MII estimating program and as an MS Excel-based model, and are available for DOE federal staff use. (authors)
We present a smart pixel prototype readout integrated circuit (ROIC) designed in CMOS 28 nm bulk process, with in-pixel implementation of an artificial intelligence (AI) / machine learning (ML) based data filtering algorithm designed as proof-of-principle for a Phase III upgrade at the Large Hadron Collider (LHC) pixel detector. The first version of the ROIC consists of two matrices of 256 smart pixels, each 25$\times$25 $\mu$m$^2$ in size. Each pixel consists of a charge-sensitive preamplifier with leakage current compensation and three auto-zero comparators for a 2-bit flash-type ADC. The frontend is capable of synchronously digitizing the sensor charge within 25 ns. Measurement results show an equivalent noise charge (ENC) of $\sim$30e$^-$ and a total dispersion of $\sim$100e$^-$ The second version of the ROIC uses a fully connected two-layer neural network (NN) to process information from a cluster of 256 pixels to determine if the pattern corresponds to highly desirable high-momentum particle tracks for selection and readout. The digital NN is embedded in-between analog signal processing regions of the 256 pixels without increasing the pixel size and is implemented as fully combinatorial digital logic to minimize power consumption and eliminate clock distribution, and is active only in the presence of an input signal. The total power consumption of the neural network is $\sim$ 300 $\mu$W. The NN performs momentum classification based on the generated cluster patterns and even with a modest momentum threshold, it is capable of 54.4% - 75.4% total data rejection, opening the possibility of using the pixel information at 40MHz for the trigger. The total power consumption of analog and digital functions per pixel is $\sim$ 6 $\mu$W per pixel, which corresponds to $\sim$ 1 W/cm$^2$ staying within the experimental constraints.